1520 - Data Delay Devices, Inc.

1520
10-TAP DIP/SMD DELAY LINE
TD/TR = 5
(SERIES 1520)
FEATURES





PACKAGES
10 taps of equal delay increment
Delays to 1000ns
Low profile
Epoxy encapsulated
Meets or exceeds MIL-D-23859C
GND
1
14
IN
T1
2
13
N/C
T3
3
12
T2
T5
4
11
T4
T6
5
10
T7
T8
6
9
T9
T10
7
8
GND
The 1520-series device is a fixed, single-input, ten-output,
passive delay line. The signal input (IN) is reproduced at the
outputs (T1-T10) in equal increments. The delay from IN to T10
(TD) and the characteristic impedance of the line (Z) are
determined by the dash number. The rise time (TR) of the line is
20% of TD, and the 3dB bandwidth is given by 1.75 / TD. The
device is available in a 14-pin DIP (1520) or a 14-pin SMD
(1520S), and a wide range of pinouts may be specified.
1520(S)m - xxx - zzz p
MOUNTING HEIGHT CODE
See Table
DELAY TIME
Expressed in nanoseconds (ns)
First two digits are significant figures
Last digit specifies # of zeros to follow
IMPEDANCE
Expressed in ohms
First two digits are significant figures
Last digit specifies # of zeros to follow
Part numbers are constructed according to the scheme shown
at right. For example, 1520C-101-500B is a 290 mil DIP,
100ns, 50 delay line with pinout code B. Similarly, 1520SB201-251 is a 240 mil SMD, 200ns, 250 delay line with
standard pinout.
50 Vdc
10% max.
-55C to +125C
-55C to +125C
100 PPM/C
PINOUT CODES
CODE
STD
A
B
C
D
E
F
G
H
I
J
K
L
N
P
T
U
V
W
Z
IN
14
1
2
7
1
2
1
2
2
1
1
1
13
1
1
1
2
2
1
1
T1
2
2
3
9
13
3
13
13
3
13
2
2
12
2
13
2
3
3
13
13
T2
12
13
4
6
2
4
2
3
4
2
13
3
11
3
3
3
4
4
2
3
Doc #97028
12/2/2011
T3
3
3
5
10
12
5
12
12
12
12
3
4
10
4
12
4
5
5
12
12
T4
11
12
6
5
3
6
3
4
6
3
12
5
9
5
4
5
6
6
3
4
T5
4
4
7
11
11
7,8
11
11
7
11
4
6
7,8
6
11
6
8
8
11
11
T6
5
10
9
12
4
9
4
5
9
5
10
12
6
10
5
9
9
9
4
5
T7
10
5
10
3
10
10
10
10
10
10
5
11
5
11
10
10
10
10
10
10
T8
6
9
11
13
5
11
5
6
11
6
9
10
4
12
6
11
11
11
5
6
PINOUT CODE
See Table
Omit for STD pinout
DELAY SPECIFICATIONS
SERIES SPECIFICATIONS
Dielectric breakdown:
Distortion @ output:
Operating temperature:
Storage temperature:
Temperature coefficient:
Note: Standard pinout shown
Other pinouts available
PART NUMBER CONSTRUCTION
FUNCTIONAL DESCRIPTION





IN
Signal Input
T1-T10 Tap Outputs
GND Ground
T9
9
6
12
2
9
12
9
9
12
9
6
9
3
13
9
12
12
12
9
9
T10
7
7
13
14
6
13
6
7
13
7
7
8
2
14
7
13
13
13
6
8
GND
1,8
14
1,14
1,8
7,8,14
1,14
7
8,14
1
8,14
8,14
7
1,14
7
8,14
7,14
1,7
1
7,14
7
TD
(ns)
10
20
30
40
50
60
75
100
120
150
180
200
220
250
300
375
500
600
750
1000
TI
(ns)
1.0
2.0
3.0
4.0
5.0
6.0
7.5
10.0
12.0
15.0
18.0
20.0
22.0
25.0
30.0
37.5
50.0
60.0
75.0
100.0
TR
(ns)
3.0
5.5
6.5
8.0
10.0
12.0
15.0
20.0
24.0
30.0
36.0
40.0
44.0
50.0
60.0
75.0
100.0
120.0
150.0
200.0
Z=50
3
3
3
3
3
3
3
3
3
3
4
4
4
4
N/A
N/A
N/A
N/A
N/A
N/A
ATTENUATION (%) TYPICAL
Z=100 Z=200 Z=300 Z=500
5
N/A
N/A
N/A
5
5
N/A
N/A
5
5
N/A
N/A
5
5
5
N/A
5
5
5
7
5
5
5
7
5
5
5
7
5
5
7
7
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
8
10
10
7
8
10
10
8
10
12
12
N/A
N/A
15
15
N/A
N/A
15
20
N/A
N/A
N/A
20
Notes: TI represents nominal tap-to-tap delay increment
Tolerance on TD = 5% or 2ns, whichever is greater
Tolerance on TI = 5% or 1ns, whichever is greater
“N/A” indicates that delay is not available at this Z
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
2011 Data Delay Devices
1
1520
MOUNTING HEIGHT CODES
FUNCTIONAL DIAGRAM
T1 T2 T3 T4 T5 T6 T7 T8 T9
IN
T10
GND
GND
CODE
A
B
C
Note:
HEIGHT (MAX)
0.187
0.240
0.290
DIP
Yes
Yes
Yes
SMD
No
Yes
Yes
Codes A and B are not available
for all values of TD
Contact technical staff for details
PACKAGE DIMENSIONS
14 13 12 11 10
9
8
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
1
2
3
4
5
6
7
.280
MAX.
.780 MAX.
See
Table
.015 TYP.
.010.002
.018
TYP.
.070 MAX.
.350
MAX.
.600.010
6 Equal spaces
each .100.010
Non-Accumulative
1520-xx (DIP)
.020 TYP.
.040
TYP.
14 13 12 11 10
9
.010 TYP.
8
.270
TYP.
1
2
3
.090
4
5
6
.430
TYP.
7
.100
.600
.790 MAX.
See
Table
.050
TYP.
1520S-xx (Gull-Wing)
Doc #97028
12/2/2011
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
1520
PASSIVE DELAY LINE TEST SPECIFICATIONS
TEST CONDITIONS
INPUT:
Ambient Temperature:
Input Pulse:
OUTPUT:
Rload:
Cload:
Threshold:
25oC  3oC
High = 3.0V typical
Low = 0.0V typical
Source Impedance:
50 Max.
Rise/Fall Time:
3.0 ns Max. (measured
at 10% and 90% levels)
Pulse Width (TD <= 75ns): PWIN = 100ns
Period
(TD <= 75ns): PERIN = 1000ns
Pulse Width (TD > 75ns): PWIN = 2 x TD
Period
(TD > 75ns): PERIN = 10 x TD
10M
10pf
50% (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PERIN
PW IN
TRISE
INPUT
SIGNAL
TFALL
VIH
90%
50%
10%
90%
50%
10%
TRISE
VIL
TFALL
TRISE
OUTPUT
SIGNAL
90%
50%
10%
TFALL
VOH
90%
50%
10%
VOL
Timing Diagram For Testing
OUT
PULSE
GENERATOR
RIN
IN
TRIG
50 
DEVICE UNDER
TEST (DUT)
IN
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
TRIG
OSCILLOSCOPE
ROUT
RIN = ROUT = ZLINE
Test Setup
Doc #97028
12/2/2011
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3