AP65552 5A, 18V, 650kHz ADAPTIVE CCM/COT STEP-DOWN CONVERTER Description Pin Assignments The AP65552 is an adaptive, constant on-time mode synchronous buck converter providing high efficiency, excellent transient response and high DC output accuracy for low-voltage regulation in digital TVs and monitors. ( Top View ) The constant-on-time control scheme handles wide input/output voltage ratios and provides low external component count. The internal proprietary circuit enables the device to adopt both low equivalent series resistance (ESR) Output Capacitors, such as SP-CAP or POSCAP and ultra-low ESR ceramic capacitors. The AP65552 features programmable soft-start, UVLO, OTP and OCP to protect the circuit. EN 1 8 VIN FB 2 7 BS VREG5 3 6 SW SS 4 5 GND SO-8EP This IC is available in SO-8EP package. Features Applications Fixed-Frequency Emulated Constant On-Time Control Good Stability Independent of the Output Capacitor ESR Fast Load Transient Response Synchronous Rectification: 65mΩ Internal High-Side Switch and 36mΩ Internal Low-Side Switch Wide Input Voltage Range: 4.5V to 18V Output Voltage Range: 0.76V to 6V 5A Continuous Output Current 650kHz Switching Frequency Built-in Overcurrent Limit Built-in Thermal Shutdown Protection Programmable Soft-Start Pre-biased Start-Up Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) Notes: Gaming Consoles Flat Screen TV Sets and Monitors Set Top Boxes Distributed Power Systems Home Audio Consumer Electronics Network Systems FPGA, DSP and ASIC Supplies Green Electronics 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Typical Applications Circuit INPUT VIN 12V 7 BST 8 IN ON OFF 1 EN 6 SW L1 C5 0.1µF 1.5μH AP65552 R1 8.25kΩ R2 22.1kΩ 2 FB C1 20μF C4 8.2nF 4 SS 5 GND 3 VREG5 OUTPUT VOUT 1.05V C2 44μF C3 1µF Figure 1 Typical Application Circuit AP65552 Document number: DS37306 Rev. 3 - 2 1 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Pin Descriptions Pin Name Pin Number SO-8EP EN 1 FB 2 VREG5 3 SS 4 GND 5 SW 6 BS 7 VIN 8 EP — Function Enable input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator, drive it low to turn off. Pull up with 100kΩ resistor for automatic startup. Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. Internal power supply output pin to connect an additional capacitor. Connect a 1μF (typical) capacitor as close as possible to the VREG5 and GND. This pin is not active when EN is low. Soft-start control input pin. SS controls the soft start period. Connect a capacitor from SS to GND to set the soft-start period. Ground pin is the main power ground for the switching circuit. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch. Bootstrap pin. A bootstrap capacitor is connected between the BS pin and SW pin. The voltage across the bootstrap capacitor drives the internal high-side NMOS switch. A 0.1μF (typical) capacitor is required for proper operation Supply input pin. A capacitor should be connected between the VIN pin and GND pin to keep the DC input voltage constant. Connect the exposed thermal pad to GND on the PCB Functional Block Diagram Figure 2 Functional Block Diagram AP65552 Document number: DS37306 Rev. 3 - 2 2 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Absolute Maximum Ratings (Note 4) (@TA = +25°C, unless otherwise specified.) Symbol VIN Parameter Supply Voltage Unit V VREG5 VREG5 Pin Voltage -0.3V to +6.0 V VSW Switch Node Voltage -1.0 to VIN +0.3 V VBS Bootstrap Voltage -0.3 to VSW +6.0 V VFB Feedback Voltage -0.3V to +6.0 V VEN Enable/UVLO Voltage -0.3V to +6.0 V VSS Soft-Start PIN -0.3V to +6.0 V GND Pin Voltage -0.3 to +0.3 V TST Storage Temperature -65 to +150 °C TJ Junction Temperature +160 °C +260 °C 2 200 kV V VGND Lead Temperature TL ESD Susceptibility (Note 5) HBM Human Body Model MM Machine Model Notes: Rating -0.3 to +20 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance (Note 6) Symbol Parameter θJA Junction to Ambient SO-8EP Rating 39.4 °C/W Unit θJC Junction to Case SO-8EP 8.6 °C/W Recommended Operating Conditions (Note 7) (@TA = +25°C, unless otherwise specified.) Symbol Notes: Min Max Unit VIN Supply Voltage Parameter 4.5 18.0 V TJ Operating Junction Temperature Range -40 +125 °C TA Operating Ambient Temperature Range -40 +85 °C 6. Test condition: SO-8: Device mounted on 2" x 2" FR-4 substrate PC board, 2oz copper with minimum recommended pad layout. 7. The device function is not guaranteed outside of the recommended operating conditions. AP65552 Document number: DS37306 Rev. 3 - 2 3 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Electrical Characteristics Parameter SUPPLY VOLTAGE (VIN PIN) (@TA = +25°C, VIN = 12V, unless otherwise specified.) Symbol Conditions Min — Typ Max Unit 4.5 — 18 V VFB = 0.85V — 0.9 — mA ISHDN VEN = 0V — 3.6 10 μA UVLO Threshold VUVLO VIN Rising Test VREG5 Voltage 3.45 3.75 4.05 V UVLO Hysteresis VHYS VIN Falling Test VREG5 Voltage 0.19 0.32 0.45 V VENH — 1.9 — — V — — — 0.6 V Input Voltage VIN Quiescent Current IQ Shutdown Supply Current UNDERVOLTAGE LOCKOUT ENABLE (EN PIN) EN High-Level Input Voltage EN Low-Level Input Voltage VENL VOLTAGE REFERENCE (FB PIN) Feedback Voltage VFB VOUT = 1.05V 0.753 0.765 0.777 V Feedback Bias Current IFB VFB = 0.8V -0.1 0 0.1 μA VREG5 OUTPUT VREG5 Output Voltage 6.0V<VIN<18V 0<IVREG5<5mA 4.7 5.1 5.5 V Source Current Capability — VIN = 6V, VVREG5 = 4V — 110 — mA Load Regulation — 0<IVREG5<5mA — — 60 mV Line Regulation — 6.0V<VIN<18V IVREG5 = 5mA — — 20 mV VVREG5 MOSFET High-side Switch On-Resistance RDSONH — — 0.065 — Ω Low-side Switch On-Resistance RDSONL — — 0.036 — Ω L=1.5μH 5.6 6.4 7.9 A VIN=12V, VOUT=1.05V — 150 — ns VFB=0.7V — 260 310 ns CURRENT LIMIT High Level Current Limit ILIM-H ON-TIME TIMER On Time Minimum Off Time tON tOFF-MIN THERMAL SHUTDOWN Thermal Shutdown TOTSD — — +160 — °C Thermal Shutdown Hysteresis THYS — — +30 — °C 4.2 6.0 7.8 μA 0.2 — mA SOFT START (SS PIN) Soft-Start Source Current Soft-Start Discharge Current AP65552 Document number: DS37306 Rev. 3 - 2 ISS-SOURCE ISS-DISCHARGE VSS = 1.2V VSS =0.5V 4 of 13 www.diodes.com 0.1 August 2015 © Diodes Incorporated AP65552 Typical Performance Characteristics (@TA = +25°C, VIN = 12V, VOUT = 1.05V, unless otherwise specified.) 85˚C 25˚C -40˚C 85˚C 25˚C -40˚C IO=0A VIN=18V VIN=12V IO=1A VIN=4.5V AP65552 Document number: DS37306 Rev. 3 - 2 5 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Typical Performance Characteristics (continued) (@TA = +25°C, VIN = 12V, VOUT = 1.05V, unless otherwise specified.) VO=1.8V VO=3.3V Vo=5V Vo=3.3V Vo=2.5V Vo=1.8V Vo=1.5V VO=1.05V Vo=1.05V Vo=1.2V VO=3.3V VO=2.5V VO=1.8V AP65552 Document number: DS37306 Rev. 3 - 2 6 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Typical Performance Characteristics (cont.) (@TA = +25°C, VIN = 12V, VOUT = 1.05V, L = 1.5µH, C1 = 20µF, C2 = 44µF, unless otherwise specified.) Steady State Test 5A Startup Through VIN No Load Startup Through VIN 5A Load VIN_AC (500mV/DIV) VIN (12V/DIV) VIN (12V/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (500mA/DIV) IOUT (5A/DIV) SW (10V/DIV) SW (10V/DIV) VOUT_AC (50mV/DIV) IOUT (5A/DIV) SW (5V/DIV) Time-500µs/div Time-1µs/div Startup with VREG5 No Load Shutdown Through VIN No load Time-500µs/div Shutdown Through VIN 5A Load VIN (12V/DIV) VIN (12V/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (500mA/DIV) IOUT (5A/DIV) EN (3V/DIV) VREG5 (5V/DIV) VOUT (500mV/DIV) SW (10V/DIV) SW (10V/DIV) Time-1ms/div Time-50ms/div Startup Through VEN No Load Startup Through VEN 5A Load Time-200µs/div Short Circuit Test VOUT (500mV/DIV) VEN (3V/DIV) VEN (3V/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (500mA/DIV) IOUT (5A/DIV) SW (10V/DIV) SW (10V/DIV) Time-500µs/div Shutdown Through VEN No load IOUT (2A/DIV) Time-500µs/div Time-100µs/div Shutdown Through VEN 5A Load Short Circuit Recovery VEN (3V/DIV) VEN (3V/DIV) VOUT (500mV/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (500mA/DIV) IOUT (5A/DIV) IOUT (2A/DIV) SW (10V/DIV) SW (10V/DIV) Time-20ms/div Time-20ms/div Time-500µs/div 1.05V Load Transient Response Voltage Ripple at Output (IO=2A) Voltage Ripple at Input (IO=2A) VOUT_AC (50mV/DIV) VOUT_AC (20mV/DIV) VIN_AC (100mV/DIV) IOUT (2.5A/DIV) SW (5V/DIV) Time-100µs/div AP65552 Document number: DS37306 Rev. 3 - 2 SW (5V/DIV) Time-400ns/div 7 of 13 www.diodes.com Time-400ns/div August 2015 © Diodes Incorporated AP65552 Application Information R3 VIN 100KΩ EN 1 R1 VOUT EN VIN BS FB 8.25KΩ 3 R2 22.1KΩ C7 4 C5 1µF VREG5 SW SS C4 8.2nF 8 C2 10µF C6 AP65552 2 C1 10µF GND 7 6 0.1µF VOUT 1.5µH L1 5 EP C8 22µF C9 22µF Figure 3. Typical Application of AP65552 PWM Operation and Adaptive On-time Control The AP65552 is synchronous step-down converters with internal power MOSFETs. Adaptive, constant on-time (COT) control is employed to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after an internal one shot timer expires. This one shot is set by the converter input voltage (VIN), and the output voltage (VOUT) to maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The output voltage variation is sensed by FB voltage. The one-shot timer is reset and the high-side MOSFET is turned on again when FB voltage falls below the 0.76V. AP65552 uses an adaptive on-time control scheme and does not have a dedicated in board oscillator. It runs with a pseudo-constant frequency of 650kHz by using the input voltage and output voltage to set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the output voltage. It can be calculated using the following equation: TON VOUT VIN f VOUT is the output voltage VIN is the input voltage f is the switching frequency After an ON-time period, the AP65552 goes into the OFF-time period. The OFF-time period length depends on VFB in most cases. It will end when the FB voltage decreases below 0.76V then the ON-time period is triggered. If the OFF-time period is less than the minimum OFF time, the minimum OFF time will be applied, which is about 260ns typical. Enable Above the ‘EN high-level input voltage’, the internal regulator is turned on and the quiescent current can be measured above this threshold. The enable (EN) input allows the user to control turning on or off the regulator. To enable the AP65552, EN must be pulled above the ‘EN high-level input voltage’ and to disable the AP65552, EN must be pulled below ‘EN low-level input voltage’. In Figure 3, EN has a positive voltage through a 100KΩ pull-up to VIN. No supply input is required for EN. Soft-Start The soft-start time of the AP65552 is programmable by selecting a different CSS value. When the EN pin becomes high, the CSS is charged by a 6μA current source, generating a ramp signal fed into non-inverting input of the error comparator. Reference voltage V REF or the internal soft-start voltage SS, (whichever is smaller), dominates the behavior of the non-inverting inputs of the error amplifier. Accordingly, the output voltage will follow the SS signal and ramp up smoothly to its target level. The capacitor value required for a given soft-start ramp time can be expressed as: t SS CSS VFB ISS Where CSS is the required capacitor between SS pin and GND, tSS is the desired soft-start time and VFB is the feedback voltage. AP65552 Document number: DS37306 Rev. 3 - 2 8 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Application Information (continued) Overcurrent Protection (OCP) Figure 4 shows the overcurrent protection (OCP) scheme of AP65552. In each switching cycle, the inductor current is sensed by monitoring the low-side MOSFET in the OFF period. When the voltage between GND pin and SW pin is smaller than the overcurrent trip level, the OCP will be triggered and the controller maintains the OFF state. A new switching cycle will begin when the measured voltage is larger than the limit voltage. The internal counter is incremented when OCP is triggered. After sixteen sequential cycles, the internal OCL (Overcurrent Logic) threshold is set to a lower level, reducing the available output current. When a switching cycle occurs where the switch current is below the lower OCL threshold, the counter is reset and the OCL limit is returned to a higher value. Because the RDS(ON) of MOSFET increases with temperature, VLimit has xppm/°C temperature coefficient to compensate this temperature dependency of RDS(ON). R S Q Q1 -266mV OC COMPARATOR Q2 Figure 4 Overcurrent Protection Scheme Undervoltage Lockout The AP65552 provides an undervoltage lockout circuit to prevent it from undefined status during startup. The UVLO circuit shuts down the device when VIN drops below 3.45V. The UVLO circuit has 320mV hysteresis, which means the device starts up again when V REG rise to 3.75V(nonlatch). Thermal Shutdown If the junction temperature of the device reaches the thermal shutdown limit of 160°C, the AP65552 shuts itself off, and both HMOS and LMOS will be turned off. The output is discharged with the internal transistor. When the junction cools to the required level (130°C nominal), the device initiates soft-start as during a normal power-up cycle. Setting the Output Voltage The output voltage can be adjusted from 1.000 to 5V using an external resistor divider. Table 1 shows a list of resistor selections for common output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there is less current consumption in the feedback network. However the tradeoff is output voltage accuracy due to the bias current in the error amplifier. R1 can be determined by the following equation: V R1 R2 OUT 1 0.765 Output Voltage (V) 1 1.05 1.2 1.5 1.8 2.5 3.3 5 Figure 5 Feedback Divider Network AP65552 Document number: DS37306 Rev. 3 - 2 R1 (kΩ) 6.81 8.25 12.7 21.5 30.1 49.9 73.2 124 R2 (kΩ) 22.1 22.1 22.1 22.1 22.1 22.1 22.1 22.1 Table 1 Resistor Selection for Common Output Voltages 9 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Application Information (cont.) Inductor Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate the inductor value; L VOUT (VIN VOUT ) VIN ΔIL fSW Where ΔIL is the inductor ripple current. And fSW is the buck converter switching frequency. Choose the inductor ripple current to be 30% of the maximum load current. The maximum inductor peak current is calculated from: IL(MAX) ILOAD ΔIL 2 Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence, choosing an inductor with appropriate saturation current rating is important. A 1µH to 3.3µH inductor with a DC current rating of at least 25% higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor’s DC resistance should be less than 100mΩ. Use a larger inductance for improved efficiency under light load conditions. The phase boost can be achieved by adding an additional feed forward capacitor (C7) in parallel with R1. Output Voltage (V) C7(pF) L1(µH) C8+C9(µF) 1 — 1.0 - 1.5 22-68 1.05 — 1.0 - 1.5 22-68 1.2 — 1.0 - 1.5 22-68 1.5 — 1.5 22-68 1.8 5 - 22 1.5 22-68 2.5 5 - 22 2.2 22-68 3.3 5 - 22 2.2 22-68 5 5 - 22 3.3 22-68 Table 2 Recommended Component Selection Input Capacitor The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor has to sustain the ripple current produced during the on time on the upper MOSFET. It must hence have a low ESR to minimize the losses. The RMS current rating of the input capacitor is a critical parameter that must be higher than the RMS input current. As a rule of thumb, select an input capacitor which has an RMS rating that is greater than half of the maximum load current. Due to large dI/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum must be used, it must be surge protected, otherwise, capacitor failure could occur. For most applications, a ceramic capacitor greater than 10µF is sufficient. Output Capacitor The Output Capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The Output Capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited by the inductor value. AP65552 Document number: DS37306 Rev. 3 - 2 10 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Application Information (cont.) Output Capacitor (cont.) Maximum capacitance required can be calculated from the following equation: ESR of the Output Capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below: Vout capacitor ΔIinductor * ESR An Output Capacitor with ample capacitance and low ESR is the best option. For most applications, a 22µF to 68µF ceramic capacitor will be sufficient. ΔIinductor 2 ) 2 Co (Δ V Vout )2 Vout2 L(Iout Where ΔV is the maximum output voltage overshoot. Bootstrap Capacitor To ensure the proper operation, a ceramic capacitor must be connected between the VBST and SW pin. A 0.1µF ceramic capacitor is sufficient. VREG5 Capacitor To ensure the proper operation, a ceramic capacitor must be connected between the VREG5 and GND pin. A 1µF ceramic capacitor is sufficient. PC Board Layout 1. 2. 3. 4. 5. 6. 7. The AP65552 works at 5A load current, heat dissipation is a major concern in layout the PCB. A 2oz Copper in both the top and bottom layers is recommended. Provide sufficient vias in the thermal exposed pad for heat dissipate to the bottom layer. Provide sufficient vias in the Output Capacitor GND side to dissipate heat to the bottom layer. Make the bottom layer under the device as GND layer for heat dissipation. The GND layer should be as large as possible to provide better thermal effect. Make the Vin capacitors as close to the device as possible. Make the VREG5 capacitor as close to the device as possible. The thermal pad of the device should be soldered directly to the PCB exposed copper plane to work as a heatsink. The thermal vias in the exposed copper plane increase the heat transfer to the bottom layer. Figure 6 PC Board Layout AP65552 Document number: DS37306 Rev. 3 - 2 11 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Ordering Information AP65552 XX - 13 Package Packing SP : SO-8EP 13 : Tape & Reel Part Number Package Code Part Marking Identification Code AP65552SP-13 SP SO-8EP — Tape and Reel Quantity Part Number Suffix 2,500 -13 Marking Information (1) SO-8EP ( Top View ) 8 5 Logo YY : Year : 08, 09,10~ WW : Week : 01~52; 52 represents 52 and 53 week E : SO-8EP Blank SO-8 G : Green X : Internal Code AP65552 YY WW X X E Part No 1 4 Package Outline Dimensions (All dimensions in mm.) Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version. Exposed Pad 8 5 E1 1 H 4 F b Bottom View E 9° (All sides) N 7° A e D A1 AP65552 Document number: DS37306 Rev. 3 - 2 45° Q C 4° ± 3° Gauge Plane Seating Plane E0 SO-8EP (SOP-8L-EP) Dim Min Max Typ A 1.40 1.50 1.45 A1 0.00 0.13 b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85 E0 3.85 3.95 3.90 E1 5.90 6.10 6.00 e 1.27 F 2.75 3.35 3.05 H 2.11 2.71 2.41 L 0.62 0.82 0.72 N 0.35 Q 0.60 0.70 0.65 All Dimensions in mm L 12 of 13 www.diodes.com August 2015 © Diodes Incorporated AP65552 Suggested Pad Layout Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version. X2 Dimensions C X X1 X2 Y Y1 Y2 Y1 Y2 X1 Value (in mm) 1.270 0.802 3.502 4.612 1.505 2.613 6.500 Y C X IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. 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Copyright © 2015, Diodes Incorporated www.diodes.com AP65552 Document number: DS37306 Rev. 3 - 2 13 of 13 www.diodes.com August 2015 © Diodes Incorporated