62H SMT Conversion Test Data

TEST DESCRIPTION
Test Results
LED Degradation
Encoder # 61 –80
Vibration
Encoder # 16 –17- 18
19 –20
Mechanical Shock
Encoder # 16 –17- 18
19 –20
Humidity
Encoder # 21 –22 – 23
24 –25
Thermal Shock
Encoder # 26 –27 – 28
29 –30
Testing Notes
Summary Table
1000 Hours, 85°C, Powered
Pass
2.2k Pull-Ups, Low-Low State
Pass
Per MIL-STD-202, Method 204
Pass
Per MIL-STD-202, Method 213
100g, Half-Sine, 6ms
100g, Sawtooth, 6ms
Pass
Per MIL-STD-202, Method 103B
90-95% Humidity
Pass
Per MIL-STD 202 Method 107
LED Degradation
Periodic readings in mV
Low states A and B outputs
Supply = 5.0V, 2.2K pull-up resistors
Duration:
Completion:
Encoder
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
1000 Hours
8/7/2009
Channel A
Channel B
23
21
22
20
22
20
22
20
22
20
23
21
22
20
22
20
22
20
23
21
22
20
22
20
23
20
22
20
22
20
23
20
23
21
23
20
79
80
23
22
21
20
Vibration & Shock Testing
Initial Output Code
05-15-2009
Logic High (Vout >=3.8V)
Logic Low (Vout <=0.8V)
Switch # 16
Position
1
2
3
4
Channel A
Lead Output
.11
4.93
4.91
.10
Channel A
Lag Output
.12
.11
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
Switch # 17
Position
1
2
3
4
Channel A
Lead Output
.11
4.93
4.91
.10
Channel A
Lag Output
.12
.11
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
Switch # 18
Position
1
2
3
4
Channel A
Lead Output
.13
4.94
4.91
.11
Channel A
Lag Output
.14
.11
4.92
4.92
Channel B
Lead Output
.12
4.93
4.92
.11
Channel B
Lag Output
.13
.12
4.92
4.93
Switch # 19
Position
1
2
3
4
Channel A
Lead Output
.10
4.92
4.91
.12
Channel A
Lag Output
.12
.11
4.91
4.93
Channel B
Lead Output
.12
4.92
4.91
.13
Channel B
Lag Output
.13
.12
4.91
4.92
Switch # 20
Position
1
2
3
4
Channel A
Lead Output
.13
4.94
4.91
.13
Channel A
Lag Output
.12
4.93
4.92
.10
Channel B
Lead Output
.13
4.93
4.92
.12
Channel B
Lag Output
.12
.11
4.92
4.93
Vibration & Shock Profiles
05-15-2009
Output Code After Vibration & Mechanical Shock
08-05-2009
Logic High (Vout >=3.8V)
Logic Low (Vout <=0.8V)
Switch # 16
Position
1
2
3
4
Channel A
Lead Output
.13
4.6
4.7
.14
Channel A
Lag Output
.14
.14
4.8
4.8
Channel B
Lead Output
.12
4.7
4.8
.13
Channel B
Lag Output
.13
.12
4.7
.14
Switch # 17
Position
1
2
3
4
Channel A
Lead Output
.14
4.7
4.8
.13
Channel A
Lag Output
.13
.12
4.7
.14
Channel B
Lead Output
.13
4.9
4.8
.14
Channel B
Lag Output
.14
.14
4.7
.13
Switch # 18
Position
1
2
3
4
Channel A
Lead Output
.12
4.7
4.8
.14
Channel A
Lag Output
.13
.14
4.7
.13
Channel B
Lead Output
.14
4.8
4.8
.14
Channel B
Lag Output
.13
.14
4.9
.14
Switch # 19
Position
1
2
3
4
Channel A
Lead Output
.12
4.7
4.8
.13
Channel A
Lag Output
.13
.12
4.7
.14
Channel B
Lead Output
.13
4.6
4.7
.14
Channel B
Lag Output
.14
.14
4.8
4.8
Switch # 20
Position
1
2
3
4
Channel A
Lead Output
.14
4.8
4.9
.14
Channel A
Lag Output
.13
.13
4.9
4.8
Channel B
Lead Output
.14
4.9
4.9
.14
Channel B
Lag Output
.13
.14
4.8
4.8
Humidity Testing
Initial Output Code
05/15/2009
Logic High (Vout >=3.8V)
Logic Low (Vout <=0.8V)
Switch # 21
Position
1
2
3
4
Channel A
Lead Output
.11
4.93
4.91
.10
Channel A
Lag Output
.12
.11
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
Switch # 22
Position
1
2
3
4
Channel A
Lead Output
.11
4.93
4.91
.10
Channel A
Lag Output
.12
.11
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
Switch # 23
Position
1
2
3
4
Channel A
Lead Output
.13
4.93
4.91
.11
Channel A
Lag Output
.14
.11
4.92
4.92
Channel B
Lead Output
.12
4.93
4.92
.11
Channel B
Lag Output
.13
.12
4.94
4.93
Switch # 24
Position
1
2
3
4
Channel A
Lead Output
.10
4.92
4.91
.12
Channel A
Lag Output
.12
.11
4.91
4.93
Channel B
Lead Output
.12
4.92
4.91
.13
Channel B
Lag Output
.13
.12
4.91
4.92
Switch # 25
Position
1
2
3
4
Channel A
Lead Output
.13
4.94
4.91
.13
Channel A
Lag Output
.12
.13
4.92
4.94
Channel B
Lead Output
.13
4.93
4.92
.12
Channel B
Lag Output
.12
.14
4.92
4.93
Output Code After Humidity
05/15/2009
Logic High (Vout >=3.8V)
Logic Low (Vout <=0.8V)
Switch # 21
Position
1
2
3
4
Channel A
Lead Output
.14
4.8
4.91
.10
Channel A
Lag Output
.14
.14
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
Switch # 22
Position
1
2
3
4
Channel A
Lead Output
.11
4.93
4.91
.10
Channel A
Lag Output
.12
.11
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
Switch # 23
Position
1
2
3
4
Channel A
Lead Output
.13
4.93
4.91
.11
Channel A
Lag Output
.14
.11
4.92
4.92
Channel B
Lead Output
.12
4.93
4.92
.11
Channel B
Lag Output
.13
.12
4.94
4.93
Switch # 24
Position
1
2
3
4
Channel A
Lead Output
.10
4.92
4.91
.12
Channel A
Lag Output
.12
.11
4.91
4.93
Channel B
Lead Output
.12
4.92
4.91
.13
Channel B
Lag Output
.13
.12
4.91
4.92
Switch # 25
Position
1
2
3
4
Channel A
Lead Output
.13
4.94
4.91
.13
Channel A
Lag Output
.12
.13
4.92
4.94
Channel B
Lead Output
.13
4.93
4.92
.12
Channel B
Lag Output
.12
.14
4.92
4.93
Thermal Shock (Environmental) Testing
Initial Output Code
04/27/2009
Logic High (Vout >=3.8V)
Logic Low (Vout <=0.8V)
Switch # 26
Position
1
2
3
4
Channel A
Lead Output
.11
4.93
4.91
.10
04/27/2009
Channel A
Lag Output
.12
.11
4.92
4.93
Switch # 27
Position
1
2
3
4
Channel A
Lead Output
.11
4.93
4.91
.10
Channel A
Lag Output
.12
.11
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
Switch # 28
Position
1
2
3
4
Channel A
Lead Output
.13
4.94
4.91
.11
Channel A
Lag Output
.14
.11
4.92
4.92
Channel B
Lead Output
.12
4.93
4.92
.11
Channel B
Lag Output
.13
.12
4.92
4.93
Switch # 29
Position
1
2
3
4
Channel A
Lead Output
.10
4.92
4.91
.12
Channel A
Lag Output
.12
.11
4.91
4.93
Channel B
Lead Output
.12
4.92
4.91
.13
Channel B
Lag Output
.13
.12
4.91
4.92
Switch # 30
Position
1
2
3
4
Channel A
Lead Output
.13
4.94
4.91
.13
Channel A
Lag Output
.12
.13
4.92
4.93
Channel B
Lead Output
.13
4.93
4.92
.12
Channel B
Lag Output
.12
.13
4.92
4.93
Channel B
Lead Output
.12
4.93
4.92
.10
Channel B
Lag Output
.10
.11
4.91
4.92
OutPut Code After Thermal Shock
05/11/2009
Logic High (Vout >=3.8V)
Logic Low (Vout <=0.8V)
Switch # 26
Position
1
2
3
4
Channel A
Lead Output
.13
4.93
4.91
.13
Channel A
Lag Output
.14
.14
4.92
4.93
Channel B
Lead Output
.13
4.93
4.91
.13
Channel B
Lag Output
.14
.14
4.92
4.93
Switch # 27
Position
1
2
3
4
Channel A
Lead Output
.13
4.93
4.91
.13
Channel A
Lag Output
.14
.14
4.92
4.93
Channel B
Lead Output
.13
4.93
4.91
.13
Channel B
Lag Output
.14
.14
4.92
4.93
Switch # 28
Position
1
2
3
4
Channel A
Lead Output
.10
4.92
4.91
.12
Channel A
Lag Output
.12
.11
4.91
4.93
Channel B
Lead Output
.12
4.92
4.91
.13
Channel B
Lag Output
.13
.12
4.91
4.92
Switch # 29
Position
1
2
3
4
Channel A
Lead Output
.13
4.94
4.91
.13
Channel A
Lag Output
.12
.13
4.92
4.93
Channel B
Lead Output
.13
4.93
4.92
.12
Channel B
Lag Output
.12
.13
4.92
4.93
Switch # 30
Position
1
2
3
4
Channel A
Lead Output
.12
4.92
4.91
.13
Channel A
Lag Output
.13
.12
4.91
4.92
Channel B
Lead Output
.13
4.93
4.92
.12
Channel B
Lag Output
.12
.13
4.92
4.93