Order this document by AN1207/D SEMICONDUCTOR TECHNICAL DATA Prepared by: David Babin and Mark Clark Phase–locked loop (PLL) frequency synthesizers are commonly found in communication gear today. The carrier oscillator in a transmitter and local oscillator (LO) in a receiver are where PLL frequency synthesizers are utilized. In some cellular phones, a synthesizer can also be used to generate 90 MHz for an offset loop. In addition, synthesizers can be used in computers and other digital systems to create different clocks which are synchronized to a master clock. The MC145170 is available to address some of these applications. The frequency capability of the newest version, the MC145170–2, is very broad — from a few hertz to 185 MHz. ADVANTAGES Frequency synthesizers, such as the MC145170, use digital dividers which can be placed under MCU control. Usually, all that is required to change frequencies is to change the divide ratio of the N Counter. Tuning in less than a millisecond is achievable. The MC145170 can generate many frequencies based on the accuracy of a single reference source. For example, the reference can be a low–cost basic crystal oscillator or a temperature–compensated crystal oscillator (TCXO). Therefore, high tuning accuracies can be achieved. Boosting of the reference frequency by 100x or more is achievable. ELEMENTS IN THE LOOP The components used in the PLL frequency synthesizer of Figure 1 are the MC145170 PLL chip, low–pass filter, and voltage–controlled oscillator (VCO). Sometimes a voltage– controlled multivibrator (VCM) is used in place of the VCO. The output of a VCM is a square wave and is usually integrated before being fed to other sections of the radio. The VCM output can be directly used in computers and other digital equipment. The output of a VCO or VCM is typically buffered, as shown. As shown in Figure 2, the MC145170 contains a reference oscillator, reference counter (R Counter), VCO/VCM counter (N Counter), and phase detector. A more detailed block diagram is shown in the data sheet. HF SYNTHESIZER The basic information required for designing a stable high– frequency PLL frequency synthesizer is the frequencies required, tuning resolution, lock time, and overshoot. For the example design of Figure 3, the frequencies needed are 9.20 MHz to 12.19 MHz. The resolution (usually the same as the frequency steps or channel spacing) is 230 kHz. The lock time is 8 ms and a maximum overshoot of approximately 15% is targeted. For purposes of this example, lock is considered to be when the frequency is within about 1% of the final value. HF SYNTHESIZER LOW–PASS FILTER In this design, assume a square wave output is acceptable. To generate a square wave, a MC1658 VCM chip is chosen. Per the transfer characteristic given in the data sheet, the MC1658 transfer function, KVCM, is approximately 1 x 108 radians/second/volt. The loading presented by the MC1658 control input is large; the maximum input current is 350 µA. Therefore, an active low–pass filter is used so that loading does not affect the filter’s response. See Figure 3. In the filter, a 2N7002 FET is chosen because it has very high transconductance (80 mmhos) and low input leakage (100 nA). DIVIDE VALUE REFERENCE OSCILLATOR MC145170 PLL CHIP LOW–PASS FILTER VCO OR VCM Figure 1. PLL Frequency Synthesizer REFERENCE COUNTER (R COUNTER) fR PHASE DETECTOR FROM VCO/VCM BUFFER OUTPUT REFERENCE OSCILLATOR VCO/VCM COUNTER (N COUNTER) TO LOW–PASS FILTER fV MULTIPLYING VALUE Figure 2. Detail of the MC145170 REV 2 1/98 TN98011500 Motorola, Inc. 1998 MOTOROLA AN1207 1 +5V 4.6 MHz 1 – 2 V p–p SOURCE 0.01 µF 1 MΩ PLL FREQUENCY SYNTHESIZER 1 +5V LOW–PASS FILTER 16 0.01 µF 0.01 µF MCU MC145170 C 1.5 kΩ BIAS VCM 1 1 µF 16 47 pF R1 PDout DATA IN ENABLE CLOCK R2 2.4 kΩ +5V 0.01 µF 2N7002 MC1658 1.8 MΩ 0.01 µF 8 0.01 µF 9 8 9 1 MΩ 1 MΩ 0.01 µF 0.01 µF A B MC74HCU04 510 Ω LOW–PASS FILTER OUTPUT MC74HCU04 PULLDOWN BUFFER/FILTER Figure 3. HF Synthesizer AN1207 2 1.8 ζ = 0.1 1.7 0.2 1.6 0.3 0.4 0.5 0.6 0.7 1.5 1.4 θo (t), NORMALIZED OUTPUT FREQUENCY In order to calculate the average divide value for the N Counter, follow this procedure. First, determine the average frequency; this is (12.19 + 9.2)/2 = 10.695 MHz or approximately 10.7 MHz. Next, divide this frequency by the resolution: 10.7 MHz/230 kHz = about 47. Next, reference application note AN535 (see book DL136/D Rev 3 or 4). The active filter chosen takes the form shown in Figure 9 of the application note. This filter is used with the single–ended phase detector output of the MC145170, PDout. The phase detector associated with PDout has a gain Kφ = VDD/4π. For a supply of 5 V, this is 5/4π = 0.398 V/rad. The system’s step response is shown in Figure 4. To achieve about 15% overshoot, a damping factor of 0.8 is used. This causes frequency to settle to within 1% at ωnt = 5.5. The information up to this point is as follows. fref = 230 kHz fVCM = 9.2 to 12.19 MHz; the average is 10.7 MHz, average N = 47 power supply = 5 V for the phase detector KVCM = 1 x 108 rad/s/V overshoot = approximately 15%, yields a damping factor = 0.8 lock time t = 8 ms settling to within 1%, ωnt = 5.5 Kφ or Kp = 0.398 V/rad. From the application note, equation 61, ω n = 5.5/t = 5.5/0.008 = 687.5 rad/s. Equation 59 is R1C = (Kp Kv)/ωn2 N = (0.398 x 1 x 108)/687.52 x 47 = 1.79 Equation 59 is used because of the high–gain FET. Next, the capacitor C is picked to be 1 µF. Therefore, R1 = 1.79/C which is 1.79 MΩ. The standard value of 1.8 MΩ is used for R1. Equation 63 is R2 = (2ζ)/C ωn = (2 x 0.8)/(1 x 10–6 x 687.5) = 2.33 kΩ. A standard value for R2 of 2.4 kΩ is utilized. 1.3 1.2 1.1 1.0 0.9 0.8 0.8 1.0 2.0 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 ωnt 11 12 13 14 Figure 4. Type 2 Second Order Step Response HF SYNTHESIZER PROGRAMMING Programming the MC145170 is straightforward. The three registers may be programmed in a byte–oriented fashion. The registers retain their values as long as power is applied. Thus, usually both the C and R Registers are programmed just once, right after power up. MOTOROLA The C Register, which configures the device, is programmed with $C0 (1 byte). This sets the phase detector to the proper polarity and activates PDout. This also turns off the unused outputs. The phase detector polarity is determined by the filter and the VCM. For this example, the MC1658 data sheet shows that a higher voltage level is needed if speed is to be increased. However, the low–pass filter inverts the signal from the phase detector (due to the active element configuration). Therefore, the programming of the polarity for the phase detector means that the POL bit must be a “1.” The R Register is programmed for a divide value that results in the proper frequency at the phase detector reference input. In this case, 230 kHz is needed. Therefore, with the 4.6 MHz source shown in Figure 3, the R Register needs a value of $000014 (3 bytes, 20 in decimal). The N Register determines the frequency tuned. Tuning 9.2 MHz requires the proper value for N to multiply up the reference of 230 kHz to 9.2 MHz. This is 40 decimal. For 12.19 MHz, the value is 53 decimal. To tune over the range, change the value in the N Register within the range of 40 to 53 with a 2–byte transfer. Table 1 shows the possible frequencies. VHF SYNTHESIZER The MC145170 may be used in VHF designs, also. The range for this next example is 140 to 160 MHz in 100 kHz increments. VHF SYNTHESIZER LOW–PASS FILTER To illustrate design with the doubled–ended phase detector, the φR and φV outputs are used. This requires an operational amplifier, as shown in Figure 5. From the design guidelines shown in the MC145170 data sheet, the following equations are used: KφKVCO N C R1 ωn = (1) ωn R2C (2) 2 where, from the data sheet, the equation for the φR and φV phase detector, V 5 Kφ = DD = = 0.796 V/rad (3) 2π 2π damping factor ζ= ζ = 0.707, Table 1. The HF Oscillator Frequencies N Value Frequency, MHz 40 41 42 43 44 45 46 47 48 49 50 51 52 53 9.20 9.43 9.66 9.89 10.12 10.35 10.58 10.81 11.04 11.27 11.50 11.73 11.96 12.19 EXTRA FILTERING FOR THE HF LOOP When the HF oscillator was built, the proper frequencies could not be tuned. The output of the MC1658 was examined with an oscilloscope and the switching edges were discovered to be “ragged.” That is, the output did not appear to be a square wave with clean transitions. The fin input of the MC145170 is sensitive to 500 mV p–p signals, and the ragged edges were being amplified and counted down by the N Counter. Therefore, the edges needed cleaning up. One method would have been to add a low– pass filter between the MC1658 and MC145170. However, because an additional buffer was needed elsewhere in the circuit, an MC74HCU04 inverter was used in place of the filter. This inverter’s frequency response is low enough to clean up the ragged edges. That is, filtering of the ragged edges occurred, and the output had smoother transitions. As mentioned previously, one of the elements in the inverter package was used to buffer the output of the VCM before feeding it to the outside world. See Figure 3. MOTOROLA ωn = 2πfR 2π x 100 kHz = = 12,566 rad/s 50 50 KVCO = 2π ∆ fVCO 2π x (160 – 140 MHz) = ∆ VVCO 10 – 2 (4) and = 1.57 x 107 rad/s/V (5) The control voltage range on the input to the VCO is picked to be 2 to 10 V. The average frequency = (140 + 160)/2 = 150 MHz. Therefore, the average N = 1500. The above choices for ζ and ωn are rules of thumb that are a good design starting point. A larger ωn value results in faster loop lock times and higher reference frequency VCO sidebands for similar sideband filtering. (See Advanced Considerations.) Choosing C1 to be 4700 pF, R1 is calculated from the rearranged expression for ωn as: K K (0.796 V/rad)(1.57 x 107 rad/s/V) R1= φ VCO = 2 C1ωnN (4700 pF)(12,566 rad/s)2 (1500) = 11.23 kΩ (6) Therefore, chose an 11 kΩ standard value resistor. R2 is determined from: 2ζ (2)(0.707) R2 = = ωnC1 (12,566)(4700 pF) = 23.94 kΩ or 24 kΩ (standard value) (7) VHF SYNTHESIZER EXTRA FILTERING For more demanding applications, extra filtering is sometimes added. This reduces the VCO sidebands caused by a small amount of the reference frequency feeding through the filter. One form of this filtering consists of spitting R1 into two resistors; each resistor is one–half the value of R1, as indicated by R1/2 in Figure 5. Capacitors CC are added from the AN1207 3 4700 pF 24 kΩ 4 x 5.6 kΩ 2 x 1500 pF +5V R1/2 1 MHz Y1 1 R1/2 + 12 V CC 16 20 pF R1/2 1 MΩ – LF351 + R1/2 MC145170 CC 24 kΩ 20 pF 100 pF 4700 pF 8 9 1 kΩ TEST POINT (LOCK DETECT) OUTPUT DATA OUT CLK EN DATA IN +5V +5V 20 nH 1 2 x MV2115 R14 10 kΩ 14 MC1648 7 1000 pF 8 390 pF C5 0.1 µF Figure 5. VHF Synthesizer midpoints to ground to further filter the reference sidebands. The value of CC is chosen so that the corner frequency of this added network does not significantly affect the original loop bandwidth ωB. The rule of thumb for an initial value is CC = 4 / ( R1 ωRC), where ωRC is the filter cutoff frequency. A good value is to choose ωRC to be 10 x ωB, so as to not significantly impact the original filter. ωB = ωn 1 + 2ζ2 + 2 + 4ζ2 + 4ζ4 = 12,566 1 1 = ωRCR14 (258,600)(10 kΩ) (11) = 387 pF ≈ 390 pF 1+(2)(0.707)2+ 2+(4)(0.707)2+ (4)(0.707)4 ωRC = 10 ωB = (10)(25,860) = 258,600 rad/s (9) 4 4 = R1ωRC (11.23 kΩ)(258,600 rad/s) (10) = 1377 pF ≈ 1500 pF There is also a filter formed at the input to the VCO. Again, this should be selected to ensure that it does not significantly affect the loop bandwidth. For this example, the filter is domi- AN1207 4 C5 = (8) = 25,860 rad/s CC = nated by R14 with C5. The capacitance of the varactors (in series with the rest of the circuit) is much smaller than C5 and can therefore be neglected for this calculation. As above, let ωRC = 258,600 rad/s be the cutoff of this filter. R14 is chosen to be 10 kΩ. Therefore, THE VARACTOR The MV2115 was selected for its tuning ratio of 2.6 to 1. The capacitance can be changed from 49.1 pF to 127.7 pF over a reverse bias swing of 2 to 30 volts. Contact your Motorola representative for information regarding the MV2115 varactor diode. For example, three parameters are considered. CT = Nominal capacitance CR = Capacitance ratio fR = Frequency ratio CR= Cvmin = Cvmax Vmax Vmin ρ (12) where ρ = the capacitance exponent MOTOROLA Therefore, 30 CR = 2.6 = 2 fmax = ρ (13) log(2.6) = ρlog(15) (14) ρ = log(2.6)/log(15) = 0.3528 (15) Using the nominal capacitance of 100 pF at 4 volts: 100 pF = Cvmax 10 0.3528 4V (16) 1 = 173 MHz 2π[(19.9 nH)(42.2 pF)]0.5 (22) The frequency ratio is 1.5 to 1 and is impacted by the tuning range of the MV2115 varactor diode used in the tank circuit. Therefore, the required range of 140 to 160 MHz is not limited by this VCO design. A pc board should be used to obtain favorable results with this VHF circuit. The lead lengths in the tank circuit should be kept short to minimize parasitic inductance. The length of the trace from the VCO output to the PLL input should be kept as short as possible. In addition, use of surface–mount components is recommended to help minimize strays. VHF SYNTHESIZER PROGRAMMING 100 pF = 1.382 Cvmax Solving for Cvmax: 100 pF = 72.4 pF 1.382 Solving for Cvmin: 2.6 = Cvmin 49.1 pF (17) Cvmin = (2.6)(49.1 pF) Cvmin = 127.7 pF THE VCO For convenience, the MC1648 VCO is selected. The tuning range of the VCO may be calculated as fmax (Cdmax + Cs)0.5 = fmin (Cdmin + Cs)0.5 (18) where fmin = 1 2π[L(Cdmax + Cs)]0.5 (19) As shown in Figure 8 of the data sheet, the VCO tank circuit is comprised of two varactors and an inductor. Typically, a single varactor might be used in either a series or parallel configuration. However, the second varactor has a two–fold purpose. First, if the 10 kΩ isolating impedance is left in place, the varactors add in series for a smaller capacitance. Second, the added varactor acts to eliminate distortion due to the tank voltage changing. Therefore, with the two varactors in series, Cdmax′ = Cdmax/2. The shunt capacitance (input plus external capacitance) is symbolized by Cs. Therefore, solving for the inductance: L= 1 = 19.9 nH ≈ 20 nH 2 (2πfmin) (Cdmax′ + Cs) (20) The Q of the inductor should be more than 100 for best performance. fmin = 1 = 135 MHz 2π[(19.9 nH)(69.85 pF)]0.5 MOTOROLA (21) Again, programming the three registers of the MC145170 is straightforward. Also, usually both the C and the R Registers are programmed only once, after power up. The C Register configures the device and is programmed with $80 (1 byte). This sets the phase detector to the correct polarity and activates the φR and φV outputs while turning off the other outputs. Like the HF oscillator, the phase detector polarity is determined by how the filter is hooked up and the VCO. The R Register is programmed for a divide value that delivers the proper frequency at the phase detector reference input. In this case, 100 kHz is needed. Therefore, with the 1 MHz crystal shown, the R Register needs a value of $00000A (3 bytes, 10 in decimal). The N Register determines the frequency tuned. To tune 140 MHz, the value required for N to multiply up the reference of 100 kHz to 140 MHz is 1400 decimal. For 160 MHz, the value is 1600 decimal. To tune over the range, simply change the value in the N Register with a 2–byte transfer. ADVANCED CONSIDERATIONS The circuit of Figure 5 may not function at very–high temperature. The reason is that the MC145170 is guaranteed to a maximum frequency of 160 MHz at 85°C. Therefore, there is no margin for overshoot (reference Figure 4) at high temperature. There are two possible solutions: (1) use the MC145170–1 or MC145170–2 which are rated to 185 MHz, or (2) limit the tuning to less than 160 MHz. Operational amplifiers are usually too noisy for critical applications. Therefore, if an active element is required in the integrator, one or more discrete transistors are utilized. These may be FETs or bipolar devices. However, active filter elements are not needed if the VCO loading is not severe, such as is encountered with most discrete VCO designs. Because active elements add noise, some performance parameters are improved if they are not used. On the other hand, an active filter can be used to scale up the VCO control voltage. For example, to tune a wide range, the control voltage may have to range up to 10 V. For a 5 V PLL output, this would be scaled by 2x via use of active elements. Some applications have requirements that must be met in the areas of phase noise and reference suppression. These parameters are in conflict with fast lock times. That is, as lock times are reduced, reference suppression becomes more difficult. Both reference suppression and phase noise are advanced areas that are covered in several publications. As an example, consider that the VCO input voltage range for the above VHF loop was merely picked to be 8 V. Advanced AN1207 5 sidebands appear at 100 kHz as expected, and are 50 dB down. REFERENCES Motorola data sheet MC145170/D Motorola data sheet MC145170–1/D Motorola data sheet MC145170–2/D Motorola application note AN535/D 10 dB PER DIVISION techniques demand a trade off between this voltage range and the spectral purity of the VCO output. This is because the lower the control voltage range, the more sensitive the VCO is to noise coming into its control input. A VCO IC may not offer enough performance for some applications. Therefore, the VCO may have to be designed from discrete components. Figure 6 shows the performance of the VHF Oscillator prototype on a spectrum analyzer. Note that the reference 100 kHz CENTER = 150 MHz, SPAN = 250 kHz 100 kHz Figure 6. VHF Oscillator Performance Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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