HA13561F Combo (Spindle & VCM) Driver ADE-207-182 (Z) 1st Edition July 1996 Description This COMBO Driver for HDD application consists of Sensorless Spindle Driver and BTL type VCM Driver. Bipolar Process is applied and a “Soft Switching Circuit” for less commutation noise and a “Booster Circuit’ for smaller Saturation Voltage of Output Transistor are also implemented. Features • Soft Switching Driver Small Surface Mount Package: FP-80E (QFP80 Pin) Low thermal resistance: 35°C/W with 6 layer multi glass-epoxy board • Low output saturation voltage Spindle 0.8 V Typ (@1.0 A) VCM 0.8 V Typ (@0.8 A) Functions • • • • • • • • • • 1.8 A Max/3-phase motor driver 1.2 A Max BTL VCM Driver Auto retract Soft Switching Matrix Start up circuit Booster Speed Discriminator Internal Protector (OTSD, LVI) POR Power monitor HA13561F TAB OPIN(-) VCTL OPIN(+) RESINH VREF1 RETON RETPOW Vpsv LVI2 RS Pin Arrangement 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 VBST VCMP VCMN BC2 BC1 TAB W RNF PCOMP CT V 1 60 COMPOUT 2 59 NC* 3 58 NC* 4 57 GAIN 5 56 VCMENAB 6 55 7 54 8 53 9 52 10 51 11 50 12 49 13 48 14 47 15 46 16 17 45 POR 44 SPNENAB 18 43 READY 19 42 CLOCK 20 41 CNTSEL TAB Vss LVI1 DELAY COMM POLSEL U C-PUMP CLREF R1 Vpss 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 *NC : No internal connection Please note that there is no isolation check between pin 58 and pin 59 at the testing of this IC. (Top View) 2 TAB HA13561F Pin Description Pin Number Pin Name Function 1 VBST Boosted voltage output to realize the low output saturation voltage 2 VCMP Output terminal on VCM driver 3 VCMN Output terminal on VCM driver 4 BC2 To be attached the external capacitor for booster circuitry 5 BC1 ditto 6 to 15 GND Ground pins 16 W W phase output terminal on spindle motor driver 17 RNF Sensing input for output current on spindle motor driver 18 PCOMP To be attached the external capacitor for phase compensation of spindle motor driver 19 CT To be attached the center tap of the spindle motor for B-EMF sensing 20 V V phase output terminal on spindle motor driver 21 U U phase output terminal on spindle motor driver 22 C-PUMP To be attached the external integral constants for speed control of spindle motor 23 CLREF Reference voltage input for current limiter of spindle motor driver 24 R1 To be attached the external resistor for setting up the oscillation frequency of start-up circuitry and the gain of speed control loop of spindle motor driver 25 Vpss Power supply for spindle motor driver 26 to 35 GND Ground pins 36 VSS Power supply for small signal block 37 LVI1 Sensing input for power monitor circuitry 38 DELAY To be attached the external capacitor to generate the delay time for power on reset signal 39 COMM To be attached the external capacitor for setting up the oscillation frequency 40 POLSEL To be selected the input status corresponding to the pole number of spindle motor 41 CNTSEL To select the count Number of Speed Discriminator 42 CLOCK Master clock input for this IC 43 READY Output of speed lock detector for spindle motor 44 SPNENAB To select the status of spindle motor driver 45 POR Output of power on reset signal for HDD system 46 to 55 GND Ground pins 56 VCMENAB To select the status of VCM driver 57 GAIN To select the Transfer conductance gm of VCM driver 3 HA13561F Pin Description (cont) Pin Number Pin Name Function 58 NC No function 59 NC ditto 60 COMPOUT Comparator output to detect the direction of output current on VCM driver 61 VREF1 Regulated voltage output to be used as reference of peripheral ICs 62 RESINH Used for inhibiting the restart function of the spindle motor driver after power down 63 OPIN (+) Non inverted input of OP.Amp. to be used for filtering the signal on PWMOUT 64 VCTL OP. Amp. output, this signal is used as control signal for VCM driver output 65 OPIN (–) Inverted input of OP.Amp. to be used for filtering the signal on PWMOUT 66 to 75 GND Ground pins 76 LVI2 Sensing input for power monitor circuitry 77 Vpsv Power supply for VCM driver 78 RETPOW Power supply for retract circuitry 79 RETON To be attached the base terminal of external transistor for retracting 80 RS Sensing input for output current on VCM driver 4 HA13561F Block Diagram Vps(+12V) VSS (+5V) VSS C102 Vpss 36 C101 25 19 CT VBST B-EMF AMP. SOFT SWITCHING MATRIX START-UP CIRCUIT COMMUTATION LOGIC RESINH 62 C103 COMM 39 C-PUMP U SPINDLE DRIVER V 21 W 16 22 C2 20 C1 CLREF 23 READY 43 VCTL 64 OPIN(–) 65 OPIN(+) 63 RETPOW SPEED DISCRI. (CNT) 1/32 SPEED READY – + VBST RETRACT DRIVER RETON + VCM DRIVER N – OPAMP. LVI1 Vss (+5V) R101 R102 C109 D2 LVI2 R103 R104 Qret 79 D1 R108 CX RX RL RS COMP 60 OUT COMPARATOR Vps POR Delay GND 37 76 C110 C111 80 POWER MONITOR BOOSTER RNF RS OTSD Vss W 78 3 – + VBST V 77 VCMN Vref1 (=4.6V) NC 59 NC 58 18 VCMP 2 P Vref1 61 GAIN 57 VCM ENAB 56 BC1 5 C104 4 BC2 1 C105 VBST PCOMP Vpsv (D1) CLOCK 42 (5MHz Typ) CNTSEL 41 CURRENT CONTROL CHARGE PUMP R1 R1b 24 R1a 44 SPNENAB POLSEL 40 17 U 38 Vps (+12V) 5 DELAY C106 6 to 15,26 to 35 46 to 55,66 to 75 R105 Vss(+5V) 45 POR (L:RESET) HA13561F Truth Table Table 1 Truth Table (1) SPNENAB Spindle Driver H ON Open Cut off L Braking Table 2 Truth Table (2) VCMENAB VCM Driver H ON L Cut off Table 3 Truth Table (3) OTSD Spindle Driver VCM Driver Retract Driver not Active See table 1 See table 2 Cut off Active Cut off Cut off ON Table 4 Truth Table (4) POLSEL (D1) Comment H — Test Mode Open 1/12 for 8 poles motor L 1/18 for 12 poles motor CNTSEL CNT Rotation Speed (at CLOCK = 5 MHz) H 2605 3,600 rpm Open 2084 4,500 rpm L 1736 5,400 rpm Table 5 Truth Table (5) 6 HA13561F Table 6 Truth Table (6) RESINH Spindle Driver H Inhibiting the restart after power down L Not inhibiting the restart after power down Table 7 Truth Table (7) GAIN VCM Driver H High Gain Mode L Low Gain Mode 7 HA13561F Timing Chart 1. Power on reset (1) Vhys Vsd Vps and VSS t POR tDLY 1.0V MAX 0 Note: 1. t How to determine the threshold Voltage Vsd and the delay time tDLY both are shown in the external components table. 2. Power on reset (2) VPS or VSS tpor ,,,, ,, ,, ,,,, tpor POR <1µs Spindle Driver VCM Driver Retract Driver Note: 2. ON OFF ON OFF Retract driver need B-EMF voltage or another power supply. 8 <1µs Retract HA13561F ,,, , ,, 3. Motor start-up seaquence (a) Timing chart of start-up seaquence SPNENAB Open No+∆No*1 No Rotation Speed Synchronous Driving No–∆No*1 Driving by B-EMF sensing 0 Internal READY READY (Pin 43) tdelay*2 Switching Soft Switching*3 Note *1. Speed lock detection range ∆No is as follows. ∆No =1.2% when CNTSEL=H =1.5% when CNTSEL=Open =1.8% when CNTSEL=L *2. READY output goes to High, if the rotation speed error keeps to be less than ∆No longer time than tdelay. 500 • 107 tdelay= [ms] fclk [Hz] t *3. The turning point of driving mode from switching synchronize to the turning point of READY output from Low to High. (b) Retry circuitry for misstart-up Motor on ,, ,, Driving by B-EMF sensing Synchronous driving (not stop) (Motor stop) (Motor off) Motor stop detector The HA13561F has the motor stop detector as shown hatching block. This function is monitoring the situation of the motor while the motor is running by B-EMF sensing. If the motor will be caused a misstarting up, the motor will be automatically restarted within 200 ms after the motor stopped. This function increase the reliability for the motor starting up. 9 HA13561F 4. Braking & Shut down the Spindle Driver ,, Open SPNENAB ON Note: > 20µs CUT OFF ,, Open BRAKING CUT OFF The SPNENAB should be selected the open state after braking to reduce the supply current from Vps and V SS . 5. Start-up of the Spindle motor , Open SPNENAB COMM tCOMM (see External Components Table) Vth1 Vth2 GND IU SOURCE 0 SINK IV SOURCE 0 SINK SOURCE IW 0 Synchronous Driving for motor start up not detecting the B-EMF detecting the B-EMF 10 16TCOMM 16TCOMM 14TCOMM 12TCOMM 10TCOMM 8TCOMM 6TCOMM 4TCOMM 4TCOMM 4TCOMM 4TCOMM 4TCOMM 2TCOMM SINK Driving by B-EMF sensing HA13561F 6. Acceleration and Running the spindle motor + UBEMF 0 – + VBEMF 0 – + WBEMF 0 – (1) Acceleration(switching mode) SOURCE Iu 0 SINK SOURCE Iv 0 SINK SOURCE Iw 0 SINK (2) Running (soft switching mode) SOURCE Iu 0 SINK SOURCE 0 SINK SOURCE Iw 0 SINK Iv 11 HA13561F Application VPS (+12V) 5 BC1 Vpss 25 C104 C101 4 BC2 C105 CT 19 1 VBST C103 39 COMM U 21 23 CLREF R1b R1a 24 R1 C2 HA13561F R2 V 20 22 C-PUMP C1 W 16 40 POLSEL RNF RNF 17 41 CNTSEL C110 43 READY PCOMP 18 42 CLOCK 44 SPNENAB C111 Vpsv 77 56 VCMENAB C109 R103 57 GAIN RETPOW 78 62 RESINH D2 RETON 79 RWMIN R5 R8 R7 61 VREF1 R108 65 OPIN(–) VCMP 2 R6 R3 C3 RS 64 VCTL 63 OPIN(+) R4 VCMN 3 C4 CX 60 COMPOUT C102 R105 VSS (+5V) RX 36 VSS RS 80 LVl2 76 45 POR R102 R104 D1 C5 R101 Qret 38 DELAY LVl1 37 GND C106 12 RL HA13561F External Components Parts No. Recommended Value Purpose Note R1a (R1a + R1b) ≥ 10 kΩ V/I converter 1, 4, 6 R1b (R1a + R1b) ≥ 10 kΩ R2 — Integral constant 3 R3 to R8 — PWM filter 9 R101, R102 — Setting of LVI1 voltage 7 R103, R104 — Setting of LVI2 voltage 7 R105 5.6 kΩ Pull up R108 — Limitation for Retract current 12 RS 1.0 Ω Current sensing for VCM Driver 10 Rnf — Current sensing for Spindle Driver 1 RX — Reduction for gain peaking 11 C1, C2 — Integral constant 3 C3 to C6 — PWM filter 9 CX — Reduction for gain peaking 11 C101 ≥ 0.1 µF Power supply by passing C102 ≥ 0.1 µF Power supply by passing C103 — Oscillation for start-up C104 0.22 µF for booster C105 2.2 µF for booster C106 — Delay for POR C109 ≥ 0.1 µF Power supply by passing C110, C111 0.33 µF Phase compensation Qret — Retract Driver 12 D1 — Protection for Qret 12 D2 TBD Protection for parasitic phenomena 6 8 Notes: 1. Output maximum current on spindle motor driver Ispnmax is determined by following equation. R1b V Ispnmax = • R1 [A] R1a + R1b RNF (1) where, V R1: Reference Voltage on Pin 24 [V] (= 1.3) 2. Input clock frequency fclk on pin 42 is determined by following equation. 4 fclk = • NO • P • D1 • (CNT – 0.5) [Hz] 5 where, NO: Standard rotation speed [rpm] P: Number of pole D1: Dividing ratio on divider 1 13 (2) HA13561F D1 = 1/12 (when Pin 40 = Open) for 8 pole motor = 1/18 (when Pin 40 = Low) for 12 pole motor CNT:Count number on speed discriminator CNT = 2605 (when Pin 41 = High) = 2084 (when Pin 41 = Open) = 1736 (when Pin 41 = Low) 3. Integral constants R2, C1 and C2 can be designed as follows. NO 1 ωO = •2•π• [rad/s] 60 10 R2 = C1 = 1 Rnf • J • ωO • NO • (R1a + R1b) • 9.55 VR1 • KT • Gctl 1 10 • ωO • R2 C2 = 10 • C1 (3) [Ω] (4) [F] (5) [F] (6) where, J: Moment of inertia [kg•cm•s2] KT: Torque constant [kg•cm/A] Gctl: Current control amp gain from pin 22 to pin 17 (= 0.5) 4. It is notice that rotation speed error Nerror is caused by leak current Icer2 on pin 22 and this error depend on R1a and R1b as following equation. (R1a + R1b) Nerror = Icer2 • • 100 [%] VR1 (7) where, Icer2: Ieak current on pin 22 [A] 5. Oscillation period tCOMM on pin 39 which period determine the start up characteristics, is should be chosen as following equation. 1 1 J J tCOMM = • to • [s] P • KT • Ispnmax P • KT • Ispnmax 8 4 (8) 6. The capacitor C103 on pin 39 can be determined by tCOMM and following equation. VR1 tCOMM 1 C103 = • • [F] R1a + R1b VthH – VthL 4 (9) where, Vth H : Threshold voltage on start up circuit [V] (= 2.0) Vth L: Threshold voltage on start up circuit [V] (= 0.5) 7. LVI operatig voltage Vsd1, Vsd2 and its hysteresis voltage Vhys1, Vhys2 can be determined by following equations. for VSS Vsd1 = 1 + Vhys1 = 1 + R101 • Vth4 R102 R101 R102 • Vhyspm [V] (10) [V] (11) 14 HA13561F for Vps Vsd2 = 1 + Vhys2 = 1 + R103 • Vth3 R104 R103 R104 • Vhyspm [V] (12) [V] (13) where, Vth3, Vth4: Threshold voltage on pin 37 and pin 76 [V] (= 1.39) Vhyspm: Hysteresis voltage on pin 37 and pin 76 [mV] (= 40) Shut down voltage Vsd1, Vsd2 can be designed by the following range. Vsd1 ≥ 4.25 [V], Vsd2 ≥ 10 [V] 8. The delay time tDLY of POR for power on reset is determined as follows. C106 • Vth5 tDLY = [s] ICH3 (14) where, Vth4: Threshold voltage on pin 38 [V] (= 1.4) I CH3: Charge current on pin 38 [µA] (= 10) 9. The differential voltage (Vctl – V REF1) using for control of VCM driver depend on PWMDAC inputs LSB, MSB as follows. D – 50 R6 Vctl – VREF1 = 2 • VREF1 • PWM • • HFLT(s) 100 R5 (15) where, DPWM: Duty cycle on PWMIN [%] HFLT(S): Transfer function from pin 62 (PWMOUT) to pin 64 (Vctl) as shown in equation (17) To be satisfied with above equation (15), it is notice that the ratio of R6 to R7 must be choosen as shown below. R8 R6 1 =2• • R7 R5 1 – R6 R5 (16) HFLT(s) 1 = 1 + s • C5 • R// – C3 • (R// + R3) • R6 + C4 • (R// + R3 + R4) R5 2 + s • C5 • C4 • R// • (R3 + R4) – C5 • C3 • R// • R3 • R6 + C3 • C4 • R4 • (R// + R3) R5 + s3 • C3 • C4 • C5 • R// • R3 • R4 (17) R// = where, R7 • R8 R7 • R8 (18) If you choose the R// << R3, then equation (17) can be simplified as following equation. 1 1 HFLT(s) = • 2 s 1+ 1 +2 • ζ • s + s ωO ωn ωn (19) 15 HA13561F where, ωO = 1 C5 • R// ωn = ζ= (20) 1 C3 • C4 • R3 • R4 (21) R6 C4 • (R3 + R4) – C3 • R3 • R5 2 • C3 • C4 • R3 • R4 (22) 10. The relationship between the output current Ivcm and the input voltage (Vctl – V REF1) on VCM driver is as follows. Ivcm(s) = Vctl – VREF1 • Kvcm • 1 • Hvcm(s) Rs (23) where, Vctl: VREF1: Kvcm: Input control voltage for VCM driver on pin 64 [V] Reference voltage on pin 61 [V] (= 4.6) DC gain of VCM driver (= 1.82 for High gain mode) (= 0.45 for Low gain mode) Hvcm(s): Transfer function of VCM driver as shown following equation 1 Hvcm(s) = s s 2 1 + 2 • ζVCM • ω + ω VCM VCM (24) where, ωVCM = ζVCM = ωP • 1 2 Rs Lm • 1+ (25) RL Rs • 1 ωP • Rs Lm (26) where, ωp: Bandwidth of internal power amplifiers for VCM driver [rad/s] (= 3•π•106) Lm: Inductance of the VCM coil [H] RL: Resistance of the VCM coil [Ω] and from above equations the -3 dB bandwidth f VCMC of VCM driver is as following equation. fVCMC = ωVCM 2•π • 1 – 2 • ζVCM2 + 2 • ζVCM2 – 1 2 +1 (27) 16 HA13561F 11. The frequency response of VCM driver maybe have a gain peaking because of the resonation of the motor coil impedance. If you want to tune up for this characteristics, you can reduce the peaking by additional snubber circuit R X and CX as follows. BTL Driver + – N R3 RX CX Coil RS 1/2 VPS RS R3 – + P Figure 1 VCM Driver Block Diagram 20 10 Normal IO 0 (dB) –10 CX = 0.22µF RX = 560Ω –20 100 1k 10k 100k Frequency (Hz) (for example) RL = 14.7 Ω, RS = 1 Ω, L = 1.7 mH, Gain = L 12. The retract current Iret is determined by following equation. Vretpow – Vsat(Qret) – VF(D1) – VsatVL Iret = R108 + Rs + RL where, Vretpow: Applied voltage on pin 78 [V] Vsat (Qret): Saturation voltage of Qret [V] VF (D1): Foward voltage of D1 [V] 17 (28) HA13561F Absolute Maximum Ratings (Ta = 25°C) Item Symbol Rating Unit Notes Power supply voltage Vps +15 V 1 Signal supply voltage VSS +7 V 2 Input voltage VIN VSS V 3 Output current-Spindle Iospn (Peak) 1.8 A Iospn (DC) 1.2 A Iovcm (Peak) 1.2 A Iovcm (DC) 0.8 A Power dissipation PT 5 W Junction temperature Tj +150 °C Storage temperature Tstg –55 to +125 °C Output current-VCM Notes: 1. 2. 3. 4. 5. Operating voltage range is 10.2 V to 13.8 V. Operating voltage range is 4.25 V to 5.75 V Applied to Pin 40, 41, 42, 44, 56, 57 and pin 62 Operating junction temperature range is Tjop = 0°C to +125°C ASO of upper and lower power transistor are shown below. Operating locus must be within the ASO. 6. The OTSD (Over Temperature Shut Down) function is built in this IC to avoid same damages by over heat of this chip. However, please note that if the junction temperature of this IC becomes higher than the operating maximum junction temperature (Tjopmax = 125°C), the reliability of this IC often goes down. 7. Thermal resistance: θj-a ≤ 35°C/W with 6 layer multi glass-epoxy board. IC (A) 10 t=10ms t=50ms t=100ms 1.8 1 0.1 1 15 10 VCE (V) 100 Figure 2 ASO of Output Stages (Spindle) 18 HA13561F IC (A) 10 t=10ms t=50ms t=100ms 1.2 1 0.1 1 15 10 VCE (V) 100 Figure 3 ASO of Output Stages (VCM) 19 HA13561F Electrical Characteristics (Ta = 25°C, Vps = 12 V, VSS = 5 V) Item Applicable Pins Note Symbol Min Typ Max Unit Test Conditions I SS0 — 5.8 7.0 mA SPNENAB = Open 36 VCMENAB = L I SS1 — 21 27 mA SPNENAB = H VCMENAB = H Ips0 — 1.7 2.2 mA SPNENAB = Open 25, 77 VCMENAB = L Ips1 — 19 24 mA SPNENAB = H VCMENAB = H — — 0.8 V 2.0 — — V Input low current I IL1 — — ±10 µA Input = GND Input high current I IH1 — — ±10 µA Input = 5.0 V Logic input 2 Input low voltage VIL2 (CLOCK) — — 0.8 V 3.5 — — V Input low current I IL2 — –180 –260 µA Input = GND Input high current I IH2 — 230 330 µA Input = 5.0 V Logic input 3 Input low voltage VIL3 (VCMENAB) — — 0.8 V 2.0 — — V Input low current I IL3 — — ±10 µA Input = GND Input high current I IH3 — — 330 µA Input = 5.0 V Logic input 4 Input low voltage VIL4 (SPNENB) — — 1.0 V Supply current for VSS for Vps Logic input 1 Input low voltage VIL1 (GAIN) (RESINH) Input high voltage Input high voltage Input high voltage VIH1 VIH2 VIH3 42 56, 59 44 VIM4 2.0 — 3.1 V Input high voltage VIH4 3.9 — — V Input low current I IL4 –75 –105 –150 µA Input = GND Input high current 75 105 150 µA Input = 5.0 V 20 25, 77 57, 62 Input middle voltage I IH4 36 HA13561F Electrical Characteristics (Ta = 25°C, Vps = 12 V, VSS = 5 V) (cont) Item Symbol Min Logic input 4 Input dead (SPNENB) current I DEAD Logic input 5 Input low voltage VIL5 (POLSEL) (CONTSEL) Spindle driver Test Conditions Max Unit — — ±10 µA 44 — — 1.0 V 40, 41 Input middle voltage VIM5 2.0 — 3.1 V Input high voltage VIH5 3.9 — — V Input low current I IL5 –38 –53 –75 µA Input = GND Input high current 38 53 75 µA Input = 5.0 V Total saturation Vsatspn — voltage 0.8 1.1 V Ispn = 1.0 A — — 0.5 V Ispn = 0.35 A I IH5 Applicable Pins Note Typ 16, 20, 21 Saturation at braking Vbreak — — 0.7 V Ibreak = 0.6 A Leak current Icer1 — — ±2.0 mA SPNENAB = Open Current limiter reference voltage VOCL 430 480 530 mV VCLREF = 500 mV RNF = 1.0 Ω 17 Control amp gain Gctl — –2 ±2 dB RNF = 1.0 Ω 17, 22 B-EMF amp. Input sensitivity Vmin — 100 — mVp-p Charge pump Reference voltage VR1 1.06 1.17 1.28 V Charge current I CH1 40 45 50 µA Discharge current I DIS1 –40 –45 –50 µA Leak current Icer2 — — ±50 nA Speed discri Operating frequency fclk — — 8.0 MHz 42 Start up circuit Vth H 1.6 1.8 2.0 V 24, 39 Vth L 0.3 0.5 0.7 V Charge current I CH2 21 23 26 µA Discharge current I DIS2 –19 –22 –25 µA Threshold voltage 21 16, 20, 21 R1a + R1b = 24 Ω 22, 24 C-PUMP = 1.0 V R1a + R1b = 24 kΩ COMM = 1 V 1 HA13561F Electrical Characteristics (Ta = 25°C, Vps = 12 V, VSS = 5 V) (cont) Symbol Min Typ Max Unit Test Conditions Applicable Pins Note Output high voltage Vohr VSS – 0.4 — VSS V I O = –1 mA 43 Output low voltage Volr — — 0.4 V I O = 1 mA Total saturation Vsatvcm — voltage 0.8 1.1 V Ivcm = 0.8 A — 0.4 0.55 V Ivcm = 0.4 A Item READY VCM driver Output leak current Icer3 — — ±2 mA Vce = 15 V Total output offset voltage Voff(H) — — ±20 mV VCTL = OP (–) VREF = OP (+) 2, 80 Voff(L) — — ±10 mV Output quiescent voltage Vqvcm 5.6 6.0 6.4 V RL = 10 Ω RS = 1.0 Ω 2, 3 Total Gain Bandwidth B — 26 — kHz RS = 1.0 Ω, RL = 28 Ω 2, 3 — 50 — kHz RS = 1.0 Ω, RL = 14 Ω gm (H) — 1.74 ±5% A/V Higain-mode RS = 1.0 Ω, RL = 14 Ω gm (L) — 0.44 ±5% A/V Logain-mode RS = 1.0 Ω, RL = 14 Ω — — V Ireton = 0.1 mA Transfer gain Retract driver Retpow voltage Vretpow 0.8 OP Amp 2, 3 2, 64, 80 78 Retout sink current Ireton 5 8 — mA Vretpow = 4.0 V Output leak current Icer4 — — ±10 µA Vreton = 15 V, Vretpow = 15 V 79 Low side saturation voltage VsatVL 0.1 0.23 0.35 V Iret = 0.1 A 3 Input current Iinop — — ±500 nA Input offset voltage Vosop — — (±7) mV Common mode input voltage range Vcmop 0 — Vps V – 0.2 Output high voltage Vohop Vps – 1.3 — — 22 V 1 63, 65 1 Iout = 1.0 mA 64 HA13561F Electrical Characteristics (Ta = 25°C, Vps = 12 V, VSS = 5 V) (cont) Item Symbol Min Typ Max Unit Test Conditions Applicable Pins Note Iout = 1.0 mA 64 OP Amp Output low voltage Volop — — 1.1 V Comparator Input sensitivity Vmin2 ±9 0 — mV Output low voltage Volcp — — 0.4 V I O = 1 mA Output high voltage Vohcp VSS – 1.8 — VSS V I O = 1 mA Output voltage Vref1 — 4.6 ±3% V I O = 20 mA Output resistance Ro1 — — 5.0 Ω I O = 20 mA Threshold voltage Vth3 — 1.39 +3% –2% V VSS = 5 V Hysteresis Vhyspm 25 1 40 55 mV VSS = 5 V Threshold voltage Vth4 1.38 +3% –2% V VSS = 4 V Hysteresis Vhyspm 25 2 40 55 mV VSS = 4 V Output low voltage VOL2 — — 0.4 V I O = 1 mA VOL3 — — 0.4 V I O = 1 mA VSS = Vps = 1.0 V Output leak current Icer5 — — ±10 µA Vpor = 7 V Threshold voltage Vth5 — 1.4 ±5% V Charge current I CH3 — 12 ±25% µA Discharge current I DIS3 10 — — mA Operating temperature Tsd 125 150 — °C 1 Hysteresis Thys — 25 — °C 1 Vref1 Power monitor POR OTSD — 2, 3, 60 60 61 76 2 37 2 45 38 Notes: 1. Design guide only. 2. Variations of threshold voltage Vth3 and Vth4 depending on the power supply V SS are shown in Figure.4. 23 Threshold voltage Vth3, Vth4 (V) HA13561F 1.42 1.41 1.40 Test condition of Vth3 1.39 1.38 Test condition of Vth4 1.37 1.36 1.35 1.34 1.33 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.0 Power supply VSS (V) Figure 4 24 HA13561F Package Dimensions Unit: mm 17.2 ± 0.3 14 60 41 40 0.65 17.2 ± 0.3 61 80 21 1 0.17 ± 0.05 3.05 Max +0.20 –0.16 2.70 0.13 M 1.60 0–5° 0.10 0.10 0.30 ± 0.10 20 0.8 ± 0.3 Hitachi code EIAJ code JEDEC code 25 FP-80E — — Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. 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Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.