HAT2028R, HAT2028RJ Silicon N Channel Power MOS FET High Speed Power Switching REJ03G1163-0500 (Previous: ADE-208-524C) Rev.5.00 Sep 07, 2005 Features • • • • For Automotive Application (at Type Code “J”) Low on-resistance Capable of 4 V gate drive High density mounting Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 <FP-8DAV> ) 7 8 D D 65 87 2 G 12 4 G 1, 3 2, 4 5, 6, 7, 8 34 S1 MOS1 Rev.5.00 Sep 07, 2005 page 1 of 7 5 6 D D S3 MOS2 Source Gate Drain HAT2028R, HAT2028RJ Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Symbol VDSS Value 60 Unit V VGSS ID ±20 4 V A 32 4 A A — 4 — A Note 4 — 1.37 — mJ Pch Note 3 Pch Note 2 2 3 W W Tch Tstg 150 –55 to +150 °C °C ID (pulse) IDR Avalanche current HAT2028R HAT2028RJ IAP Avalanche energy HAT2028R HAT2028RJ EAR Channel dissipation Channel dissipation Channel temperature Storage temperature Notes: 1. 2. 3. 4. Note 1 Note 4 PW ≤ 10 µs, duty cycle ≤ 1% 1 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s 2 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s Value at Tch = 25°C, Rg ≥ 50 Ω Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min 60 Typ — Max — Unit V Test Conditions ID = 10 mA, VGS = 0 Gate to source breakdown voltage Gate to source leak current V (BR) GSS IGSS ±20 — — — — ±10 V µA IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 Zero gate voltage drain current HAT2028R HAT2028RJ IDSS IDSS — — — — 1 0.1 µA µA VDS = 60 V, VGS = 0 Zero gate voltage drain current HAT2028R HAT2028RJ IDSS IDSS — — — — — 10 µA µA VDS = 48 V, VGS = 0 Ta = 125°C Gate to source cutoff voltage Static drain to source on state resistance VGS (off) RDS (on) 1.3 — — 0.08 2.3 0.1 V Ω VDS = 10 V, ID = 1 mA Note 5 ID = 2 A, VGS = 10 V Forward transfer admittance RDS (on) |yfs| — 3.3 0.12 5 0.16 — Ω S ID = 2 A, VGS = 4 V Note 5 ID = 2 A, VDS = 10 V Input capacitance Output capacitance Ciss Coss — — 280 150 — — pF pF Reverse transfer capacitance Turn-on delay time Crss td (on) — — 55 15 — — pF ns VDS = 10 V VGS = 0 f = 1 MHz tr 100 35 — — ns ns Rise time Turn-off delay time td (off) — — Fall time Body-drain diode forward voltage tf VDF — — 45 0.88 — 1.15 ns V trr — 40 — ns Body-drain diode reverse recovery time Note: 5. Pulse test Rev.5.00 Sep 07, 2005 page 2 of 7 Note 5 VGS = 4 V, ID = 2 A, VDD ≅ 30 V IF = 4 A, VGS = 0 IF = 4 A, VGS = 0 diF/dt = 50 A/µs Note 5 HAT2028R, HAT2028RJ Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating 100 3.0 ive ive Op er ion at 1.0 Dr er Op 1 0 Drain Current Dr 2.0 0 50 10 µs 30 ID (A) Test Condition: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s 2 Channel Dissipation Pch (W) 4.0 at ion 10 10 DC 3 1 0.1 Ambient Temperature = 1m 10 at Operation in this area is limited by RDS (on) 0.3 ion s s ms (P W 0.3 1 3 10 Drain to Source Voltage Ta (°C) 0µ No ≤1 0 te 6 s) Ta = 25°C 1 shot Pulse 1 Drive Operation 0.01 0.1 200 150 Op er 0.03 100 PW 30 100 VDS (V) Note 6: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) Typical Transfer Characteristics Typical Output Characteristics 8V –25°C (A) 5V 6V 16 20 Pulse Test 4.5 V 16 Tc = 75°C 25°C ID 10 V 12 12 4V 3.5 V 8 3V 4 Drain Current Drain Current ID (A) 20 8 4 VDS = 10 V Pulse Test VGS = 2.5 V 0 0 0 2 4 6 Drain to Source Voltage 8 10 0 0.4 0.3 0.2 ID = 2 A 1A 0.1 0.5 A 0 0 2 4 6 Gate to Source Voltage Rev.5.00 Sep 07, 2005 page 3 of 7 8 10 VGS (V) 6 8 10 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Voltage VDS (on) (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Pulse Test 4 Gate to Source Voltage VDS (V) 0.5 2 1 Pulse Test 0.5 0.2 VGS = 4 V 0.1 10 V 0.05 0.02 0.01 0.1 0.2 0.5 1 Drain Current 2 ID (A) 5 10 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) (Ω) HAT2028R, HAT2028RJ 0.25 Pulse Test 0.20 ID = 0.5 A, 1 A, 2 A 0.15 VGS = 4 V 0.10 0.5 A, 1 A, 2 A 0.05 10 V 0 –40 0 40 80 Case Temperature 120 Tc 160 20 Tc = –25°C 10 25°C 5 75°C 2 1 0.5 VDS = 10 V Pulse Test 0.2 0.2 5 1000 Capacitance C (pF) 200 100 50 20 10 di / dt = 50 A / µs VGS = 0, Ta = 25°C Ciss 200 100 Coss 50 Crss 10 0.2 0.5 1 2 5 0 10 10 20 30 40 50 Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 60 VDS 40 12 VDD = 10 V 25 V 50 V 8 VGS 20 4 VDD = 50 V 25 V 10 V 0 2 4 Gate Charge Rev.5.00 Sep 07, 2005 page 4 of 7 6 8 Qg (nc) 0 10 1000 Switching Time t (ns) 16 80 VGS (V) Reverse Drain Current IDR (A) ID = 4 A 0 20 20 20 100 10 VGS = 0 f = 1 MHz 500 Gate to Source Voltage Reverse Recovery Time trr (ns) 2 Typical Capacitance vs. Drain to Source Voltage 500 5 0.1 VDS (V) 1 Drain Current ID (A) (°C) Body-Drain Diode Reverse Recovery Time Drain to Source Voltage 0.5 300 tr 100 tf 30 td(off) td(on) 10 3 1 0.1 VGS = 4 V, VDD = 30 V PW = 3 µs, duty ≤ 1 % 0.2 0.5 1 Drain Current 2 ID (A) 5 10 HAT2028R, HAT2028RJ Repetitive Avalanche Energy EAR (mJ) Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) 20 16 VGS = 5 V 12 0, –5 V 8 4 Pulse Test 0 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 Maximum Avalanche Energy vs. Channel Temperature Derating 2.5 IAP = 4 A VDD = 25 V L = 100 µH duty < 0.1 % Rg ≥ 50 Ω 2.0 1.5 1.0 0.5 0 25 50 75 100 125 Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) 10 1 D=1 0.5 0.1 0.2 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 lse 0.001 D= PDM u tp ho 1s 0.0001 10 µ PW T PW T 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Normalized Transient Thermal Impedance γ s (t) Pulse Width PW (S) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) 10 1 D=1 0.5 0.1 0.2 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 166°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 0.0001 10 µ 1s ho t ls pu 100 µ PW T PW T 1m 10 m 100 m 1 Pulse Width PW (S) Rev.5.00 Sep 07, 2005 page 5 of 7 D= PDM e 0.001 150 Channel Temperature Tch (°C) VSD (V) 10 100 1000 10000 HAT2028R, HAT2028RJ Avalanche Test Circuit Avalanche Waveform L VDS Monitor 1 • L • IAP2 • 2 EAR = VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDD D.U.T VDS ID Vin 15 V 50 Ω 0 VDD Switching Time Test Circuit Switching Time Waveform 90% Vout Monitor Vin Monitor D.U.T. Vin 10% RL Vout Vin 4V 50 Ω VDD = 30 V 10% 90% td(on) Rev.5.00 Sep 07, 2005 page 6 of 7 10% tr 90% td(off) tf HAT2028R, HAT2028RJ Package Dimensions JEITA Package Code RENESAS Code P-SOP8-3.95 × 4.9-1.27 PRSP0008DD-D Package Name FP-8DAV 0.085g F *1 D MASS[Typ.] bp 1 c *2 E Index mark HE 5 8 4 Z Terminal cross section (Ni/Pd/Au plating) *3 bp x M NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. e Reference Symbol L1 Dimension in Millimeters Min Nom Max D 4.90 5.3 E 3.95 A2 A1 0.10 0.14 0.25 0.34 0.40 0.46 0.15 0.20 0.25 1.75 A A bp A1 b1 c L c1 0° y HE Detail F 5.80 e 8° 6.10 6.20 1.27 x 0.25 y 0.1 Z 0.75 L L1 0.40 0.60 1.27 1.08 Ordering Information Part Name HAT2028R-EL-E HAT2028RJ-EL-E Quantity 2500 pcs 2500 pcs Shipping Container Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.5.00 Sep 07, 2005 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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