IS32LT3180 DUAL INTENSITY, LINEAR CURRENT DRIVER FOR RCL Preliminary Information December 2014 GENERAL DESCRIPTION FEATURES The IS32LT3180 is an eight channel linear current regulator for automotive rear tail light applications such as RCL (Rear Combination Lamps) and CHMSL (Center High Mounted Stop Lamps). It is fully programmable with two LED brightness levels for the different intensity requirements of “stop” bright (DC mode) and “tail” dim (PWM mode). A logic level at the PWM pin is used to select between the tail and stop output conditions. The stop condition provides the highest intensity output, while the tail condition utilizes an internally generated PWM signal to reduce the intensity of the LEDs’ light output. The sink current at the OUTx pins is easily set with a single resistor at the STOP pin. A second resistor at the TAIL pin sets the duty cycle of the internal PWM oscillator for dimming (less bright) the LED output when operating in the tail condition. An external FET (optional) can be implemented for operation with wide varying supply voltages. Output current programmable from 10mA to 75mA Tail duty cycle programmable from 1% to 95% Linear voltage regulator to optimize consumption on device Low dropout voltage of 0.8V@35mA Slew rate control on each output for better EMI performance PWM logic level input selects between full brightness and PWM dimming levels FAULT reporting LED open/short circuit detection Input overvoltage protection STOP pin overcurrent protection Thermal rollback of output current Withstand 50V load dump AEC-Q100 qualification (pending) APPLICATIONS The IS32LT3180 is offered in an eTSSOP-16 package. Rear Combinational Lamp (RCL) Center High Mount Stop Light (CHMSL) Daytime running lamp Fog lamps Turn signal TYPICAL APPLICATION CIRCUIT 1k VSTRING Q1 TAIL 0.1 F RGS 1k STOP 50 3 220nF 10k 2 ERC VCC CVCC 1 F 6 5 7 10nF RSTOP RTAIL 3.09k 7.72k 8 FAULT OUT1 1 RFB1 8.87k IS32LT3180 PWM STOP OUT8 FB TAIL GND 9 4 13 RFB2 1k Figure 1 Typical Application Circuit Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 1 IS32LT3180 Figure 2 Typical Application Circuit (Without external FET) Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 2 IS32LT3180 PIN CONFIGURATION Package Pin Configuration (Top view) eTSSOP-16 PIN DESCRIPTION No. Pin Description 1 OUT1 Output current sink channel 1. 2 VCC Power input for the IC. 3 ERC External regulator control output. Connects to the gate of an external PMOS FET operated in linear mode. 4 FB Reference input voltage for the external resistor divider (1.05V typical) 5 PWM Digital logic input to select between full intensity (DC output current) and lower intensity (PWM output Current). 6 FAULT Open drain fault flag to indicate LED open/short, STOP pin overcurrent, over voltage conditions. 7 STOP Output current sink level setting pin. 8 TAIL PWM duty cycle programming pin. 9~12 OUT8 ~OUT5 Output current sink channel 8~5. 13 GND Ground connection for the IC. 14~16 OUT4 ~ OUT2 Output current sink channel 4~2. Thermal Pad Connect to GND. Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 3 IS32LT3180 ORDERING INFORMATION AUTOMOTIVE RANGE: -40°C TO +125°C Order Part No. Package QTY/Reel IS32LT3180-ZLA3-TR eTSSOP-16, Lead-free 2500 Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 4 IS32LT3180 ABSOLUTE MAXIMUM RATINGS VCC, ERC, PWM, FAULT, OUTx, FB TAIL, STOP OUTx current Operating junction temperature, TJ Storage temperature range, TSTG Operating ambient temperature range, TJ = TA Package thermal resistance (Junction to ambient), RθJA Power dissipation, PD(MAX) (Note 2) ESD (HBM) ESD (CDM) -0.3 to 50V -0.3 to 5.5V 100mA 150°C -55°C ~ +150°C -40°C ~ +150°C 39.9W/°C 2.5W 2kV 750V Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2: Detail information please refers to package thermal de-rating curve on Page 13. ELECTRICAL CHARACTERISTICS TJ = -40°C ~+150°C, VCC = 6V~16V, RSTOP =3.09kΩ, RTAIL =7.72kΩ. (Note 3) Symbol ICC Parameter Input current IOUT_MAX Maximum sink current IOUTACC Sink current accuracy ∆IOUT Current matching Condition Typ. Max. IOUTx =35mA, VCC =16V, 8 channels TJ = -40°C ~+125°C 6.0 8.0 TJ = +150°C (Note 5) 6.0 TJ = -40°C ~+125°C, VOUTx =1.2V -8 0 8 1-2×IOUT/(IOUT_MAX+IOUT_MIN) IOUTx =35mA, TJ = -40°C ~+125°C -5 0 5 TJ = +150°C (Note 5) ±7 1 VOUTx =42V LR Line regulation 6V< VCC <16V, 0.8V<VOUTx<3V IOUTx = 35mA, 8 channels TJ = -40°C ~+125°C (Note 6) VOVP Overvoltage setback threshold @99%IOUTx IOSB Overvoltage setback current IFSB FAULT reporting of setback current VOC Open LED detection threshold VTH Output disable threshold VSCR Short LED detection threshold for reduced LED Current 16 VCC =20V 0.3 Unit mA mA 25 IOUTx =35mA = (IOUT_MAX+IOUT_MIN)/2 VOUTx = 0.8V, TJ = -40°C ~+125°C (Note 4, 6) Current leakage Current slew rate 75 TJ = +150°C (Note 5) IL RCS Min. % % µA 0.6 3 mA 18.7 23 V 95 %IOUT 80 %IOUT 0.4 0.5 V 100 250 mV 3.6 4 V IOUTx = 35mA, 10%~90% TJ = -40°C ~+125°C 5 20 TJ = +150°C (Note 5) 10 3.2 Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 mA/µs 5 IS32LT3180 ELECTRICAL CHARACTERISTICS (CONTINUE) TJ = -40°C ~+150°C, VCC = 6V~16V, RSTOP =3.09kΩ, RTAIL =7.72kΩ. (Note 3) Symbol Parameter Condition TRS Thermal rollback start temperature IOUTx >95% of maximum value (Note 5) TSD Thermal shutdown Threshold IOUTx has rolled off to 10% of maximum value (Note 5) TSD_HY Thermal hysteresis ITFB VFAULT ILF Min. Typ. °C 160 °C (Note 5) 15 °C FAULT reporting of thermal (Note 5) rollback 50 %IOUT FAULT pin voltage Sink current = 5mA 0.1 0.2 V FAULT pin input leakage current VFAULT = 20V 0.1 10 µA 1.9 2.2 V 150 PWM high threshold VPWM_L PWM minimum threshold 0.7 1.0 VFB FB regulation voltage 0.95 1.05 IERC ERC drive current 5 6 1.05 1.08 STOP pin output voltage STOP pin current to IOUTx VTAIL Unit 130 VPWM_H VSTOP Max. VERC ≥ 3V TJ = -40°C ~+125°C (Note 4) TJ = +150°C (Note 5) 0.45 (Note 4) 100 TAIL pin output current PWM accuracy V 1.15 V mA 1.11 V A/A 90 100 110 µA Duty cycle set to 5%, VTAIL = 0.6V 3.5 5 6.5 % Duty cycle set to 50%, VTAIL = 2.4V 46 50 54 % Duty cycle set to 80%, VTAIL = 3.6V 70 80 90 % tON Turn-on delay VCC =0V step to VCC =12V, the delay between 0.9×VCC with 0.9×IOUTx 1 2 ms tPWM PWM on delay VCC =12V VPWM =12V step to VPWM =0V 50 100 µs fPWM PWM frequency VPWM = 0V 1 kHz Note 3: All parts are production tested at TJ = -40°C ~ +150°C, unless otherwise noted. Other temperature limits are guaranteed by design. Note 4: Accuracy of the STOP pin output voltage need not meet the specification so long as the output current accuracy specification over the full programmable current range can be guaranteed. Note 5: Guaranteed by design. Note 6: The output current please refers to Figure 10 at Page 8 when TJ is over 125°C. Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 6 IS32LT3180 TYPICAL PERFORMANCE CHARACTERISTICS 35 75 30 60 Duty Cycle (%) Output Current (mA) TJ = 25°C 45 30 25 RTAIL = 15kΩ 20 15 RTAIL = 11kΩ 10 15 RTAIL = 6.8kΩ 5 0 1 1.5 2 2.5 3 3.5 4 4.5 5 0 5.5 -40 -25 -10 100 90 90 80 80 70 70 Duty Cycle (%) Duty Cycle (%) 100 60 50 40 30 95 110 125 30 10 40 0 50 0 1 2 3 4 5 VTAIL (V) RTAIL (kΩ) Figure 6 Duty Cycle vs. VTAIL Figure 5 Duty Cycle vs. RTAIL 36 35.4 VOUTx = 1V RSTOP = 3.09kΩ TJ = 25°C 35.2 VOUTx = 1V RSTOP = 3.09kΩ TJ = 25°C 34 Output Current (mA) Output Current (mA) 80 40 10 30 65 50 20 20 50 60 20 10 35 Figure 4 Duty Cycle vs. Temperature Figure 3 Output Current vs. RSTOP 0 20 Temperature (°C) RSTOP (kΩ) 0 5 35.0 34.8 32 30 28 26 34.6 24 34.4 6 8 10 12 14 Supply Voltage (V) Figure 7 Line Regulation Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 16 22 18 20 22 24 26 28 Supply Voltage (V) Figure 8 Input Overvoltage Protection 7 IS32LT3180 40 12 RSTOP = 3.09kΩ VCC = 12V RFB2 = 1kΩ 11 35 Output Current (mA) VSTRING (V) 10 9 8 7 6 30 25 20 15 10 5 5 4 3 2 4 6 0 -40 -20 10 8 0 20 RFB1 (kΩ) 40 60 80 100 120 140 Temperature (°C) Figure 9 VSTRING vs. RFB1 Figure 10 Output Current vs. Temperature 100 90 VCC = 12V TJ = 25°C 80 80 Output Current (mA) Output Current (mA) 160 180 60 40 70 IOUT = 75mA 60 50 IOUT = 35mA 40 30 IOUT = 10mA 20 20 10 0 0 0.5 1 1.5 2 2.5 ISTOP (mA) Output Current (mA) 0.5 1 1.5 2 2.5 3 3.5 4 Figure 12 Output Current vs. Output Voltage TJ = 25°C,85°C,125°C VCC = 12V IOUT = 35mA 35 30 0 Output Voltage (V) Figure 11 Output Current vs. ISTOP 40 0 TJ = -40°C 25 20 15 10 5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 Output Voltage (V) Figure 13 Output Current vs. Output Voltage Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 8 IS32LT3180 FUNCTIONAL BLOCK DIAGRAM Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 9 IS32LT3180 APPLICATION INFORMATION IS32LT3180 also includes an integrated drive circuit for an external PMOS FET linear regulator for the case where the voltage across the LED loads must be accurately maintained to control power dissipation. The ERC pin current (IERC) flows through 1kΩ resistor (RGS) and generates a voltage across gate and drain of PMOS FET. IS32LT3180 regulates this ERC current by sensing feedback reference voltage (VFB) to controls the RDS_ON of PMOS FET and get the expected VSTRING, which is set by resistor divider RFB1 and RFB2. The integrated feedback reference is trimmed to be 9% accuracy, while the ERC pin current (IERC) for the external regulator control can drive up to 6mA. PROGRAMMING THE OUTPUT CURRENT A single programming resistor (RSTOP) controls the maximum sink current for each LED channel. The STOP pin provides a reference voltage of 1.08V (Typ.). The programming resistor may be computed using the following Equation (1): I OUT 100 1.08 RSTOP (1) The current which is drawn from the STOP pin is internally mirrored to each of the 8 outputs with a multiplication factor of 100A/A. Thus, an output current of 50mA would require a current to be drawn from STOP of 500µA, corresponding to an external programming resistance of 2.16kΩ. OVER CURRENT PROTECTION A 1mA current limiting on STOP pin limits the current which can be referenced from the STOP pin. Exceeding the STOP current limit will reduce the output current. This helps limit output current (brightness and power) for this fault. The current rolls off per the diagram (Figure 11) to prevent unexpected excessive power dissipation. When the current of STOP pin reaches 1mA, the FAULT pin will assert. using a single external resistor. The PWM duty cycle (DC) is set by the following Equation (2): 100A RTAIL DC 0.1 100% 4 The voltage comparison operation of the PWM duty cycle provides an alternative method of programming the duty cycle of the output current during a TAIL condition. Providing a DC input voltage to the TAIL pin from 0.4V to 4.4V programs the output duty cycle linearly from 0% to 100% duty cycle. THERMAL ROLLBACK OF OUTPUT CURRENT To protect the IC from damage due to high power dissipation, the temperature of the die is monitored. When the temperature of the die is below the thermal rollback start threshold of 130°C (Typ.), the output current maximum is the value set by the selection of RSTOP. When the die temperature is between the thermal rollback start threshold 130°C (Typ.) and the over temperature shutdown threshold 160°C (Typ.), the output current decreases linearly from the peak value to a target value of 10% of the maximum current occurring at the thermal shutdown temperature. During the rollback, the FAULT pin will assert this fault when the output current reaches 50%×IOUT. Temperature Rise/fall 100 Rising temperature 90 Falling temperature 80 Thermal rollback 70 FAULT asserted at 50%*IOUT 60 50 40 Thermal shutdown 30 20 10 0 110 120 130 Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 140 150 160 170 Die temperature(o C) PROGRAMMING THE PWM DUTY CYCLE The PWM duty cycle which determines the lower intensity TAIL condition, is also easily programmed (2) However, contrary to the STOP pin, and the TAIL pin supplies a constant current of 100µA. Internally, a sawtooth waveform with a peak value of 4.4V and a minimum value of 0.4V is compared to the voltage of the TAIL pin. The frequency of the sawtooth waveform is 1kHz resulting in a PWM signal of 1kHz at the programmed duty cycle. Thus, for example, a 50% duty cycle would require the reference voltage at TAIL to be 2.4V, corresponding to an external resistance value of 24kΩ. Output current rate (%) The IS32LT3180 is an 8-channel linear current driver optimized to drive Rear Combination Lamp for automotive applications. A single input is used to select between two fully programmable intensity levels, one for the ‘STOP’ condition, and the other for the ‘TAIL’ condition. The full intensity ‘STOP’ condition is easily set using an external resistor, RSTOP. The lower intensity ‘TAIL” condition is realized via a PWM of the output current, the duty cycle of which is easily programmed using an external resistor, RTAIL. Figure 14 Temperature Rise/Fall 10 IS32LT3180 THERMAL SHUTDOWN OPEN LED DETECTION If the die temperature exceeds the thermal shutdown temperature of 160°C (Typ.) then the device is shutdown, and the sink current is shut off for all channels. After a thermal shutdown event, the die will not try to restart until the temperature of the die has reduced to less than 145°C (Typ.). Each of the outputs of the IS32LT3180 is monitored for an output voltage of less than 400mV (Typ.). If any of the output voltages drops below the threshold voltage, the fault register is triggered and the FAULT pin is asserted. INPUT VOLTAGE OVER VOLTAGE DETECTION Automotive battery systems have wide variations in line supply voltage; depending on battery charge status. Low dropout is a key attribute for providing consistent LED light output at low line voltage. Unlike adjustable regulator based constant current source schemes where the set point resistor resides in the load path, the IS32LT3180’s set point resistor lies outside the LED load path, and aids in the low dropout capability. System Power Dissipation Current limit is employed during high voltage. During a current limit event, the drive current is linearly reduced to 70%×IOUT resulting in lower power dissipation on the IC. This occurs during high battery voltage (VCC > 16V). In this way the IS32LT3180 can operate in extreme conditions and still provide a controlled level of light output. The overvoltage condition is asserted on the FAULT pin as the drive current reaches 80%×IOUT. Reference Figure 15 and 16 for power limiting behavior. During normal operation, it is possible that current may still be flowing in the output LED string even if the output voltage of the IC falls below the OC detect threshold – for example, if the LED string remains intact, but the supply voltage dips momentarily. In this case, the FAULT pin would assert then de-assert when the output voltage returns to the nominal value. OUTPUT DISABLE DETECTION As IS32LT3180 powers up, the device will check OUTx pin of each channel to see if it is connected to GND. If any channel is connected to GND (disable typical threshold is 100mV), the fault diagnostic function will ignore the fault of this channel. To prevent a trigger fault assertion, when less than 8 channels are used, the unused OUTx pins must be connected to GND to disable these channels. SHORT LED DETECTION If there is a condition where some or all of the LEDs on a channel become short circuited, the voltage on the channel output can reach the supply voltage, and therefore the power dissipation of that channel will arise due to V*I thermal dissipation. In this case, the device will automatically try to protect itself by quickly lowering the current to 30%×IOUT if the voltage on the channel output rises above 3.6V. The FAULT pin will assert. If the voltage returns to the lower region, the current in the output driver will return to the set value and FAULT pin de-asserts. Table 1 IOUT and FAULT State at Different PWM 6V< VCC <16V Figure 15 PWM LED Pin String System Power IOUT 100 Normal Low Drop-out Only Voltage Effects Constant Current Area Overvoltage Set Back Thermal Rollback 130°C(Typ.) > 2.2V Open Thermal Shutdown 160°C(Typ.) Short 0A 100 Normal IC Power OUTPUT CURRENT SLEW RATE CONTROL To minimize the effects of EMI, the output current rise and fall time is controlled. The slew rate control circuitry is designed to control the rise time, 10% to 90% and fall time 90% to 10% at 5mA/µs (Typ.). Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 <0.7V Short 1.08 DC RSTOP De-asserted 0A 100 Asserted Asserted 100 Open De-asserted 1.08 30% R STOP Voltage Figure 16 1.08 RSTOP FAULT 1.08 30 % DC R STOP Asserted Asserted DC = Duty cycle of PWM as set by RTAIL. 11 IS32LT3180 VSTRING VOUTx VLED EXTERNAL REGULATOR CONTROL PIN And, An external PMOS can be used to protect the IS32LT3180 from damage due to large voltage variation from the input voltage, or the LED string forward voltage. The external PMOS is used as a linear voltage regulator to help minimize the power dissipated in the OUTx channels. The recommended RFB2 is 1kΩ. VLED is the total VF. It should remain sufficient VOUTx to insure the current sink operation. Please refer to Figure 12 and 13 to set a proper VOUTx. Two modes of operation can be selected by external connection of the FB pin as described below. 1) The first mode of operation is selected by connecting the FB pin to VCC through a 10kΩ (as shown in the Figure 2 typical operating schematic). In this mode, the linear voltage regulator is disabled and the total LED VF is close to the supply voltage (VCC – VHR). 2) The second mode of operation is selected by connecting a resistive voltage divider to the FB pin (as shown in the Figure 1 typical operating schematic). This enables the ERC pin output to linearly drive the PMOS FET and regulate the VSTRING voltage so the FB voltage is maintained at 1.05V (Typ.). FEEDBACK VOLTAGE SETTING VSTRING should be set to a level to allow proper operation of the IC without detecting an open LED (0.5V max on OUTx) and to keep power to the IC at reduced levels below the 130°C (Typ.) thermal rollback temperature threshold limit. Reducing die temperature will depend on printed circuit board composition, PCB size, thermal via number and placement, module component placement, and air flow. VSTRING can only be adjusted with an external PMOS FET and it is set using resistors RFB1 and RFB2 (refer to Figure 1) as following Equation (3): R VSTRING VFB FB1 1 RFB 2 (3) This simplifies to an equation for RFB1. RFB1 RFB 2 VSTRING VFB VFB (4) Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 (5) FAULT OUTPUT OPERATION Any channel which encounters an open or short LED condition will be asserted by the FAULT pin. Typically this condition is encountered during a STOP or TAIL condition then the fault condition will be detected and the fault signal asserted. When the RCL is in neither STOP nor TAIL condition, the circuit is powered down, and thus the signal is cleared. Upon re-entering either the STOP or TAIL condition, the fault signal will reassert if the fault condition still exists, or, if the fault condition has been cleared, FAULT pin will not re-assert. Exceeding the STOP pin current limiting 1mA will reduce the output current to 30mA and the FAULT pin will assert (refer to Figure 11). In overvoltage detection, when the line supply voltage exceeds the overvoltage setback threshold (minimum is 16V), the drive current will be linearly decreased to 70%×IOUT, which is proportional to supply voltage. The FAULT pin asserts as the drive current reach 80%×IOUT and de-assert as return above 80%×IOUT. FAULT assertion due to the die temperature exceeding that of the thermal rollback start threshold is not latched. When the die temperature exceeds the thermal rollback threshold 130°C (Typ.) and output current linearly decreases to 50%×IOUT, the FAULT signal will be asserted, and remain asserted until the output current returns above 50%×IOUT, at which time, the FAULT pin will de-assert. In all cases, if the device is powered down during the time when the FAULT signal is asserted, the FAULT pin is reset. Reapplying power to the circuit after this has occurred will cause the FAULT pin to operate as normal in accordance with the conditions described above. 12 IS32LT3180 Table 2 Fault Assertion Fault State Fault Asserted Condition Reset Condition Open LED Any of the OUTx pin voltages drops below than open LED voltage threshold 400mV (Typ.). When VOUTx returns above the open LED detect threshold. Short LED The voltage on any channel OUTx pin rises above the short LED detect threshold 3.6V (Typ.). When VOUTx returns below the short LED detect threshold. STOP pin current exceeds 1mA (Typ.). When ISTOP current is lower than 1mA (Typ.). Short pin Overvoltage VCC voltage exceeds overvoltage setback VCC pin threshold 18.7V (Typ.). Thermal Rollback When VCC voltage is lower than overvoltage setback threshold. The die temperature exceeds the thermal rollback threshold 130°C (Typ.) and output current linearly decreases to 50%×IOUT. 3 THERMAL DISSIPATION eTSSOP-16 2.5 Power Dissipation (W) The package thermal resistance, RθJA, determines the amount of heat that can pass from the silicon die to the surrounding ambient environment. The RθJA is a measure of the temperature rise created by power dissipation and is usually measured in degree Celsius per watt (°C/W). The junction temperature, TJ, can be calculated by the rise of the silicon temperature, ∆T, the power dissipation on IS32LT3180, P3180, and the package thermal resistance, RθJA, as in Equation (6): 2 1.5 1 0.5 8 P3180 VCC I CC VOUTx I OUTx x 1 (6) 0 -40 and, -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) TJ TA T TA P3180 RJA When operating the device at high ambient temperatures, or when driving high load current, care must be taken to avoid exceeding the package power dissipation limits. The maximum power dissipation can be calculated using the following Equation (8): PD ( MAX ) PD ( MAX ) 125C 25C RJA Figure 17 (7) Where, VCC is the supply voltage, VOUTx is the voltage across OUTx pin to GND, IOUTx is the sink current of each LED string and TA is the ambient temperature. So, When the die temperature cool down and the output current returns above 50%×IOUT. 125C 25C 2.5W 39.9C / W With the linear voltage regulator, IS32LT3180 will regulate the PMOS FET to keep VSTRING voltage constant, that can be set by resistor divider RFB1 and RFB2. So even though the supply voltage VCC has some variation, the power dissipation on IS32LT3180 will be constant. VOUTx VSTRING VLEDSx And, (8) (9) Figure 17, shows the power derating of the IS32LT3180 on a JEDEC boards (in accordance with JESD 51-5 and JESD 51-7) standing in still air. When the junction temperature, TJ, exceeds the absolute maximum temperature 125°C (typ.), the linear voltage regulator should be used to withstand unwanted dissipation. Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 Dissipation Curve (10) 8 P3180 VCC I CC VOUTx I OUTx x 1 (11) Where, VLEDSx is the total forward voltage of each LED string. The power dissipation on the external PFET MOS can be calculated by the following Equation (12): 8 PFET (VCC VSTRING ) I OUTx x 1 (12) 13 IS32LT3180 When designing the Printed Circuit Board (PCB) layout, double-sided PCB with a copper area of a few square millimeters on each side of the board directly under the IS32LT3180 (eTSSOP-16 package) and PMOS FET must be used. Multiple thermal vias will help to conduct heat from the exposed pad of the IS32LT3180 and PMOS FET to the copper on each side of the board. The thermal resistance can be further reduced by using a metal substrate or by adding a heat sink. Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 14 IS32LT3180 CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Figure 18 Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 15 IS32LT3180 PACKAGE INFORMATION eTSSOP-16 Integrated Silicon Solution, Inc. – www.issi.com Rev. 0A, 12/09/2014 16