Automotive Power Data Sheet TLE9221SX

TLE9221SX
FlexRay Transceiver
Data Sheet
Rev. 1.10, 2013-07-15
Automotive Power
TLE9221SX
Table of Contents
Table of Contents
1
1.1
1.2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
2.1
2.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
4.1
4.2
4.3
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Behavior of Unconnected Digital Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
Overview Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Communication Controller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus Guardian Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supply Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus Failure Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Central State Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
11
11
12
14
16
17
17
17
17
6
6.1
6.2
6.2.1
6.2.2
6.2.3
6.3
6.3.1
Host Interface and Status Information Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Host Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Information Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Definition of the Status Information Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SIR Readout Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clearing Sequence of SIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Information at the ERRN Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset the ERRN Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
19
19
19
21
22
23
7
7.1
7.1.1
7.1.2
7.2
7.2.1
7.2.2
7.2.3
7.3
Wake-up Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Local Wake-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Local Wake-up Falling Edge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Local Wake-up Rising Edge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Remote Wake-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Wake-up Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Alternative Wake-up Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up by Payload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wake-up Flag and Wake-up Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
24
25
26
26
27
27
28
29
8
8.1
8.2
8.3
8.3.1
8.3.2
8.3.3
8.3.4
Power Supply Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
INH Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
BD_Off and Undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Flags and Undervoltage Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Event at uVBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Event at uVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Event at uVIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
32
32
34
34
35
36
37
Data Sheet
2
Rev. 1.10, 2013-07-15
TLE9221SX
Table of Contents
8.4
8.4.1
8.4.2
8.4.3
Power-up and Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
BD_Off State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interim BD_Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
38
38
39
40
9
9.1
9.2
9.2.1
9.2.2
9.3
9.3.1
9.4
9.4.1
9.5
Operating Mode Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Mode Transitions Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Mode Change by Host Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Entering BD_Sleep Mode via the BD_GoToSleep Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quitting BD_Sleep by Host Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Mode Changeover by Undervoltage Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Priorities of Undervoltage Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Mode Changes by Undervoltage Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
BD_Sleep Mode Entry Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation Mode Changes by the Wake-up Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
42
42
44
47
48
48
52
52
52
56
10
10.1
10.2
10.3
Bus Error Indication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setting the Bus Error Bit by uVCC Undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setting the Bus Error Bit by RxD and TxD Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setting the Bus Error Bit by Overcurrent Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
58
58
58
11
Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
12
Transmitter Time-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
13
13.1
13.2
13.3
Mode Indication, Power-up and Parity Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-up Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode Indication Bit EN and Mode Indication Bit STBN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Even Parity Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
61
61
61
61
14
14.1
14.2
14.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
62
62
64
64
15
15.1
15.2
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Functional Device Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
16
16.1
16.2
16.3
16.4
16.5
16.6
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Robustness according to IEC61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus Interface Simulation Model Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical RxD Output Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
18
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Data Sheet
3
84
84
84
85
86
87
88
Rev. 1.10, 2013-07-15
FlexRay Transceiver
1
Overview
1.1
Features
TLE9221SX
General Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Compliant with the FlexRay Electrical Physical Layer
Specification, version 3.0.1
Optimized for time-triggered in-vehicle networks with
data transmission rates from 1 Mbit/s up to 10 Mbit/s
Optimized electromagnetic immunity (EMI)
Very low electromagnetic emission (EME), supporting large
PG-SSOP16-2
networks and complex bus topologies
Very high level of ESD robustness, 11 kV according to IEC-61000-4-2
Supports 60 ns minimum bit time
Optimized digital inputs to minimize jitter
Integrated Bus Guardian Interface
Bus failure protection and error detection
Automatic voltage adaptation on the digital interface pins
High current digital outputs, optimized to drive long wires and high capacitive loads
Green Product (RoHS compliant)
AEC Qualified (Conformance Test Index: 511))
Modes of Operation and Wake-up Features
•
•
•
•
•
•
•
•
Sleep and stand-by operation mode with very low quiescent current
Receive-only mode
Separate INH output to control external circuitry
Local wake-up input
Remote wake-up via a dedicated wake-up symbol
Alternative remote wake-up
Remote wake-up via payload
Wake-up source recognition and indication
Protection and Diagnostics
•
•
•
Short-circuit protection
Overtemperature protection
Undervoltage detection on all power supplies
1) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
Type
Package
Marking
TLE9221SX
PG-SSOP16-2
9221
Data Sheet
4
Rev. 1.10, 2013-07-15
TLE9221SX
Overview
•
•
•
•
Transmitter time-out
Error and wake-up indication on the ERRN output
Status Information Register to indicate error bits and wake-up bits
High Impedance bus input in BD_Off condition
1.2
Description
FlexRay is a serial, deterministic bus system for real-time control applications. It is designed for future
requirements of in-vehicle control applications, providing data transmission rates up to 10 Mbit/s. FlexRay is
designed for collision-free data communication. The nodes do not arbitrate and the FlexRay Communication
Controller (CC) guarantees a collision-free bus access during normal operation.
The FlexRay bus system is patent-protected by the international FlexRay consortium. The consortium defines and
publishes the requirements for FlexRay bus systems, for the data-link layer, the physical layer and all other
requisite application layers.
The TLE9221SX FlexRay transceiver is a FlexRay bus driver (BD) and it accomplishes the physical interface
between the Communication Controller and the bus medium. Fully compliant with the FlexRay Electrical Physical
Layer Specification, version 3.0.1 (acronym EPL).
The TLE9221SX supports the following functional classes:
•
•
•
•
Functional class “bus driver voltage regulator control” (CT index: 471))
Functional class “bus driver bus guardian interface” (CT index: 50)
Functional class “bus driver logic level adaption” (CT index: 49)
Functional class “bus driver remote wake-up” (CT index: 85)
According to the FlexRay requirements, the TLE9221SX is tested and qualified according to the FlexRay Electrical
Physical Layer Conformance Test, version 3.0.1 (acronym EPL_CT) by an external test house.
The TLE9221SX supports data transmission rates from 1 Mbit/s up to 10 Mbit/s. Besides the transmit and receive
capability of the bus, the TLE9221SX provides arrangements for low power supply management, supply voltage
monitoring and bus failure detection.
In BD_Sleep mode, the TLE9221SX quiescent current decreases to a typical, total current consumption of
47.5 μA, while the device is still able to wake up by a dedicated wake-up pattern on the FlexRay data bus or by a
local wake-up event on the pin WAKE. The INH output pin allows the control of external circuitry depending on the
selected mode of operation.
Fail-safe features, like bus failure detection or the power supply monitoring, combined with an easy accessible
Status Information Register support the requirements of safety-related applications with extended diagnostic
features.
The TLE9221SX is internally protected against transients on all global pins. Global pins are BP, BM, WAKE and
VBAT. It is possible to use the TLE9221SX without any additional external protection circuitry while the TLE9221SX
meets the ESD and ISO pulse requirements of the car manufactures.
The TLE9221SX is designed on the latest Infineon Smart Power Technology SPT, which combines power devices
with a highly integrated logic process. Based on its digital design concept, the TLE9221SX provides very high
immunity against RF disturbances over a wide frequency range.
Based on the high symmetry of the BP and BM signals, the TLE9221SX provides the lowest level of
electromagnetic emission (EME) within a wide frequency range.
The TLE9221SX is integrated in a RoHS compliant PG-SSOP16-2 package. The TLE9221SX and the Infineon
Smart Power Technology SPT are especially tailored to withstand the harsh conditions of the automotive
environment and qualified according to the AEC-Q100 standard.
1) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
Data Sheet
5
Rev. 1.10, 2013-07-15
TLE9221SX
Pin Configuration
2
Pin Configuration
2.1
Pin Assignment
INH
1
16
VCC
EN
2
15
BP
VIO
3
14
BM
TxD
4
13
GND
TxEN
5
12
WAKE
RxD
6
11
VBAT
BGE
7
10
ERRN
STBN
8
9
RxEN
Figure 1
Pin configuration
2.2
Pin Definitions
Table 1
Pin definition and functions
Pin
Symbol
Function
1
INH
Inhibit Output;
open drain output to control external circuitry,
“high” impedance in BD_Sleep mode.
2
EN
Enable Mode Control Input;
digital input for the mode selection,
integrated “pull-down” resistor to GND.
3
VIO
Level Shift Input;
reference voltage for the digital input and output pins,
100 nF decoupling capacitor to GND recommended.
4
TxD
Transmit Data Input;
integrated “pull-down” current source to GND,
logical “low” to drive “Data_0” to the FlexRay bus.
Data Sheet
6
Rev. 1.10, 2013-07-15
TLE9221SX
Pin Configuration
Table 1
Pin definition and functions
Pin
Symbol
Function
5
TxEN
Transmitter Enable Not Input;
integrated “pull-up” current source to VIO,
logical “low” to enable the Transmitter.
6
RxD
Receive Data Output;
logical “low” while “Data_0” is on the FlexRay bus,
output voltage adapted to the voltage on the VIO level shift input.
7
BGE
Bus Guardian Enable Input;
logical “high” to enable the Transmitter,
integrated “pull-down” current source to GND.
8
STBN
Stand-by Not Mode Control Input;
digital input for the mode selection,
integrated “pull-down” current source to GND.
9
RxEN
Receive Data Enable Not Output;
logical “low” indicates activity on the FlexRay bus,
logical “high” in case the FlexRay Bus is “Idle”,
output voltage adapted to the voltage on the VIO level shift input.
10
ERRN
Error Not Diagnosis Output;
logical “low” in failure case,
output voltage adapted to the voltage on the VIO level shift input.
11
VBAT
Battery Voltage Supply;
100 nF decoupling capacitor to GND recommended.
12
WAKE
Wake-up Input;
local wake-up input, terminated against GND and VBAT,
wake-up input sensitive to signal changes in both directions.
13
GND
Ground;
14
BM
Bus Line Minus;
negative input/output to the FlexRay bus.
15
BP
Bus Line Plus;
positive input/output to the FlexRay bus.
16
VCC
Supply Voltage;
Transmitter supply voltage,
100 nF decoupling capacitor to GND recommended.
Data Sheet
7
Rev. 1.10, 2013-07-15
TLE9221SX
Block Diagram
3
Block Diagram
VCC
16
VBAT
11
VIO
3
GND
13
1
Power Supply Interface
INH
Voltage
Monitor
10
ERRN
Bus Failure
Detector
Host
Interface
8
2
STBN
EN
VIO
Transmitter
6
Central State
Machine
BP
RxD
Communication
Controller
Interface
5
4
15
TxEN
TxD
Receiver
BM
14
9
RxEN
Bus Guardian
Interface
7
BGE
VBAT
Wake-up
Detector
Figure 2
Data Sheet
12
WAKE
Block diagram
8
Rev. 1.10, 2013-07-15
TLE9221SX
Functional Overview
4
Functional Overview
4.1
Functional Description
FlexRay is a differential bus system. The data is exchanged via a dual wire bus medium on the wires BP (Bus Line
Plus) and BM (Bus Line Minus).
Three different bus symbols are defined in the FlexRay EPL, version 3.0.1: “Data_0”, “Data_1” and bus “Idle”. An
active Transmitter of the TLE9221SX drives “Data_0” or “Data_1” to the bus medium, depending on the TxD input
signal. To sustain an “Idle” signal on the FlexRay bus, the Transmitter is turned off, the voltage difference between
BP and BM is below 30 mV, and the absolute voltage level on both bus lines, BP and BM depends on the Bus
Biasing (see Figure 3):
•
•
•
“Data_1”: uBus = uBP - uBM ≥ 300 mV → positive voltage between BP and BM
“Data_0”: uBus = uBP - uBM ≤ - 300 mV → negative voltage between BP and BM
“Idle”: |uBus| = |uBP - uBM| ≤ 30 mV
|
TxEN
t
TxD
t
BP
BM
“Data_1”
“Data_0”
“Data_1”
“Data_0”
“Idle”1)
“Idle”2)
t
VBUS
“Data_1”
“Data_1”
“Idle”1)
“Idle”2)
t
“Data_0”
“Data_0”
RxD
t
1) Some nodes or all nodes inside the FlexRay Network are in BD_Normal mode.
2) All nodes of the FlexRay network are in low power mode.
Figure 3
Data Sheet
FlexRay EPL bus signals without Bus Guardian Interface
9
Rev. 1.10, 2013-07-15
TLE9221SX
Functional Overview
4.2
Modes of Operation
The FlexRay bus driver TLE9221SX supports four different modes of operation:
•
•
•
•
BD_Normal mode
BD_ReceiveOnly mode
BD_Standby mode
BD_Sleep mode
Each mode has specific characteristics in terms of quiescent current, data transmission or failure diagnostic. To
enter the BD_Sleep mode, the TLE9221SX provides an intermediate mode, the so-called BD_GoToSleep
command.
Mode changes on the TLE9221SX are either triggered by:
•
•
•
The Host Interface and a host command on the input pins EN and STBN.
The Power Supply Interface and an undervoltage event on one of the two power supplies or the reference
supply uVIO.
The Wake-up Detector and wake-up events either on the FlexRay bus or on the local wake-up pin WAKE.
While all power supplies are turned off, the transceiver TLE9221SX is in BD_Off condition or also called “without
supply”.
In BD_Sleep mode and in BD_Standby mode the quiescent current consumption at all three supplies is tailored
to reach the minimum, and therefore only a limited set of the functions of the TLE9221SX is available. BD_Sleep
mode and BD_Standby mode are also called low power modes. Conversely the modes BD_Normal and
BD_ReceiveOnly are called non-low power modes.
4.3
Behavior of Unconnected Digital Input Pins
The integrated pull-up and pull-down resistors at the digital input pins force the TLE9221SX into a secure, fail safe
behavior if the input pins are not connected and floating (see Table 2 for details).
If the TxEN pin or the BGE pin is not connected in BD_Normal mode, the Transmitter is disabled. If the TxD input
pin is open in BD_Normal mode and the Transmitter is active, the transceiver TLE9221SX drives a “Data_0” signal
to the bus.
If the mode control input pins of the Host Interface are not connected, the pull-down resistors on the EN pin and
on the STBN pin set the TLE9221SX by default to BD_Standby mode.
Table 2
Logical inputs when unconnected
Input Signal
Default State
Comment
“low”
pull-down to GND
“high”
pull-up to uVIO
STBN
“low”
pull-down to GND
EN
“low”
pull-down to GND
“low”
pull-down to GND
TxD
1)
TxEN
BGE
1)
1)
1) In the low power modes, BD_Sleep and BD_Standby, the inputs TxD, TxEN and BGE are blocked by the internal logic. To
optimize the total quiescent current consumption, the pull-up and pull-down structures are disabled in BD_Sleep mode.
The Power Supply Interface detects missing supply voltages or a missing reference supply. The Central State
Machine sets the TLE9221SX into a fail safe mode when a supply is not available (details see Chapter 8.3).
Data Sheet
10
Rev. 1.10, 2013-07-15
TLE9221SX
Overview Functional Blocks
5
Overview Functional Blocks
5.1
Transmitter
The Transmitter is the output driver for the FlexRay bus. It is based on a “high” side and “low” side push-pull unit.
The push-pull units are supplied by the power supply uVCC (see Figure 4).
While driving a “Data_1” or “Data_0” signal on to the FlexRay bus, the transceiver is active and enabled. During
an “Idle” signal, the transceiver is turned off.
uVCC
BP
Driver
Overtemp.
Sensor
time-out
Communication
Controller Interface
uVCC
BM
Driver
Figure 4
Block diagram of the Transmitter
The Transmitter is protected by an internal temperature sensor against overheating in terms of a short circuit on
the bus lines BM or BP. The Transmitter is controlled by the Communication Controller Interface (see
Chapter 5.3). The Transmitter is only active in BD_Normal mode.
5.2
Receiver
The Receiver detects communication elements, like “Idle”, “Data_1” and “Data_0”, when it is not in low power
mode. It is connected to the BP and BM I/O pins of the TLE9221SX, together with the Transmitter, the Bus-Failure
Detector, and the Wake-up Detector (see Figure 2). Based on a digital sampling concept, the Receiver is
optimized to withstand the RF immunity requirements of the automotive industry.
The low pass input filter is tailored to support analog bit times down to 60 ns. Data bits below 60 ns may not be
detected as valid communication elements. When the Receiver detects activity on the FlexRay bus behind the
input filter, the differential Receiver distinguishes whether “Data_0” or “Data_1” is signaled by the differential bus
voltage. The bus activity information is provided to the Bus Guardian Interface. The information regarding the
FlexRay data bits is provided to the Communication Controller (see Figure 5).
The thresholds and the timings of the Receiver are available in Figure 44 and Figure 45.
Data Sheet
11
Rev. 1.10, 2013-07-15
TLE9221SX
Overview Functional Blocks
Clock Source
Differential
Receiver
BP
Bus
RCM1
Biasing
uBias
Figure 5
Activity
Detection
Input Filter
BM
RCM2
+
Communication
Controller
Interface
-
Bus Guardian
Interface
GND
Block diagram of the Receiver
Apart from receiving data, the Receiver is responsible for biasing the FlexRay bus. The biasing of the FlexRay bus
depends on the selected mode of operation.
In BD_Normal mode and BD_ReceiveOnly mode, the voltage uBias is connected to the BP and BM pins across
the common mode resistors RCM1 and RCM2. In BD_Sleep mode, BD_Standby mode and in the BD_GoToSleep
command the I/O pins BP and BM are connected to GND via the common mode resistors RCM1 and RCM2.
When TLE9221SX is not supplied, the bus biasing is open and is neither switched to uBias nor to GND, the BP
and BM pins appear to the FlexRay bus as a high-impedance input (see Table 3 and Figure 5).
Table 3
Bus biasing
Mode of Operation
Bus Biasing
Transmitter
BD Normal
uBias
active or disabled
BD_ReceiveOnly
uBias
disabled
BD_Standby
GND
disabled
BD_GoToSleep command
GND
disabled
BD_Sleep
GND
disabled
BD_Off condition
Open
disabled
5.3
Communication Controller Interface
The Communication Controller Interface is the interface between the FlexRay transceiver TLE9221SX and the
FlexRay Communication Controller (CC). It comprises three digital signals:
•
•
•
The TxEN (Transmit Data Enable Not) input pin
The TxD (Transmit Data) input pin
The RxD (Receive Data) output pin
Data Sheet
12
Rev. 1.10, 2013-07-15
TLE9221SX
Overview Functional Blocks
The logical I/O levels of all three digital pins are adapted to the reference voltage uVIO. In case uVIO is not available
or in an undervoltage condition, the RxD output is set to logical “low” and the input pins TxD and TxEN are set to
their default condition (see Table 2).
The Communication Controller logic block handles the interlock between TxD and TxEN. The Central State
Machine provides the interface to other TLE9221SX function blocks and handles the dependency based on the
selected mode of operation (see Figure 6).
uVIO
Central
State
Machine
TxD
Transmitter
Receiver
Communication Controller
Logic Block
uVIO
TxEN
uVIO
RxD
Figure 6
Block diagram of the Communication Controller Interface
The TxD input of the Communication Controller Interface is active only when the Transmitter is activated. To
activate the Transmitter, the transceiver TLE9221SX needs to be in BD_Normal mode, the TxEN input must be at
logical “low” and the BGE input pin must be at logical “high” (see Table 4).
The FlexRay transceiver shall never start data transmission with the communication element “Data_1”. Therefore,
the activation of the Transmitter via the TxEN signal is only possible while the TxD signal is at logical “low” (see
Figure 7).
While the Transmitter is enabled, the Communication Controller Interface drives the serial digital data stream
available at the TxD input pin to the FlexRay bus via the Transmitter. A logical “high” signal at the TxD pin drives
a “Data_1” signal to the FlexRay bus and a logical “low” signal drives a “Data_0” signal (see Table 4).
Data Sheet
13
Rev. 1.10, 2013-07-15
TLE9221SX
Overview Functional Blocks
TxD
t
The Transmitter can only be
activated while TxD = “low”
TxEN
t
BGE
t
Transmitter on
Transmitter off
Transmitter on
Transmitter off
BP
BM
“Data_1” “Data_0”
“Data_1”
“Idle”
“Data_0”
“Data_1”
“Data_0”
“Data_1”
“Idle”
t
RxEN
t
RxD
t
Figure 7
FlexRay physical layer bus signals with Bus Guardian Interface
The Receiver of the TLE9221SX is active in all non-low power operating modes. Similar to the TxD input, the RxD
output indicates a “Data_1” signal on the FlexRay bus by a logical “high” signal and the “Data_0” signal by a logical
“low” signal.
In every low power mode, the TxD and TxEN input pins are disabled. The RxD output pin is used to indicate the
wake-up flag, while the transceiver is in low power mode (see Table 5).
5.4
Bus Guardian Interface
The Bus Guardian Interface comprises two digital signals:
•
•
The BGE (Bus Guardian Enable) input pin.
The RxEN (Receive Enable Not) output pin.
The logical I/O levels of the input and the output pin are adapted to the reference voltage uVIO. In case uVIO is not
available or in undervoltage condition, the RxEN output is set to logical “low” and the input pin BGE is set to its
default condition (see Table 2).
The Bus Guardian logic block handles the connection to the Transmitter and the Receiver. The Central State
Machine provides the interface to other TLE9221SX function blocks and handles the dependency on the selected
mode of operation (see Figure 8).
Data Sheet
14
Rev. 1.10, 2013-07-15
TLE9221SX
Overview Functional Blocks
Central
State
Machine
uVIO
BGE
Bus Guardian
Logic Block
Transmitter
uVIO
Receiver
Figure 8
RxEN
Block diagram of the Bus Guardian Interface
The BGE input is an additional fail safe input, allowing external hardware to block the data stream driven to the
FlexRay bus medium. Switching the BGE input to logical “low” disables the Transmitter of TLE9221SX regardless
of the signals on all the other digital input pins. The BGE input is active only in BD_Normal mode (see Table 4 and
Figure 7).
Table 4
TxD/TxEN interface, acting as a Transmitter
Mode of Operation
BD_Normal
All other modes
TxEN
BGE
TxD
Resulting Signal on the Bus
“high”
X
1)
X
“Idle”
X
“low”
X
“Idle”
“low”
“high”
“low”
“Data_0”
“low”
“high”
“high”
“Data_1”
X
X
X
“Idle”
1) X = don’t care
The RxEN (Receive Enable Not) indicates the activity on the FlexRay bus. In case the FlexRay bus is “Idle”, the
logical signal on the RxEN is “high”. Any active data signal on the FlexRay bus, regardless of whether it is “Data_0”
or “Data_1”, is indicated by a logical “low” signal on the RxEN output pin. Like the RxD output pin, the RxEN output
pin indicates also the wake-up flag while the transceiver is in low power mode (see Table 5 and Figure 7).
Data Sheet
15
Rev. 1.10, 2013-07-15
TLE9221SX
Overview Functional Blocks
Table 5
RxD/RxEN interface, acting as Receiver with Bus Guardian Interface
Mode of Operation
BD_Normal,
BD_ReceiveOnly
BD_Sleep,
BD_StandBy
Signal on the Bus Wires
Wake-up Flag
1)
RxD
RxEN
“high”
“high”
“Idle”
X
“Data_0”
X
“low”
“low”
“Data_1”
X
“high”
“low”
X
“low” (set)
“low”
“low”
X
“high” (not set)
“high”
“high”
1) X = don’t care
5.5
Host Interface
The Host Interface is the interface between the FlexRay transceiver TLE9221SX and the FlexRay host controller.
It allows the host to control the operating modes and to read status and diagnostics information. It comprises three
digital signals:
•
•
•
The EN (Enable) input pin
The STBN (Stand-By Not) input pin
The ERRN (Error Not) output pin
According to the FlexRay EPL Specification, version 3.0.1, the Host Interface of the TLE9221SX is a hard-wired
signal interface, Option A.
The logical I/O levels of the pins are adapted to the reference voltage uVIO. In case uVIO is not available or in
undervoltage condition, the ERRN output is set to logical “low” and the input pins EN and STBN are set to their
default condition (see Table 2).
.
uVIO
STBN
uVIO
Glitch Filter
Central
State
Machine
EN
uVIO
ERRN
SIR
Figure 9
Data Sheet
Block diagram of the Host Interface
16
Rev. 1.10, 2013-07-15
TLE9221SX
Overview Functional Blocks
The EN and STBN pins control the modes of operation. The pins are connected to the Central State Machine via
an input filter. The input filter protects the transceiver TLE9221SX against unintentional mode changes caused by
spikes on the EN and STBN.
The ERRN output signals failures, diagnostic and status information to the external host controller. The
TLE9221SX also contains a Status Information Register. Access to the Status Information Register is given by the
Host Interface (see details Chapter 6).
Table 6
Modes of operation1)
STBN
EN
Mode of Operation
“high”
“high”
BD_Normal
“high”
“low”
BD_ReceiveOnly
“low”
“high”
BD_GoToSleep, automatically transferred to BD_Sleep
“low”
“low”
BD_Standby
1) No undervoltage flag and no wake-up flag is set.
5.6
Wake-up Detector
The Wake-up Detector is a separate internal function block to detect wake-up events, be it a local or a remote
wake-up event. The Wake-up Detector also enables the filtering unit to differentiate between real wake-up signals
and floating signals or glitches on the wake-up lines. Active in every operation mode, and also in the BD_Normal
or BD_ReceiveOnly mode, the Wake-up Detector ensures that no wake-up signal gets lost due to a concurrent
change of the operating mode. The Wake-up Detector provides feedback on the wake-up information to the
Central State Machine for further processing (details see Chapter 7).
5.7
Power Supply Interface
The Power Supply Interface is the interface from the bus driver to the external supply voltages. It hosts the inputs
to the power supplies VBAT and VCC and also the level shift input to the reference voltage VIO (according to the
FlexRay EPL, version 3.0.1, functional class: “Bus driver logic level adaptation”).
To enable the control of external circuitry, like a voltage regulator for example, the Power Supply Interface of the
TLE9221SX provides an INH output (according to the FlexRay EPL, version 3.0.1, functional class: “Bus driver
voltage regulator control”).
All power supplies and the reference voltage are monitored and undervoltage conditions are indicated via the
ERRN output on the Host Interface (details see Chapter 8).
5.8
Bus Failure Detector
The Bus Failure Detector monitors the data stream on the BM and BP I/O pins and compares the bus data with
the digital data stream available at the Communication Controller Interface. Discrepancies between the bus data
and the digital data are interpreted as a bus failure. The Bus Failure Detector is active only in BD_Normal mode.
All detected failures are signaled on the ERRN output by the Host Interface (see Chapter 10).
5.9
Central State Machine
The Central State Machine is the main logic block of the TLE9221SX. It controls all functions of the TLE9221SX,
the failure management as well as the power-up and power-down operations. The Central State Machine also
provides some internal registers to store status, diagnostic and failure information.
•
•
•
•
Information about the operating mode handling (see Chapter 9)
Information about the Status Information Register (see Chapter 6)
Information about the power management (see Chapter 8)
Information about the bus failure flag (see Chapter 10)
Data Sheet
17
Rev. 1.10, 2013-07-15
TLE9221SX
Host Interface and Status Information Register
6
Host Interface and Status Information Register
The Host Interface is the main interface for:
•
•
•
Selecting and controlling the operation modes of the TLE9221SX by host commands.
Receiving status information of the TLE9221SX at the ERRN output pin.
Retrieving diagnostics information of the TLE9221SX by reading the Status Information Register.
The Host Interface is operational when the reference voltage uVIO is in its functional range. In case the supply uVIO
is in undervoltage condition, the Host Interface is blocked and the operating mode of the TLE9221SX FlexRay
transceiver is automatically set to BD_Sleep mode (compare with Chapter 9.3).
6.1
Host Commands
The digital inputs EN and STBN have dual functionality:
•
•
EN and STBN are used to select the operating mode.
EN and STBN are used to trigger the read-out of the Status Information Register.
The STBN, EN and all other digital inputs of the TLE9221SX are level-triggered and protected with a glitch input
filter. Additionally, a digital input filter is provided at the mode selection pins STBN and EN.
To get a valid host command, which triggers a change of the operating mode, the external signals at the pins EN
and STBN need to be stable at least for time t ≥ dBDLogicFilter. Signal changes with a smaller pulse width than the
internal filter time t < dBDLogicFilter are not considered valid host commands and the TLE9221SX remains in its
previous operating mode.
Within the time for mode change t = dBDModeChange the FlexRay transceiver TLE9221SX changes to the selected
mode of operation (see Figure 10). All output signals are valid after the mode transition and when the time for
mode change t = dBDModeChange has expired.
t < dBDLogicFilter
t = dBDLogicFilter
STBN
100% uVIO
50% uVIO
0% uVIO
t = dBDModeChange
EN
t
100% uVIO
50% uVIO
0% uVIO
BD_Normal
mode transition
host command detection
Figure 10
t
BD_Standby
mode change
Example of a valid host command
Note: The time for mode change has to be considered for every change of the operation mode. All definitions in
this data sheet are made considering the time for mode change dBDModeChange, even if the time for mode
change is not explicitly mentioned, for example in logical status tables, mode diagrams or in elementary
timing diagrams.
Data Sheet
18
Rev. 1.10, 2013-07-15
TLE9221SX
Host Interface and Status Information Register
6.2
Status Information Register
6.2.1
Definition of the Status Information Register
Failure, wake-up and diagnostic information is stored internally in a 16-bit wide register in the TLE9221SX, the socalled Status Information Register, or abbreviated to SIR (see Table 7).
Bit definition of the Status Information Register1)
Table 7
Bit
Description
Summary Flag / Bit
Bit 0
local wake-up bit
wake-up flag,
Bit 1
remote wake-up bit
wake-up flag,
Bit 2
reserved, always “high”
–
Bit 3
power-up bit
–
Bit 4
bus error bit
error bit
Bit 5
overtemperature error bit
error bit
Bit 6
overtemperature warning bit
error bit
Bit 7
Transmitter time-out bit
error bit
Bit 8
VBAT undervoltage bit
error bit
Bit 9
VCC undervoltage bit
error bit
Bit 10
VIO undervoltage bit
error bit
Bit 11
error bit
–
Bit 12
wake-up source bit
–
Bit 13
EN mode indication bit
–
Bit 14
STBN mode indication bit
–
Bit 15
even parity bit
–
1) The bits are “low” active. For example bit = 0, when set.
6.2.2
SIR Readout Mechanism
The SIR is a “read-only” register and the data can be read out serially by using EN input as a data clock. While the
SIR readout procedure is running, no operation mode change applies to the TLE9221SX. This allows regular data
communication and read-out of the SIR at the same time.
Like all the other functions using the Host Interface, the reference supply uVIO needs to be operational to read out
the SIR.
The SIR readout is possible in all non-low power modes and in BD_Standby mode (see Table 8).
Table 8
Readout mechanism and modes of operation
Modes of Operation
Active / Not Active
BD_Normal
active
BD_ReceiveOnly
active
BD_GoToSleep Command
not active
BD_Standby
active
BD_Sleep
not active
Note: The SIR readout depends on the current operating mode selected and not on the host command applied. In
case of undervoltage events, the host command could be BD_Normal mode, but the operating mode is
BD_Sleep mode. In BD_Sleep mode, no SIR read-out is possible.
Data Sheet
19
Rev. 1.10, 2013-07-15
TLE9221SX
Host Interface and Status Information Register
100% uVIO
STBN
50% uVIO
0% uVIO
dENClock
dENClock
dENClock
dENClock
dENTimeout
t
100% uVIO
EN
50% uVIO
0% uVIO
initialize Host
Interface
t
exit SIR
clock out
SIR
select operation mode according to
the host command
enable
SIR
100% uVIO
ERRN
ERRN Status
SIR
Bit 0
SIR
Bit 1
SIR
Bit 15
SIR
Bit 0
ERRN Status
50% uVIO
0% uVIO
BD_Normal mode
Figure 11
t
BD_ReceiveOnly
Timing diagram for the SIR readout in BD_Normal mode
During the SIR readout, the EN input acts as the clock and the ERRN output pin acts as the serial “data_out”.
Irrespective of the digital signal at the STBN input, the SIR readout is always initialized by a signal change at the
EN input pin. When the host command BD_Normal is applied to the Host Interface, the SIR read-out starts with
the falling edge at the EN input (see Figure 11). For the host commands BD_Standby and BD_ReceiveOnly the
read-out starts with the rising edge at the EN pin (see Figure 12).
After initialization, the internal timer starts and the TLE9221SX awaits the next signal change within the timing
window dENCLOCK(min) < t < dENCLOCK(max). The next rising edge1) enables the SIR and the bits can be clocked
out.
If no signal change occurs after the initialization within the time frame t < dENTimeout, the TLE9221SX exits the SIR
readout procedure and changes the operating mode according to the host command applied.
When the SIR is enabled, every falling edge at the EN input serially shifts out the SIR information at the ERRN
output pin. With the first falling edge of the clock at the EN input, the least significant bit, bit 0, is clocked out to the
ERRN output successively followed by bit 1, bit 2, etc, with every successive falling edge of the clock at the EN
input.The SIR bits are “low” active, meaning that the ERRN signal = “low” when the SIR bit is set.
Note: The STBN input pin has no function when the SIR readout is enabled and the readout procedure is running.
Nevertheless, it is recommended to keep the STBN pin stable (“high” or “low”) during the SIR readout
procedure.
1) While the TLE9221SX is in BD_Normal mode, the rising edge is the first signal change after initialization and enables the
SIR readout. For the BD_ReceiveOnly and the BD_Standby mode, there is an additional falling edge between initialization
and the SIR being enabled (compare with Figure 11 and Figure 12).
Data Sheet
20
Rev. 1.10, 2013-07-15
TLE9221SX
Host Interface and Status Information Register
100% uVIO
STBN
STBN = “high” or “low”
“high” for BD_ReceiveOnly mode
“low” for BD_Standby mode
50% uVIO
0% uVIO
t
additional edge
dENClock
dENClock
dENClock
dENClock
dENClock
dENTimeout
100% uVIO
EN
50% uVIO
0% uVIO
t
clock out
SIR
initialize Host
Interface
exit SIR
enable
SIR
select operation mode according to
the host command
100% uVIO
ERRN
ERRN status
SIR
Bit 0
SIR
Bit 1
SIR
Bit 15
SIR
Bit 0
50% uVIO
0% uVIO
ERRN status
t
BD_ReceiveOnly mode or BD_Standby mode
Figure 12
SIR readout in BD_ReceiveOnly or BD_Standby mode
The SIR readout procedure can be terminated at any time by stopping the clock at the EN input pin. While the
signal at the EN pin is stable for the time t > dENTimeout, the TLE9221SX exits the SIR and changes to the operating
mode according to the host command applied.
Note: It is recommended to leave the SIR read out procedure with the same EN signal that was present when the
read out procedure was started. When time t = dENTimeout expires, the mode change is triggered
immediately.
6.2.3
Clearing Sequence of SIR
Failure and status information is latched in the SIR and the bits need to be cleared by a host command. In order
to avoid any status bit from being cleared, while the root cause of the bit entry is still present, the TLE9221SX is
equipped with a dedicated sequence to clear the bits of the Status Information Register. Before clearing any bits,
the TLE9221SX checks, if the root cause of the bit entry is resolved. Only if the root cause of the bit entry has
disappeared, the bit will be cleared.
The sequence to clear the bits of the SIR is started by:
•
•
Entering BD_Normal mode via a host command.
A complete readout of all 16 bits in the SIR.
In case the readout of the SIR is incomplete, for instance, due to a microcontroller interrupt during the readout
procedure, the bits in the SIR remain set.
In case the SIR readout continues after the last bit (bit 15) has been clocked out, the TLE9221SX continues and
clocks out the first bit (bit 0) again. On the second readout the bits in the SIR have been cleared. The bits will only
be cleared if the root cause of setting them has been resolved.
Data Sheet
21
Rev. 1.10, 2013-07-15
TLE9221SX
Host Interface and Status Information Register
Note: Applying TLE9221SX the host command BD_Normal does not necessarily clear the SIR, since entering
BD_Normal mode can be prevented by an undervoltage event (see Table 12).
6.3
Status Information at the ERRN Output Pin
The ERRN output pin functions as a serial “data-out” during the SIR readout procedure. In any other case, the
ERRN output pin indicates the status information. According to the FlexRay EPL Specification, version 3.0.1, the
ERRN pin indicates failure, wake-up events and the wake-up source.
The host command applied determines the incident that is signed at the ERRN output pin. The ERRN output pin
is active “low” (details see Table 9).
.
Table 9
STBN
Signaling at ERRN
EN
Host Command Error
Bit1)
Wakeup
Flag1)
ERRN
Condition
Error Indication
“high”
“high”
BD_Normal
“high”
X2)
“high”
–
“high”
“high”
BD_Normal
“low”
X
“low”
–
“high”
“low”
BD_ReceiveOnly “high”
“high”
“high”
–
“high”
“low”
BD_ReceiveOnly “low”
“high”
“low”
–
Wake-up Source Indication
“high”
“low”
BD_ReceiveOnly X
“low”
“high”
wake-up source bit = “high”
“high”
“low”
BD_ReceiveOnly X
“low”
“low”
wake-up source bit = “low”
Wake-up Indication
“low”
“high”
BD_GoToSleep
command
X
“high”
“high”
automatically transferred to BD_Sleep
“low”
“high”
BD_GoToSleep
command
X
“low”
“low”
automatically transferred to BD_Sleep
“low”
“low”
BD_Standby
X
“high”
“high”
–
“low”
“low”
BD_Standby
X
“low”
“low”
–
“low”
X
BD_Sleep
X
“high”
“high”
–
“low”
X
BD_Sleep
X
“low”
“low”
–
1) “Low” active, the error bit and the wake-up flag are set while active “low”.
2) “X” = don’t care.
Note: The status signal at the ERRN output depends directly on the host command applied. Since the selection of
the operation mode doesn’t implicitly depend on the host command but also on failure cases and wake-up
events, it is possible that the TLE9221SX is in BD_Sleep mode while the host command BD_Normal mode
is applied to the Host Interface (details see also Table 14, Table 15 and Table 16).
As an example in Figure 13 the TLE9221SX indicates the error flag while the device is in BD_Sleep mode due to
an undervoltage event on uVBAT.
Data Sheet
22
Rev. 1.10, 2013-07-15
TLE9221SX
Host Interface and Status Information Register
STBN
100% uVIO
50% uVIO
0% uVIO
t
EN
100% uVIO
50% uVIO
0% uVIO
t
uVBAT
uBDUVVBAT
t
BD_Sleep (because of uVBAT undervoltage)
ERRN
100% uVIO
host command = BD_Normal
ERRN = error bit
host command = BD_Standby
ERRN = wake-up flag
50% uVIO
0% uVIO
dReTimeERRN
t
dReTimeERRN
Figure 13
Status at the ERRN while uVBAT undervoltage
6.3.1
Reset the ERRN Output Pin
The ERRN output depends directly on the status bits in the SIR. Resetting the bits in the SIR automatically also
clears the ERRN output and, vice versa, one bit in SIR sets the ERRN output.
As described in Chapter 6.2.3 the SIR can be reset by a dedicated host command or by the readout of the SIR.
Since the SIR and consequently also the ERRN output can only be reset by a dedicated host command, toggling
at the ERRN pin is not possible.
According to the FlexRay Conformance Test Specification, version 3.0.1, a specification of parameter dERRNStable
is not required, if the ERRN output can only be reset by a host command (CT index: 701)).
1) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
Data Sheet
23
Rev. 1.10, 2013-07-15
TLE9221SX
Wake-up Detector
7
Wake-up Detector
The FlexRay transceiver TLE9221SX can detect different wake-up events via the central Wake-up Detector.
These can be either remote wake-up events provided by the FlexRay bus or local wake-up events provided to the
local wake-up pin WAKE.
Wake-up events are clearly defined by the FlexRay EPL, version 3.0.1. Wake-up signals that are not compliant
with the FlexRay EPL, version 3.0.1, shall not be considered as a wake-up signal and are blocked by the Wakeup Detector.
Wake-up signals compliant with the FlexRay EPL, version 3.0.1, are:
•
•
•
•
A falling edge at the local wake-up pin WAKE (see Chapter 7.1.1).
A rising edge at the local wake-up pin WAKE (see Chapter 7.1.2).
A dedicated wake-up pattern at the FlexRay bus (see Chapter 7.2.1 and Chapter 7.2.2).
A wake-up pattern implemented in a standard FlexRay frame (see Chapter 7.2.3).
The Wake-up Detector is active in every mode of operation and works over the entire operating range as long as
uVBAT is in its functional range (see Table 19).
Detected wake-up events are analyzed by the Central State Machine and are compared with the overall device
status. They may cause a change of the operation mode (details see Chapter 9.5) and they may set a wake-up
flag or a wake-up bit (details see Chapter 7.3).
7.1
Local Wake-up
The TLE9221SX provides a local wake-up input WAKE, tailored to withstand voltages up to uVBAT(Max). Positive
and negative signal changes on the WAKE pin trigger the Wake-up Detector.
The WAKE input is provided with an internal pull-up and pull-down structure and an internal wake pulse filter (see
Figure 14).
VBAT
iBDWakeH
Wake-Up
Detector
WAKE
Wake Pulse Filter
(dBDWakePulseFilter)
iBDWakeThr
iBDWakeL
GND
Figure 14
Block diagram of the WAKE input
Depending on the signal at the WAKE input, either the pull-up structure or the pull-down structure is connected to
the WAKE input. While a voltage uVWAKE > uBDWakeThr is applied to the WAKE input, the internal pull-up structure
Data Sheet
24
Rev. 1.10, 2013-07-15
TLE9221SX
Wake-up Detector
is connected to the WAKE input. Conversely, while a voltage uVWAKE < uBDWakeThr is applied to the WAKE input,
the internal pull-down structure is activated (see Figure 15).
iBDWake
uBDWakeThr(min.)
uBDWakeThr(max.)
pull-down current
uVBAT
iBDWakeL
uBDWake
iBDWakeH
pull-up current
uBDWakeHys
Figure 15
Pull-up and pull-down at the WAKE input
7.1.1
Local Wake-up Falling Edge
WAKE
100% uVBAT
dBDWakePulseFilter
dBDWakeupReactionlocal
uBDWakeThr
t
wake-up detection
set local wake-up bit
RxD
RxEN
t
BD_Sleep
Figure 16
BD_Standby
Local wake-up falling edge
The TLE9221SX detects a falling edge (signal change from uVBAT to GND) at the WAKE pin, followed by a “low”
signal for the time period dBDWakePulseFilter as a local wake-up event (see Figure 16). The implemented filter
time dBDWakePulseFilter avoids that spikes at the WAKE signal are considered as valid wake-up events.
In BD_Sleep mode, BD_Standby mode and during the BD_GoToSleep command the state machine of the
TLE9221SX sets the local wake-up bit (bit 0) in the SIR (active logical “low”), when detecting a local wake-up
event. In non-low power modes, the detection of a local wake-up event is ignored and no status bit is set. Together
with the local wake-up bit, the TLE9221SX also sets the wake-up flag (active logical “low”). The wake-up source
bit (bit 12) remains at logical “high”, when a local wake-up event is detected.
Data Sheet
25
Rev. 1.10, 2013-07-15
TLE9221SX
Wake-up Detector
In low power modes or in the BD_GoToSleep command an active wake-up flag is indicated at the RxD and RxEN
output within the time period dBDWakeupReactionlocal (see Table 5). In case the transceiver is in BD_Sleep mode,
an active wake-up flag also triggers a mode change to BD_Standby mode (for details see Table 16).
A local wake-up signal can be detected by the TLE9221SX only if the power supply uVBAT is available. The
detection of a local wake-up is working over the whole operating range of uVBAT (for details see Table 19).
The ERRN output indicates the wake-up event after the time dBDWakeLocal:
dBDWakeLocal = dBDWakePulseFilter + dBDWakeupReactionlocal
7.1.2
Local Wake-up Rising Edge
The WAKE input on the TLE9221SX is a bi-sensitive input and also a rising edge (signal change from GND to
uVBAT) at the pin WAKE is detected as a wake-up event (see Figure 17).
As on a local wake-up, triggered by a falling edge at the input pin WAKE, a rising edge also sets the local wakeup bit and the wake-up flag respectively.
The internal state machine does not differentiate between a local wake-up triggered by a rising edge and a falling
edge at the pin WAKE. There is no possibility of distinguishing between the rising and falling edge, since only one
SIR entry is available.
WAKE
100% uVBAT
uBDWakeThr
dBDWakePulseFilter
dBDWakeupReactionlocal
t
wake-up detection
set local wake-up bit
RxD
RxEN
t
BD_Sleep
Figure 17
Local wake-up rising edge
7.2
Remote Wake-up
BD_Standby
For a remote wake-up, also called bus wake-up, a dedicated wake-up pattern is defined in FlexRay systems. A
wake-up pattern consists of at least two wake-up symbols. A wake-up symbol on the FlexRay bus is defined as a
phase of “Data_0” followed by a phase of “Idle” or alternatively a phase of “Data_0” followed by a phase of
“Data_1”. Bus wake-up patterns are detected by the Wake-up Detector and fed to the internal state machine.
The remote wake-up bit (bit 1) in the SIR is set, if the TLE9221SX detects a remote wake-up event in a low power
mode or during the BD_GoToSleep command, regardless of whether the wake-up was triggered by a standard
wake-up pattern or triggered by an alternative wake-up pattern or by a wake-up signal via payload. At the same
time that it sets the remote wake-up bit, the TLE9221SX also sets the wake-up flag and the wake-up source bit.
In non-low power modes, the detection of a remote wake-up event is ignored and neither the remote wake-up bit
nor the wake-up flag is set.
Data Sheet
26
Rev. 1.10, 2013-07-15
TLE9221SX
Wake-up Detector
In low power modes or in the BD_GoToSleep command, an active wake-up flag is indicated at the RxD and RxEN
outputs within the time period dBDWakeupReactionremote (see Figure 18 and Table 5). In case the transceiver
remains in BD_Sleep mode an active wake-up flag also triggers a mode change to BD_Standby mode (for details
see Table 19).
To detect a remote wake-up event, at least one of the two power supplies needs to be available.
7.2.1
Standard Wake-up Pattern
The standard wake-up pattern is defined by at least two wake-up symbols starting with “Data_0”, followed by an
“Idle” signal. The pulse width for the “Data_0” needs to be at least t = dWU0Detect or longer. The pulse width for the
“Idle” phase shall not be below t = dWUIdleDetect. The maximum time for the standard wake-up pattern shall not
exceed t = dWUTimeout (see Figure 18). The pulse width for “Data_0” may vary between the two wake-up symbols
as long as the pulse width is not below t = dWU0Detect and the standard wake-up pattern does not exceed
t = dWUTimeout. Variation of the pulse width of the “Idle” phase is possible with the same limitations. The standard
wake-up pattern is independent of the data transmission rate.
The Wake-up Detector of the TLE9221SX distinguishes between “Data_0” and “Idle” by the differential bus
voltage. The bus voltage below the threshold uDATA0_LP is identified as a “Data_0” signal and the bus voltage
above the threshold uDATA0_LP is identified as an “Idle” or a “Data_1” signal. The Wake-up Detector does not
differentiate between an “Idle” or a “Data_1” signal.
wake-up pattern
uBus
wake-up symbol
“Idle”
wake-up symbol
“Idle”
“Idle”
wake-up detection
set remote wake-up bit
t
uData0_LP
“Data_0”
dWU0Detect
“Data_0”
dWUIdleDetect
dWU0Detect
dWUIdleDetect
dWUTimeout
dBDWakeupReactionremote
RxD
RxEN
t
BD_Sleep
Figure 18
Standard wake-up pattern
7.2.2
Alternative Wake-up Pattern
BD_Standby
The definition of the alternative wake-up pattern is similar to that of the standard wake-up pattern, the only
difference is that the wake-up symbols have no “Idle” signal. The “Idle” signal is replaced by a “Data_1” signal (see
Figure 19). The timing requirements for pulse width and time-out are the same as for the standard wake-up
pattern. The alternative wake-up pattern is also independent of the data rate.
Data Sheet
27
Rev. 1.10, 2013-07-15
TLE9221SX
Wake-up Detector
wake-up pattern
uBus
wake-up symbol
wake-up detection
set remote wake-up bit
wake-up symbol
“Data_1”
“Data_1”
“Idle”
t
uData0_LP
“Data_0”
“Data_0”
dWU0Detect
dWUIdleDetect
dWU0Detect
dWUIdleDetect
dWUTimeout
dBDWakeupReactionremote
RxD
RxEN
t
BD_Sleep
Figure 19
Alternative wake-up pattern
7.2.3
Wake-up by Payload
BD_Standby
Besides sending a dedicated wake-up pattern on the FlexRay bus, it is also possible to wake up the TLE9221SX
with a wake-up message hidden in the data field of the standard FlexRay frame, called wake-up by payload.
In comparison to the wake-up by standard pattern or to the wake-up with an alternative pattern, the wake-up by
payload is limited to a data transmission rate of 10 Mbit/s.
A dedicated Byte Start Sequence is transmitted before each byte of the payload within the FlexRay data frame.The
Byte Start Sequence (BSS) consists of one “high” bit followed by one “low” bit. To transmit a “Data_0” byte to the
FlexRay bus, the FlexRay controller sends 10 bits. First a “high” bit as part of the Byte Start Sequence, followed
by a “low” bit which also belongs to the Byte Start Sequence and after the Byte Start Sequence, the controller
sends eight “low” bits (HL= BSS; LLLLLLLL= “Data_0”). Sending a “Data_1” byte the FlexRay controller sends a
“high” bit followed by a “low” bit and then sends eight consecutive “high” bits (HL= BSS; HHHHHHHH= “Data_1”)
(see Figure 20).
At a data rate of 10 Mbit/s, one bit in the FlexRay data frame has a bit length of 100 ns. This means that each data
byte in a wake-up pattern has one glitch of 100 ns.
The Wake-up Detector of TLE9221SX has an analog input filter implemented, which filters out the glitches on the
wake-up pattern for glitches shorter than t = dWUInterrupt.
Receiving a complete wake-up by payload, the TLE9221SX sets the remote wake-up bit, the wake-up flag and
also the wake-up source bit. The wake-up flag is set in case the following data pattern is detected in a FlexRay
frame.
:
0xFF
0xFF
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0xFF
0xFF
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0xFF
0xFF
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
In case any incomplete wake-up pattern is received, no wake-up flag is set and no entry is made to the SIR.
Data Sheet
28
Rev. 1.10, 2013-07-15
TLE9221SX
Wake-up Detector
wake-up pattern
uBus
wake-up symbol
wake-up symbol
“Data_1”
“Data_1”
t
uData0_LP
“Data_0”
“Data_0”
dWU0Detect
dWUIdleDetect
dWU0Detect
dWUIdleDetect
dWUTimeout
dWUInterrupt
Figure 20
Wake-up by payload
7.3
Wake-up Flag and Wake-up Bits
The wake-up flag and the SIR latch the wake-up event and allow an external microcontroller to read out the wakeup source. The TLE9221SX provides three bits in the SIR for the wake-up information:
•
•
•
The local wake-up bit (bit 0)
The remote wake-up bit (bit 1)
The wake-up source bit (bit 12)
Even if the Wake-up detector is active in every operation mode, the wake-up bits can only be set in low power
mode or in the BD_GoToSleep command. In every other operation mode no wake-up bit is set (see Table 10).
The local wake-up bit is set in case the TLE9221SX detects a local wake-up event and in case of a remote wakeup event the remote wake-up bit is set. A remote wake-up can be a wake-up either by a standard pattern, a wakeup by an alternative pattern or a wake-up by payload.
In case the TLE9221SX detects a local and a remote wake-up event, both entries in the SIR bits are set.
Table 10
Setting the wake-up flag and the wake-up bits
Wake-up Flag1)
Modes of Operation
Wake-up Event Local
Wake-up Bit1)
BD_GoToSleep
Remote
“high”
“low”
“low”
“low”
Local
“low”
“high”
“high”
“low”
Remote
“high”
“low”
“low”
“low”
Local
“low”
“high”
“high”
“low”
Remote
“high”
“low”
“low”
“low”
Local
“low”
“high”
“high”
“low”
BD_Standby
BD_Sleep
Remote
Wake-up Bit1)
Wake-up
Source Bit1)
1) Not set = logical “high”, Set = logical “low”
Concurrent with the local wake-up bit or with the remote wake-up bit, the wake-up source bit and the wake-up flag
are set. The wake-up source bit is “high” when detecting a local wake-up event and “low” when a remote wake-up
Data Sheet
29
Rev. 1.10, 2013-07-15
TLE9221SX
Wake-up Detector
event is detected. Only the first wake-up event is indicated in the wake-up source bit. In case the TLE9221SX
detects a local and a remote wake-up event simultaneously, the wake-up source bit output indicates the remote
wake-up event.
The SIR is reset either after a complete read-out of the SIR (see Chapter 6.2.3) or when the TLE9221SX enters
into BD_Normal mode. The wake-up flag is reset if both bits, the local wake-up bit and the remote wake-up bit are
reset.
The wake-up flag and the wake-up source bit are indicated at the ERRN output pin of the Host Interface (see
Table 9).
Data Sheet
30
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
8
Power Supply Interface
The Power Supply Interface distributes the correct voltages to the single function blocks within the TLE9221SX. It
manages the power-up and power-down procedures, monitors the supply voltages uVBAT, uVCC and also the
reference voltage uVIO. To control external circuitry, an INH output is available (see Figure 22).
.
INH
Driver
Voltage Monitor
VBAT
VCC
Central
State
Machine
Internal Supply
VIN
VIO
Host Interface
Communication Controller
Interface
Bus Guardian Interface
Figure 21
Block diagram of Power Supply Interface
The Central State Machine is the main logic control unit of the TLE9221SX. All functions, including operation mode
management, the diagnostic function and failure management are controlled and handled by the Central State
Machine. To ensure correct failure management, the Central State Machine is the first function block which is
powered up and the last function block which is powered down. For this reason, the Central State Machine is
supplied by an internal supply uVIN (see Figure 21).
The internal supply uVIN is in its operational range, if at least one of the two power supplies, uVCC or uVBAT, is above
their power-down threshold, uBDBPVBAT or uVBDPDVCC.
Note: The reference voltage uVIO is the level shift supply for all digital inputs and outputs. It is not connected with
the internal supply of the central statemachine. Nevertheless, if the reference voltage uVIO is not available
or in undervoltage condition, the internal state machine blocks all host commands and changes the mode of
operation to a low power mode.
Data Sheet
31
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
8.1
INH Output
The INH output signal is intended to control an external voltage regulator. When the FlexRay transceiver
TLE9221SX is in BD_Sleep mode, the INH output is open and floating. In every other operation mode the INH
output voltage is uINH1Not-Sleep. The voltage uINH1Not-Sleep is derived from the power supply uVBAT by an internal
open drain transistor (see Figure 22).
According to the FlexRay Electrical Physical Layer Specification, version 3.0.1, the transceiver TLE9221SX
signals “Sleep” at the INH pin, while the device is in BD_Sleep mode and “Not_Sleep” in any other mode of
operation (BD_Standby, BD_Normal, BD_ReceiveOnly and the BD_GoToSleep command).
VBAT (11)
INH (1)
State
Machine
uVBAT
U
“Not_Sleep”
“Sleep”
1)
uINH1Not_Sleep
(BD_Sleep)
(BD_Normal)
(BD_ReceiveOnly)
(BD_Standby)
(BD_GoToSleep)
t
1)
The INH output is usually floating.
To achive a “low” signal on the INH output an external load is required.
Figure 22
Circuit diagram of the INH output
8.2
BD_Off and Undervoltage
The FlexRay transceiver TLE9221SX monitors the two power supplies uVCC and uVBat and also the reference
voltage uVIO. In case one of the three voltages falls below its dedicated undervoltage detection threshold, the
TLE9221SX changes its mode of operation to low power mode (see Figure 23). For undervoltage condition, the
Central State Machine is still functional.
Data Sheet
32
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
uBDUVVBAT
+
uVBAT
-
uBDUVVCC
+
≥1
uVCC
-
uUVIO
+
uVIO
-
delay line
low power
mode
block
host commands
Figure 23
Logic diagram of undervoltage detection
The BD_Off state of the FlexRay transceiver TLE9221SX is reached, if both power supplies, uVBAT and uVCC are
below the power-down thresholds uBDPDVBAT and uBDPDVCC. In comparison to undervoltage detection the
reference supply uVIO has no effect on the BD_Off state. Regardless of whether the uVIO voltage is available or
not, the FlexRay transceiver TLE9221SX always changes over to the power-down state BD_Off in case uVBAT and
uVCC are not present (see Figure 24).
Data Sheet
33
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
uBDPDVBAT
uVBAT
+
&
Figure 24
uBDPDVCC
+
uVCC
-
BD_Off
Logic diagram of BD_Off detection
Note: When the transceiver TLE9221SX is in BD_Off state, the Central State Machine is powered down. All
registers in TLE9221SX are built of volatile memory and therefore, all status, diagnostic, and failure
information is reset.
8.3
Undervoltage Events
8.3.1
Undervoltage Flags and Undervoltage Bits
Detected undervoltage events are stored using a dedicated undervoltage bit and they are visible in the SIR. Along
with the undervoltage bit a summary bit, the error bit (bit 11), is set. The error bit is indicated at the ERRN output,
depending on the selected operation mode (see Table 9 and the example in Figure 25).
The TLE9221SX provides three bits in the SIR to signal undervoltage events:
•
•
•
uVBAT undervoltage bit (bit 8)
uVCC undervoltage bit (bit 9)
uVIO undervoltage bit (bit 10)
Undervoltage bits are used to store the information for further use. Therefore undervoltage bits get cleared only
by a power-down or by clearing the SIR (see Chapter 6.2.3).
In comparison to the undervoltage bits, undervoltage flags are not latched and they are only used to trigger the
changes of the operation mode. Undervoltage flags are not visible externally.
An undervoltage event on any supply line directly sets the dedicated undervoltage bit and also the error bit. The
undervoltage flags are set by internal timers. An internal undervoltage detection timer is available for every supply,
uVBAT, uVCC and uVIO. While setting the undervoltage bit, the appropriate undervoltage detection timer is also
triggered. When the undervoltage detection timer expires, while the undervoltage event is still present, the
undervoltage flag is set (see Figure 25).
In case the undervoltage situation gets cleared while the undervoltage detection timer is running, the TLE9221SX
does not set the undervoltage flag. According to the mode change table, an active undervoltage flag changes the
mode of operation to low power mode (see Chapter 9.3 and Table 14).
Data Sheet
34
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
STBN
t
EN
t
BD_Normal
BD_Sleep
undervoltage detection timer
uVBAT
BD_Normal
undervoltage release timer
dBDUVVBAT_BLK
dBDRVBAT
dBDUVVBAT
clear undervoltage flag
set undervoltage flag
t
set undervoltage bit
set error bit
dReactionTimeERRN
ERRN
t
Figure 25
Example of setting the undervoltage flag
Besides the undervoltage detection timer, each supply is also equipped with an undervoltage recovery timer. The
undervoltage recovery timer starts when the external power supply recovers. When the undervoltage recovery
timer expires, the undervoltage flag gets reset (see Figure 25). If the external power supply recovers only
temporarily and the supply line falls back to the undervoltage situation while the undervoltage recovery timer is still
running, the undervoltage flag remains set. Clearing the undervoltage flag allows the transceiver TLE9221SX to
return from low power mode to the previous operational mode selected by the host command (see Chapter 9.4
and Table 15).
Note: Undervoltage bits are set by an undervoltage event. Undervoltage bits are stored in the SIR and also
indicated at the ERRN output.
Undervoltage flags are set by the undervoltage detection timer. Undervoltage flags are not visible in the SIR
and they are not indicated at the ERRN output. Undervoltage flags are only used to change the mode of
operation after the undervoltage detection timer has expired!
8.3.2
Undervoltage Event at uVBAT
The FlexRay transceiver TLE9221SX considers a voltage fluctuation on the power supply uVBAT, which falls below
the detection threshold uBDUVVBAT and exceeds the blanking time dBDUVBAT_BLK, as an undervoltage event.
Voltage fluctuations on uVBAT shorter than dBDUVBAT_BLK are ignored and not recognized by the Power Supply
Interface. To indicate the undervoltage event on the supply voltage uVBAT, the uVBAT undervoltage bit (bit 8) and
the error bit (bit 11) are set (see Figure 26). After the uVBAT undervoltage detection timer dBDUVVBAT expires, the
uVBAT undervoltage flag is set and the mode of operation changes to BD_Sleep mode.
The Host Interface and the Communication Controller Interface are active while the dBDUVVBAT undervoltage
detection timer is running and the reference supply uVIO is present. When the dBDUVVBAT undervoltage detection
timer expires and the uVBAT undervoltage flag is set, the Host Interface and the Communication Controller
Data Sheet
35
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
Interface are blocked as long as the uVBAT undervoltage flag remains active (compare also with Chapter 9.3 and
Table 14).
ERRN
dReactionTimeERRN
t
set uVBAT undervoltage bit
set error bit
uVBAT
dBDUVVBAT_BLK
dBDUVVBAT_Hys
uBDUVVBAT (Threshold)
t
dBDUVVBAT
t < dBDUVVBAT_BLK
dBDRVBAT
set uVBAT undervoltage flag,
block host commands
non-low power mode
clear uVBAT undervoltage flag,
release host commands
(return to the mode of operation
selected by the host command)
BD_Sleep
Figure 26
Undervoltage event at uVBAT in non-low power mode
8.3.3
Undervoltage Event at uVCC
Power supply voltage fluctuations on the uVCC power supply, falling below the threshold uBDUVVCC for a time
longer than the blanking time dBDUVVCC_BLK, are considered as undervoltage events. Voltage fluctuations on
uVCC shorter than the time dBDUVCC_BLK are ignored and not recognized by the Power Supply Interface.
Detecting an undervoltage event on uVCC, the FlexRay transceiver TLE9221SX sets the uVCC undervoltage bit
(bit 9) and the error bit (bit 11) (see Figure 27). After the uVCC undervoltage detection timer dBDUVVCC expires,
the uVCC undervoltage flag is set, the mode of operation changes to BD_Standby mode.
The Host Interface remains active while the uVCC undervoltage detection timer is running and the reference supply
uVIO is present. Setting the uVCC undervoltage flag blocks the Host Interface and forces the mode of operation to
BD_Standby mode (compare also with Chapter 9.3 and Table 14).
While the power supply uVCC is in undervoltage condition, the TLE9221SX also disables the Transmitter and sets
the bus error bit (bit 4).
Data Sheet
36
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
ERRN
dReactionTimeERRN
t
set uVCC undervoltage bit
set error bit
uVCC
dBDUVVCC_BLK
uBDUVVCC_Hys
uBDUVVCC (Threshold)
t
dBDUVVCC
dBDRVCC
t < dBDUVVCC_BLK
set uVCC undervoltage flag,
block host commands
non-low power mode
clear uVCC undervoltage flag,
release host commands
(return to the mode of operation
selected by the host command)
BD_Standby
Figure 27
Undervoltage event at uVCC in non-low power mode
8.3.4
Undervoltage Event at uVIO
The Central State Machine of the TLE9221SX handles an undervoltage event at the reference supply uVIO in a
manner identical to an undervoltage event on the power supply uVBAT.
The supply on the level shift input VIO is the main reference for all digital inputs and outputs of the TLE9221SX. It
is also connected to the pad supply of the external microcontroller (see Figure 50). An undervoltage event on the
level shift input VIO could lead to a misinterpretation of the digital input levels and could generate a false signal at
the digital outputs.
For fail-safe reasons, the TLE9221SX blocks the Host Interface, the Communication Controller Interface and the
Bus Guardian Interface after a small processing time (dReactionTimeERRN) when an undervoltage event has been
detected on the reference supply uVIO (see Figure 28). According to Table 2, all digital inputs are set to their
default level. All digital outputs are set to logical “low”.
The transceiver TLE9221SX detects an undervoltage event, if the supply at the pin VIO drops for the time period
t > dBDUVVIO_BLK below the undervoltage detection threshold uUVIO (see Figure 28). Voltage fluctuations on uVIO
shorter than dBDUVCC_BLK are ignored and not recognized by the Power Supply Interface.
Although the Host Interface is blocked and the SIR is not accessible while the reference supply uVIO is in
undervoltage condition, the transceiver sets the uVIO undervoltage bit (bit 10) and the error bit (bit 11) (see
Figure 28). After the uVIO undervoltage detection timer dBDUVVIO expires, the uVIO undervoltage flag is set and
the mode of operation changes to BD_Sleep mode (compare also to Chapter 9.3 and Table 14).
Data Sheet
37
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
t
set all output pins “low”
set all input pins to default
block all host commands
ERRN
dReactionTimeERRN
t
uVIO
set uVIO undervoltage bit
set error bit
uUVIO_Hys
uUVIO (Threshold)
W
t < dBDUVVIO_BLK
G%'59,2
dBDUVVIO_BLK
dBDModeChange
clear uVIO undervoltage flag,
release host commands
(return to the mode of operation
selected by the host command)
dBDUVVIO
set uVIO undervoltage flag
QRQORZSRZHUPRGH
Figure 28
%'B6WDQGE\
%'B6OHHS
Undervoltage event at uVIO in non-low power mode
Note: While the TLE9221SX is in undervoltage condition at the reference supply uVIO, all digital outputs are set to
“low”. The outputs do not reflect the status of the transceiver anymore.
For example, wake-up events cannot be indicated at the ERRN, RxD, and RxEN output anymore, since
these outputs are set permanently to “low”.
8.4
Power-up and Power-down
8.4.1
BD_Off State
According to the FlexRay Electrical Physical Layer Specification, version 3.0.1, BD_Off state is reached, when the
transceiver does not receive any supply.
The transceiver TLE9221SX is in BD_Off state when the internal supply voltage uVIN is turned off and the Central
State Machine is powered down. When both power supplies, uVCC and uVBAT fall below their power-down
thresholds (uBDPDVBAT and uBDPDVCC), the internal supply is off and the BD_Off state is reached (see
Figure 29).
The status of the reference supply uVIO has no influence on the power-down sequence of the Flexray transceiver
TLE9221SX.
When the FlexRay transceiver TLE9221SX is in BD_Off state, all outputs are logical “low”, the Transmitter and the
Receiver are turned off and the wake-up functions are not operational. If the reference supply uVIO is available,
the inputs are set to their default values (compare with Table 2).
Data Sheet
38
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
V
uVBAT
uVCC
uVIO
dBDPDVBAT
dBDPDVCC
t
any operation mode
Figure 29
Power-down
8.4.2
Power-up
BD_Off
For the power-up, only the power supplies uVBAT and uVCC are significant. As soon as at least one power supply
is above its reset threshold the internal supply uVIN is available and the Central State Machine gets powered up.
The device TLE9221SX enters into BD_Standby mode within the time period dBDPowerUp as soon as the voltage
values of the power supplies uVBAT and uVCC are above their undervoltage detection threshold limits uBDUVVBAT
and uBDUVVCC (see Figure 30).
Data Sheet
39
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
V
uVBAT
uVCC
uBDUVBAT
uVIO
uBDUVVCC
dBDPowerUp
uBDPDBAT
t
powering up the
Central State Machine
BD_Off
Interim_BD_Standby
Host Interface blocked
Figure 30
Power-up
8.4.3
Interim BD_Standby Mode
BD_Standby
Host Interface released
As a safety measure, the TLE9221SX provides an Interim BD_Standby mode. Changeover to the
Interim_BD_Standby mode takes place during an incomplete power-up procedure (see Figure 31).
In Interim_BD_Standby mode, the TLE9221SX provides the same functions as in BD_Standby mode, except for
the host commands. The host commands are blocked in Interim BD_Standby mode. Therefore, a host command
cannot be used to change the mode of the TLE9221SX, while the power-up has not completed. With switching
over to the interim BD_Standby mode, at least one undervoltage detection timer is started. In case the power-up
is completed before the undervoltage detection timer expires, the TLE9221SX changes the mode of operation to
BD_Standby mode. In case the undervoltage detection timer expires before the power-up is completed, the
undervoltage flag is set depending on which power supply is missing, and the mode of operation changes to low
power mode (compare with Chapter 9.3).
Data Sheet
40
Rev. 1.10, 2013-07-15
TLE9221SX
Power Supply Interface
host command: EN=“0”, STBN=“0”, BD_Standby mode
power-up
uVBAT > uBDUVVBAT
AND
uVCC > uBDUVVCC
BD_Standby
(host commands
released!)
uVCC > uBDUVVCC
BD_Standby
(host commands
blocked!)
uVBAT < uBDUVVBat
OR
uVCC < uBDUVVCC
t < dBDUVVBAT
AND
uVBAT > uBDUVVBAT
Interim
BD_Standby
AND
t < dBDUVVCC
AND
uVCC > uBDUVVCC
set uVCC undervoltage flag
t > dBDUVVCC 1)
t > dBDUVVBAT 1)
uVBAT > uBDUVVBAT
BD_Sleep
1)
Figure 31
Data Sheet
set uVBat undervoltage flag
uVBAT undervoltage overrules uVCC undervoltage
Changing over to Interim_BD_Standby mode
41
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
9
Operating Mode Description
The FlexRay transceiver TLE9221SX provides several different operating modes. The four main operating modes
are implemented to handle the requirements of a FlexRay ECU and to satisfy the requirements of the FlexRay
EPL Specification, version 3.0.1. Two product-specific interim operation modes are implemented to guarantee
secure mode changes even under failure conditions. The BD_Off state describes the behavior of the TLE9221SX,
while it is not supplied (see Table 11).
Table 11
Operating modes overview
Modes of Operation
Description
Clustering
Operating mode according to FlexRay EPL, version 3.0.1
BD_Normal
Normal operating mode to transmit data to the bus and
receive data from the bus.
non-low power mode
BD_ReceiveOnly
The TLE9221SX can receive data from the bus, but the
Transmitter is blocked.
non-low power mode
BD_Standby
Transmitter and Receiver are turned off, the diagnostic
functions and wake-up detection are available.
low power mode
BD_Sleep
All functions, except the wake-up detection are turned off.
low power mode
Product-specific operating modes
BD_GoToSleep
Transition mode to change over to the BD_Sleep mode via a interim mode
host command.
Interim_BD_Standby
Transition mode, to which a changeover is made only after
an incomplete power-up
interim mode
State of the TLE9221SX when no supply is fed to it
power-down state
Power-Down
BD_Off
9.1
Operating Mode Transitions Overview
Depending on the currently selected operating mode, several events can trigger a change of the operating mode.
The options are:
•
•
•
•
•
A valid host command at the Host Interface.
Setting an undervoltage flag, either for the power supplies uVBAT and uVCC or for the reference voltage uVIO.
Recovery from an undervoltage event, either for the power supplies uVBAT and uVCC or for the reference
voltage uVIO.
Wake-up detection either on the FlexRay bus or on the local wake-input WAKE.
A power-up event at the power supplies uVBAT and uVCC.
It is not possible to change over to every operating mode by a trigger event. There are limitations and
dependencies (see Table 12).
Table 12
Options for changeover to various operating modes
Target Mode
Trigger Event for the Mode Change
Limitation
BD_Normal
Changeover to BD_Normal mode can be made only
by a valid host command.
Host commands are blocked if
any undervoltage flag is set.
BD_ReceiveOnly
Changeover to BD_ReceiveOnly mode can be made Host commands are blocked if
only by a valid host command.
any undervoltage flag is set.
Data Sheet
42
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
Table 12
Options for changeover to various operating modes
Target Mode
Trigger Event for the Mode Change
Limitation
BD_Standby
Changeover to BD_Standby mode can be made by:
• A valid host command
• An undervoltage event at uVCC
• A wake-up event
• A power-up event at uVCC and uVBAT
Changeover to BD_Standby
mode cannot be made from
BD_Sleep mode via host
command (see Figure 32).
Host commands are blocked if
any undervoltage flag is set.
BD_Sleep
Changeover to BD_Sleep mode can be made by:
• A valid host command
• An undervoltage event at uVIO or uVBAT
Changeover to BD_Sleep mode
by a host command is possible
only via the BD_GoToSleep
command (see Figure 32).
Host commands are blocked if
any undervoltage flag is set.
BD_GoToSleep
Changeover to BD_GoToSleep command can only
be made by a valid host command.
The BD_GoToSleep command
can not be executed while the
wake-up flag is active (see
Table 13).
Host commands are blocked if
any undervoltage flag is set.
Interim_BD_Standby
Changeover to Interim_BD_Standby mode takes
place only after an incomplete power-up.
–
BD_Off
Changeover to BD_Off condition takes place if the
–
power supplies uVBAT and uVCC are below their reset
thresholds.
Data Sheet
43
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
9.2
Operating Mode Change by Host Command
Changeover can be made to every operation mode, except the BD_Sleep mode by a valid host command, when
no undervoltage flag is set. Changeover to BD_Sleep mode can be made only via the BD_GoToSleep command
(see Figure 32 and Table 13).
BD_Normal
STBN
H
4
17
EN
H
INH
Not_Sleep
3
1
9
BD_ReceiveOnly
20
STBN
H
EN
L
BD_Standby
5
6
8
STBN
L
15 16
INH
Not_Sleep
EN
L
14
INH
Not_Sleep
2
13
7
11
BD_GoToSleep
STBN
L
10
EN
H
INH
Not_Sleep
21
12
BD_Sleep
STBN
L
EN
X
18
19
INH
Sleep
Figure 32
Data Sheet
Operating mode change by host command
44
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
Table 13
No.
Mode changes by host command1) 2) 3) 4)
Primary
Operating Mode
STBN
EN
Wakeup Flag
uVBAT
Flag
uVIO
Flag
uVCC
Flag
Secondary Operating ERRN5) RxD6)
Mode
RxEN6) INH
Remarks
BD_Normal Mode
1
BD_Normal
H
set “L”
H
H
H
H
1 => BD_ReceiveOnly
H
FB
FB
Not_Sleep
7)
2
BD_Normal
set “L”
H
H
H
H
H
1 => BD_GoToSleep
H
1 => H
1 => H
Not_Sleep
7)
3
BD_Normal
set “L”
set “L”
H
H
H
H
1 => BD_Standby
H
1 => H
1 => H
Not_Sleep
7)
BD_ReceiveOnly Mode
4
BD_ReceiveOnly
H
set “H”
2 => H
H
H
H
1 => BD_Normal
2 => H
FB
FB
Not_Sleep
7)
5
BD_ReceiveOnly
set “L”
L
H
H
H
H
1 => BD_Standby
H
1 => H
1 => H
Not_Sleep
7)
6
BD_ReceiveOnly
set “L”
L
L
H
H
H
1 => BD_Standby
1 => L
1 => L
1 => L
Not_Sleep
8)
7
BD_ReceiveOnly
set “L”
set “H”
H
H
H
H
1 => BD_GoToSleep
H
1 => H
1 => H
Not_Sleep
9)
8
BD_ReceiveOnly
set “L”
set “H”
L
H
H
H
1 => BD_Standby
1 => L
1 => L
1 => L
Not_Sleep
8) 10)
,
BD_GoToSleep Command
9
BD_GoToSleep
set “H”
H
2 => H
H
H
H
1 => BD_Normal
2 => H
1=>FB
1=>FB
Not_Sleep
9) 11)
10
BD_GoToSleep
L
set “L”
H
H
H
H
1 => BD_Standby
H
H
H
Not_Sleep
9) 11)
Not_Sleep
9) 11)
11
12
BD_GoToSleep
BD_GoToSleep
set “H”
set “L”
H
H
H
H
1 => BD_ReceiveOnly
H
1=>FB
1=>FB
,
,
,
L
H
H
H
H
H
1 => BD_Sleep
H
H
H
1 => Sleep
9) 11)
,
BD_Standby
13
BD_Standby
L
set “H”
H
H
H
H
1 => BD_GoToSleep
H
H
H
Not_Sleep
9)
14
BD_Standby
L
set “H”
L
H
H
H
BD_Standby
L
L
L
Not_Sleep
10)
15
BD_Standby
set “H”
L
H
H
H
H
1 => BD_ReceiveOnly
H
1=>FB
1=>FB
Not_Sleep
–
16
BD_Standby
set “H”
L
L
H
H
H
1 => BD_ReceiveOnly
1 => H/L 1=>FB
1=>FB
Not_Sleep
12)
17
BD_Standby
set “H”
set “H”
2 => H
H
H
H
1 => BD_Normal
2=> H
1=>FB
1=>FB
Not_Sleep
7)
L
set “H”
H
H
H
H
BD_Sleep
H
H
H
Sleep
13) 14)
Sleep
13) 14)
1 => Not_Sleep
7) 14)
1 => Not_Sleep
14)
BD_Sleep
18
19
20
21
BD_Sleep
BD_Sleep
BD_Sleep
BD_Sleep
Data Sheet
L
set “H”
set “H”
set “L”
set “H”
set “L”
H
2 => H
H
H
H
H
H
H
H
H
H
H
BD_Sleep
1 => BD_Normal
1 => BD_ReceiveOnly
45
H
2 => H
H
H
1=>FB
1=>FB
H
1=>FB
1=>FB
,
,
,
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
1) The table describes the states and signals of flags, operating modes and output pins. This table does not contain any timing information. Time for mode changes or the response time of
the digital outputs are specified in the electrical characteristics (compare with Table 21).
2) All flags are “low” active. “L” means the flag is set.
“X” = “don’t care”.
The color red stands for the event which triggered the mode transition.
For example: set “L” or set “H”.
The color blue stands for the consequence of the trigger event.
The numbers, “1 =>”, “2 =>” indicate the order of the consequences.
For example: “1=> BD_Normal” means the transceiver TLE9221SX changes over to BD_Normal mode.
“2=> H” means the flag is cleared after the TLE9221SX has changed over to BD_Normal mode.
“FB” stands for “Follow Bus” and means that depending on the signal on the FlexRay bus, the pins RxD and RxEN can either be “high” or “low”.
3) The wake-up flag stands for a detected wake-up event (compare with Chapter 7.3 and Table 10).
The uVBAT flag is the same as the uVBAT undervoltage flag, which is set after the uVBAT undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVIO flag is the same as the uVIO undervoltage flag, which is set after the uVIO undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVCC flag is the same as the uVCC undervoltage flag, which is set after the uVCC undervoltage detection timer expires (compare with Chapter 8.3.1).
4) The ERRN output indicates the wake-up flag, the wake-up source bit and the error bit (compare with Table 9). The error bit is set only by the undervoltage bits, such as the uVBAT
undervoltage bit (bit 8), the uVCC undervoltage bit (bit 9) and the uVIO undervoltage bit (bit 10). All other possible sources setting the error bit, such as, for example a bus failure or an
overtemperature event, are considered as not set in this table.
5) The signal at the ERRN output pin depends on the host command applied and not on the current operating mode (compare with Chapter 6.3).
6) The signals at the RxD and RxEN outputs depend on the current operation mode, and are independent of the host command applied (compare with Table 5).
7) While TLE9221SX changes over to BD_Normal mode, the wake-up flag is cleared. Moreover, the wake-up flag cannot be set in non-low power mode, and therefore the wake-up flag is
always “high” in BD_Normal mode (see Chapter 7.3).
8) The wake-up flag was set during a previous wake-up event while the TLE9221SX was in low power mode.
9) The interim mode will automatically be left to BD_Sleep when the timer dBDSleep expires. If the host command does not change within the time dBDSleep, the TLE9221SX changes over by
default to BD_Sleep mode (see Chapter 9.2.1).
10) The BD_GoToSleep command cannot be executed while the wake-up flag is active (see Figure 34). The TLE9221SX changes over directly to BD_StandBy mode.
11) Since the BD_GoToSleep command can be executed only when the wake-up flag is cleared, the wake-up flag is always “high” while the TLE9221SX executes the BD_GoToSleep
command.
12) If the host command BD_ReceiveOnly mode is applied, the ERRN output indicates the wake-up source bit (see Table 9).
13) The EN input pin of the Host Interface is disabled in BD_Sleep mode, as long the STBN input pin remains “low” (see Chapter 9.2.2).
14) A wake-up event would change the operation mode from BD_Sleep to BD_Standby, therefore, the wake-up flag is always “high” while the TLE9221SX remains in BD_Sleep mode.
Data Sheet
46
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
9.2.1
Entering BD_Sleep Mode via the BD_GoToSleep Command
The BD_GoToSleep command can be executed from every non-low power mode and from BD_Standby mode by
applying the host command STBN = “L” and EN = “H”. The BD_GoToSleep command cannot be executed from
BD_Sleep mode (see Figure 32).
When the transceiver TLE9221SX recognizes the host command BD_GoToSleep, the TLE9221SX changes over
to the interim mode “BD_GoToSleep command” and starts an internal timer. In case the EN input and the STBN
input remain unchanged during the BD_Sleep mode detection window (t = dBDSleep), the operating mode
automatically changes over to BD_Sleep mode. The time for the mode change, dBDModeChange, is defined as the
time interval between applying the host command and changing over to BD_Sleep mode (see Figure 33).
t = dBDLogicFilter
t = dBDSleep
STBN
t
t = dBDModeChange
EN
don’t care
t
BD_Normal mode
BD_GoToSleep command
BD_Sleep mode
host command detection
INH
t
RxD
RxEN
follow Bus
t
ERRN
t
All wake-up bits and the error bit are cleared, therefore the ERRN, RxD and RxEN outputs are “high”
Figure 33
Entering BD_Sleep mode
The BD_GoToSleep command can be executed only when the wake-up flag is cleared. When the wake-up flag is
cleared, the output pins RxD and RxEN are set to logical “high” in BD_Sleep mode and also during the execution
of the “BD_GoToSleep command”.
In case the changeover to BD_Sleep mode is made by a host command, the EN input is disabled in BD_Sleep
mode (see Figure 32, Figure 33 and Table 13).
Applying the BD_GoToSleep host command to the TLE9221SX, while the wake-up flag is active, changes the
operating mode directly to BD_Standby mode. The RxD and RxEN outputs are set to “low” and indicate a previous
wake-up event (see Figure 34 and Table 13).
Data Sheet
47
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
t = dBDLogicFilter
STBN
t
t = dBDModechange
EN
don’t care
t
BD_ReceiveOnly mode
mode transition
BD_Standby mode
host command detection
INH
t
RxD
RxEN
follow Bus
t
Figure 34
Changing over to BD_Standby, with an active wake-up flag
9.2.2
Quitting BD_Sleep by Host Command
Changeover to BD_Sleep mode can be made by a host command or by an undervoltage event. In case
changeover to BD_Sleep was made by a host command via the BD_GoToSleep command, the EN input pin gets
disabled when the TLE9221SX changes over to BD_Sleep mode.
As long as the STBN input pin remains at logical “low”, any signal change at the EN input is ignored and does not
trigger any mode change. Signal change at the STBN input pin enables the EN input as well and a mode change
is possible.
Via a host command, BD_Sleep mode can only change to BD_Normal mode or to BD_ReceiveOnly mode (see
Figure 32 and Table 13).
9.3
Operating Mode Changeover by Undervoltage Flag
Besides a valid host command, any changeovers in the operating mode may also be triggered by setting the
undervoltage flag after the undervoltage detection timer has expired (compare with Chapter 8.3.1). Setting the
uVIO or the uVBAT undervoltage flag changes the mode of operation to BD_Sleep, and setting the uVCC
undervoltage flag changes the mode of operation to BD_Standby.
If the transceiver TLE9221SX changes over to BD_Sleep mode by setting the uVIO or uVBAT undervoltage flag, the
EN input pin remains active even in BD_Sleep mode.
In case any undervoltage flag becomes active, while the FlexRay transceiver TLE9221SX is executing the
BD_GoToSleep command, the mode of operation changes directly to BD_Sleep (see Table 14 and Figure 35).
Data Sheet
48
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
Setting the undervoltage flag does not cause any change in the operating mode, if the transceiver is already in
BD_Sleep mode.
BD_Off
uVBAT > uBDUVVBAT
and
uVCC > uBDUVVCC
BD_Normal
STBN
H
EN
H
24
INH
Not_Sleep
BD_ReceiveOnly
22
23
STBN
H
BD_Standby
EN
L
INH
Not_Sleep
BD_GoToSleep
STBN
L
EN
L
36
37
INH
Not_Sleep
EN
H
INH
25
26
STBN
L
28 29
33
Not_Sleep
27
30
34
35
31
32
BD_Sleep
STBN
L
EN
H
INH
Sleep
38 39 40
Figure 35
Data Sheet
Operating mode changes by undervoltage flag
49
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
Table 14
No.
Mode changes by setting the undervoltage flags 1) 2) 3) 4)
Primary
STBN
Operating Mode
EN
Wakeup Flag
uVBAT
Flag
uVIO
Flag
uVCC
Flag
Secondary Operating ERRN5) RxD6)
Mode
RxEN6) INH
Remarks
H
H
set “L”
H
X
1 => BD_Sleep
1 => H
1 => Sleep
7) 8)
2 => Sleep
7) 9) 10)
BD_Normal Mode
22
23
BD_Normal
BD_Normal
H
X
X
H
X
set “L”
X
2 => BD_Sleep
1 => L
1 => L
1 => H
1 => L
1 => L
,
, ,
H
H
H
H
H
set “L”
1 => BD_Standby
1 => L
1 => H
1 => H
Not_Sleep
7)
25
BD_ReceiveOnly H
L
H
set “L”
H
X
1 => BD_Sleep
1 => L
1 => H
1 => H
1 => Sleep
8)
26
BD_ReceiveOnly H
L
L
set “L”
H
X
1 => BD_Sleep
H/L
1 => L
1 => L
1 => Sleep
8) 11) 12)
24
BD_Normal
BD_ReceiveOnly Mode
,
,
27
BD_ReceiveOnly X
X
X
X
set “L”
X
2 => BD_Sleep
1 => L
1 => L
1 => L
2 => Sleep
9) 10)
28
BD_ReceiveOnly H
L
H
H
H
set “L”
1 => BD_Standby
1 => L
1 => H
1 => H
Not_Sleep
–
29
BD_ReceiveOnly H
L
L
H
H
set “L”
1 => BD_Standby
H/L
1 => L
1 => L
Not_Sleep
11) 12)
,
,
BD_GoToSleep Command
30
BD_GoToSleep
L
H
H
set “L”
X
X
1 => BD_Sleep
H
H
H
1 => Sleep
8) 13) 14)
31
BD_GoToSleep
X
X
H
X
set “L”
X
1 => BD_Sleep
1 => L
1 => L
1 => L
1 => Sleep
9) 13) 14)
32
BD_GoToSleep
,
,
,
,
L
H
H
X
X
set “L”
1 => BD_Sleep
H
H
H
1 => Sleep
13) 14)
L
L
H
set “L”
H
X
1 => BD_Sleep
H
H
H
1 => Sleep
8)
1 => Sleep
8) 11)
,
BD_Standby
33
34
BD_Standby
BD_Standby
L
L
L
set “L”
H
X
1 => BD_Sleep
L
L
L
,
,
35
BD_Standby
X
X
X
X
set “L”
X
1 => BD_Sleep
1 => L
1 => L
1 => L
1 => Sleep
9)
36
BD_Standby
L
L
H
H
H
set “L”
1 => BD_Standby
H
H
H
Not_Sleep
–
37
BD_Standby
L
L
L
H
H
set “L”
1 => BD_Standby
L
L
L
Not_Sleep
11)
L
X
H
set “L”
X
X
1 => BD_Sleep
H
H
H
Sleep
8)
BD_Sleep
38
BD_Sleep
,
39
BD_Sleep
X
X
H
X
set “L”
X
1 => BD_Sleep
H
H
H
Sleep
9)
40
BD_Sleep
L
X
H
X
X
set “L”
1 => BD_Sleep
H
H
H
Sleep
–
1) The table describes the states and signals of flags, operating modes and output pins. This table does not contain any timing information. Time for mode changes or the response time of
the digital outputs are specified in the electrical characteristics (compare with Table 21).
Data Sheet
50
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
2) All flags are “low” active. “L” means the flag is set.
“X” = “don’t care”.
The color red stands for the event which triggered the mode transition.
For example: set “L” or set “H”.
The color blue stands for the consequence of the trigger event.
The numbers, “1 =>”, “2 =>” indicate the order of the consequences.
For example: “1=> BD_Normal” means the transceiver TLE9221SX changes over to BD_Normal mode.
“2=> H” means the flag is cleared after the TLE9221SX has changed over to BD_Normal mode.
“FB” stands for “Follow Bus” and means that depending on the signal on the FlexRay bus, the pins RxD and RxEN can either be “high” or “low”.
3) The wake-up flag stands for a detected wake-up event (compare with Chapter 7.3 and Table 10).
The uVBAT flag is the same as the uVBAT undervoltage flag, which is set after the uVBAT undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVIO flag is the same as the uVIO undervoltage flag, which is set after the uVIO undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVCC flag is the same as the uVCC undervoltage flag, which is set after the uVCC undervoltage detection timer expires (compare with Chapter 8.3.1).
4) The ERRN output indicates the wake-up flag, the wake-up source bit and the error bit (compare with Table 9). The error bit is set only by the undervoltage bits, such as the uVBAT
undervoltage bit (bit 8), the uVCC undervoltage bit (bit 9) and the uVIO undervoltage bit (bit 10). All other possible sources setting the error bit, such as, for example a bus failure or an
overtemperature event, are considered as not set in this table.
5) The signal at the ERRN output pin depends on the host command applied and not on the current operating mode (compare with Chapter 6.3).
6) The signals at the RxD and RxEN outputs depend on the current operation mode, and are independent of the host command applied (compare with Table 5).
7) While TLE9221SX changes over to BD_Normal mode, the wake-up flag is cleared. Moreover, the wake-up flag cannot be set in non-low power mode, and therefore the wake-up flag is
always “high” in BD_Normal mode (see Chapter 7.3).
8) The uVBAT undervoltage flag overrules the uVCC undervoltage flag (see Chapter 9.3.1).
9) An undervoltage event at uVIO blocks the Host Interface at once and sets all outputs to logical “low” (see Chapter 8.3.4 and Figure 28). The transceiver TLE9221SX can not indicate the
error bit and the wake-up flag.
10) The uVIO undervoltage flag overrules the uVCC undervoltage flag (see Chapter 9.3.1).
11) The wake-up flag was set during a previous wake-up event while the TLE9221SX was in low power mode.
12) If the host command BD_ReceiveOnly mode is applied, the ERRN indicates the wake-up source bit (see Table 9).
13) Since the BD_GoToSleep command can be executed only when the wake-up flag is cleared, the wake-up flag is always “high” while the TLE9221SX executes the BD_GoToSleep
command.
14) The BD_GoToSleep command is considered as low power mode and the ERRN indicates the wake-up flag just as in the BD_Sleep or BD_Standby mode (see Table 9).
Data Sheet
51
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
9.3.1
Priorities of Undervoltage Events
Even if there are undervoltage events on both power supplies uVBAT and uVCC, together with an undervoltage
event on the reference supply uVIO, the Central State Machine is operating and handles the undervoltage events.
An undervoltage event on uVIO blocks the Host Interface at once and interrupts the communication before the uVIO
undervoltage timer expires. When the uVIO undervoltage timer expires, the TLE9221SX changes the mode of
operation to BD_Sleep. In case the uVCC undervoltage flag is set, the uVIO undervoltage flag overrules the uVCC
undervoltage flag.
If the uVCC undervoltage flag was set before the uVIO undervoltage flag, the mode of operation changes from
BD_Standby to BD_Sleep mode.
If the uVIO undervoltage flag was set before the uVCC undervoltage flag, the mode of operation remains in
BD_Sleep mode.
During an uVBAT undervoltage event, the Host Interface and also the Communication Controller Interface
continues to work until the undervoltage detection timer expires. The uVBAT undervoltage flag also overrules a
uVCC undervoltage flag and the transceiver TLE9221SX ends up in BD_Sleep mode. Simultaneous undervoltage
events at uVBAT and uVIO, additionally disable the Host Interface and the Communication Controller Interface in
comparison to a single uVBAT undervoltage event. After the undervoltage detection timer expires, the TLE9221SX
changes over to BD_Sleep mode.
The least significant undervoltage flag is the uVCC undervoltage flag. An active uVCC undervoltage flag changes
the mode of operation from non-low power mode to BD_Standby mode, when no other undervoltage flag is set.
During an uVCC undervoltage event the Transmitter is disabled.
9.4
Operating Mode Changes by Undervoltage Recovery
As stated in Chapter 8.3, any undervoltage flag causes a change in the operating mode and blocks the Host
Interface and the Communication Controller Interface.
After recovering from the undervoltage condition, and after the undervoltage flags are cleared, the FlexRay
transceiver TLE9221SX enables the Host Interface and also the Communication Controller Interface and the host
command applied at the inputs STBN and EN changes the mode of operation accordingly (see Figure 36 and
Table 15).
9.4.1
BD_Sleep Mode Entry Flag
A special case is the undervoltage recovery from BD_Sleep mode while the host command BD_Standby is applied
to the Host Interface.
According to the FlexRay EPL Specification, version 3.0.1, the EN input pin shall be disabled while the device is
in BD_Sleep mode. A mode changeover via host command from BD_Sleep mode to BD_Standby mode is not
permitted (compare with Table 13). In order to be compliant with the FlexRay Conformance Test version 3.0.1 it
is mandatory to distinguish the host command BD_Sleep from BD_Standby, after the transceiver recovers from
an undervoltage event.
The BD_Sleep mode entry flag indicates, how the changeover to BD_Sleep mode occurred. If changeover to
BD_Sleep mode took place by setting an undervoltage flag, the BDSME flag (BD_Sleep Mode Entry) is set to “low”
and the EN input pin remains active. If changeover to BD_Sleep mode took place by a host command, the BDSME
flag is set to logical “high” and the EN input pin gets disabled (see Table 15).
The BDSME is an internal flag and it is neither indicated at the ERRN output nor latched in the SIR.
Data Sheet
52
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
BD_Normal
STBN
H
EN
H
56
INH
Not_Sleep
BD_ReceiveOnly
41
42
43
STBN
H
BD_Standby
57
EN
L
60
INH
Not_Sleep
STBN
L
58
EN
L
INH
Not_Sleep
59
61
BD_GoToSleep
44
45
STBN
L
EN
H
51
INH
53
Not_Sleep
55
46
BD_Sleep
STBN
L
EN
H
INH
Sleep
54 52 50 49 48 47
Figure 36
Data Sheet
Change in the mode of operation by undervoltage recovery
53
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
Table 15
No.
Mode changes via undervoltage recovery1) 2) 3) 4)
Primary
STBN EN
Operating Mode
Wake- BDSME
Flag5)
up
Flag
uVBAT
Flag
uVIO
Flag
uVCC
Flag
Secondary Operating ERRN6) RxD7)
Mode
RxEN7) INH
Remarks
set “H”
H
H
1 => BD_Normal
1=>FB
1 => Not_Sleep
8) 9)
1 => Not_Sleep
8) 9)
BD_Sleep -> Host Command BD_Normal
41
42
43
BD_Sleep
BD_Sleep
BD_Sleep
H
H
H
H
H
H
2 => H X
2 => H X
2 => H X
H
set “H”
H
1 => BD_Normal
H
H
set “H”
1 => BD_Normal
2 => H
2 => H
2 => H
1=>FB
1=>FB
1=>FB
,
,
1=>FB
1=>FB
1 => Not_Sleep
8) 9) 10)
, ,
BD_Sleep -> Host Command BD_ReceiveOnly
44
BD_Sleep
H
L
X
X
set “H”
H
H
1 => BD_ReceiveOnly H/L
1=>FB
1=>FB
1 => Not_Sleep
11)
45
BD_Sleep
H
L
X
X
H
set “H”
H
1 => BD_ReceiveOnly H/L
1=>FB
1=>FB
1 => Not_Sleep
11)
46
BD_Sleep
H
L
X
X
H
H
set “H”
1 => BD_ReceiveOnly H/L
1=>FB
1=>FB
1 => Not_Sleep
10) 11)
,
BD_Sleep -> Host Command BD_Sleep
47
BD_Sleep
L
H
H
X
set “H”
H
H
BD_Sleep
H
H
H
Sleep
12)
48
BD_Sleep
L
H
H
X
H
set “H”
H
BD_Sleep
1 => H
1 => H
1 => H
Sleep
12)
49
BD_Sleep
L
H
H
X
H
H
set “H”
BD_Sleep
H
H
H
Sleep
10) 12)
,
BD_Sleep -> Host Command BD_Standby
50
BD_Sleep
L
L
H
H
set “H”
H
H
BD_Sleep
H
H
H
Sleep
12) 13)
51
BD_Sleep
L
L
H
L
set “H”
H
H
1 => BD_Standby
H
H
H
1 => Not_Sleep
12) 14)
Sleep
12) 13)
1 => Not_Sleep
12) 14)
Sleep
12) 13)
52
53
54
55
BD_Sleep
BD_Sleep
BD_Sleep
BD_Sleep
L
L
L
L
L
L
H
H
H
H
L
H
H
H
H
set “H”
set “H”
H
H
BD_Sleep
H
1 => BD_Standby
set “H”
BD_Sleep
1 => H
1 => H
H
1 => H
1 => H
H
1 => H
1 => H
H
,
,
,
,
,
,
L
L
H
L
H
H
set “H”
1 => BD_Standby
H
H
H
1 => Not_Sleep
12) 14)
H
H
2 => H X
H
H
set “H”
1 => BD_Normal
2 => H
1=>FB
1=>FB
Not_Sleep
8) 9) 15)
,
BD_Standby
56
BD_Standby
, ,
57
BD_Standby
H
L
X
X
H
H
set “H”
1 => BD_ReceiveOnly H/L
1=>FB
1=>FB
Not_Sleep
11) 15) 16)
,
,
58
BD_Standby
L
L
H
X
H
H
set “H”
BD_Standby
H
H
H
Not_Sleep
15)
59
BD_Standby
L
L
L
X
H
H
set “H”
BD_Standby
L
L
L
Not_Sleep
15) 16)
,
,
,
60
BD_Standby
L
H
H
X
H
H
set “H”
1 => BD_GoToSleep
H
H
H
Not_Sleep
15)
61
BD_Standby
L
H
L
X
H
H
set “H”
BD_Standby
L
L
L
Not_Sleep
15) 16)
Data Sheet
54
,
,
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
1) The table describes the states and signals of flags, operating modes and output pins. This table does not contain any timing information. Time for mode changes or the response time of
the digital outputs are specified in the electrical characteristics (compare with Table 21).
2) All flags are “low” active. “L” means the flag is set.
“X” = “don’t care”.
The color red stands for the event which triggered the mode transition.
For example: set “L” or set “H”.
The color blue stands for the consequence of the trigger event.
The numbers, “1 =>”, “2 =>” indicate the order of the consequences.
For example: “1=> BD_Normal” means the transceiver TLE9221SX changes over to BD_Normal mode.
“2=> H” means the flag is cleared after the TLE9221SX has changed over to BD_Normal mode.
“FB” stands for “Follow Bus” and means that depending on the signal on the FlexRay bus, the pins RxD and RxEN can either be “high” or “low”.
3) The wake-up flag stands for a detected wake-up event (compare with Chapter 7.3 and Table 10).
The uVBAT flag is the same as the uVBAT undervoltage flag, which is set after the uVBAT undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVIO flag is the same as the uVIO undervoltage flag, which is set after the uVIO undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVCC flag is the same as the uVCC undervoltage flag, which is set after the uVCC undervoltage detection timer expires (compare with Chapter 8.3.1).
4) The ERRN output indicates the wake-up flag, the wake-up source bit and the error bit (compare with Table 9). The error bit is set only by the undervoltage bits, such as the uVBAT
undervoltage bit (bit 8), the uVCC undervoltage bit (bit 9) and the uVIO undervoltage bit (bit 10). All other possible sources setting the error bit, such as, for example, a bus failure or an
overtemperature event, are considered as not set in this table.
5) BD_Sleep mode entry flag disables the EN input pin when set to logical “low” (see Chapter 9.4.1)
6) The signal at the ERRN output pin depends on the host command applied and not on the current operating mode (compare with Chapter 6.3).
7) The signals at the RxD and RxEN outputs depend on the current operating mode, and are independent of the host command applied (compare with Table 5).
8) While TLE9221SX changes over to BD_Normal mode the wake-up flag is cleared. Moreover, the wake-up flag cannot be set in non-low power mode, and therefore, the wake-up flag is
always “high” in BD_Normal mode (see Chapter 7.3).
9) Changing over to BD_Normal mode clears the SIR, including the undervoltage bits and therefore sets the ERRN output to “high” (compare with Chapter 6.3.1).
10) BD_Sleep mode was either entered by a host command or by setting the uVBAT or uVIO undervoltage flag (see Table 14).
11) If the host command BD_ReceiveOnly mode is applied, the ERRN output indicates the wake-up source bit (see Table 9).
12) This assumes no wake-up event was detected and the wake-up flag is cleared.
13) The BDSME flag is cleared, changeover to BD_Sleep mode was made by a host command (see Chapter 9.4.1).
14) The BDSME flag is set, changeover to BD_Sleep mode was made by setting one or more undervoltage flags (see Chapter 9.4.1).
15) In BD_Standby mode, only the uVCC undervoltage flag could be active, since any other active undervoltage flag would change the mode of operation to BD_Sleep mode (compare with
Table 14).
16) A wake-up flag could have been set by a wake-up event while the transceiver was in BD_Standby mode.
Data Sheet
55
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
9.5
Operation Mode Changes by the Wake-up Flag
Setting the wake-up flag triggers a mode change to BD_Standby mode, regardless of the transceiver being in
BD_Sleep mode or in the BD_GoToSleep command. While the transceiver TLE9221SX remains in BD_Standby
mode, a wake-up event sets the wake-up bit and the wake-up flag. The wake-up flag is indicated at the ERRN,
RxD and RxEN outputs. No mode change by the wake-up event is applied (for details see Figure 37 and
Table 16).
The wake-up flag can be set only in BD_Sleep mode, BD Standby mode or while the BD_GoToSleep command
is being executed (for details see “Wake-up Flag and Wake-up Bits” on Page 29).
While the wake-up flag is active, the FlexRay transceiver TLE9221SX cannot change over to BD_Sleep mode
again (see Figure 34). To reset the wake-up flag, either change the operating mode of the TLE9221SX to
BD_Normal mode or read out the SIR.
BD_GoToSleep
STBN
L
BD_Standby
EN
H
65
STBN
L
EN
L
64
INH
Not_Sleep
INH
Not_Sleep
62
63
BD_Sleep
STBN
L
EN
H
INH
Sleep
Figure 37
Operating mode change by wake-up flag
Setting the wake-up flag triggers not only a change in the operating mode, but also clears all undervoltage flags.
The undervoltage bits available in the SIR remain active.
In case the undervoltage event remains present, setting the wake-up flag clears the undervoltage flag. The
undervoltage detection timer is restarted and the undervoltage flag is set again when the undervoltage detection
timer expires.
Note: Setting the wake-up flag clears only the undervoltage flag, not the undervoltage bit. The undervoltage bit
remains active and is visible in the SIR.
Data Sheet
56
Rev. 1.10, 2013-07-15
TLE9221SX
Operating Mode Description
Table 16
No.
Mode changes by setting the wake-up flag 1) 2) 3) 4)
Primary
STBN EN
Operating Mode
Wakeup Flag
uVBAT
Flag
uVIO
Flag
uVCC
Flag
Secondary Operating ERRN5) RxD6)
Mode
RxEN6) INH
Remarks
BD_Sleep
62
BD_Sleep
L
L
set “L”
2 => H
2 => H
2 => H
1 => BD_Standby
1 => L
1 => L
1 => L
1 => Not_Sleep
7)
63
BD_Sleep
L
H
set “L”
2 => H
2 => H
2 => H
1 => BD_Standby
1 => L
1 => L
1 => L
1 => Not_Sleep
7)
L
L
set “L”
H
H
2 => H
BD_Standby
1 => L
1 => L
1 => L
Not_Sleep
7) 8)
L
H
set “L”
2 => H
2 => H
2 => H
1 => BD_Standby
1 => L
1 => L
1 => L
1 => Not_Sleep
7) 8)
BD_Standby
64
BD_Standby
,
BD_GoToSleep
65
BD_GoToSleep
,
1) The table describes the states and signals of flags, operating modes and output pins. This table does not contain any timing information. Time for mode changes or the response time of
the digital outputs are specified in the electrical characteristics (compare with Table 21).
2) All flags are “low” active. “L” means the flag is set.
“X” = “don’t care”.
The color red stands for the event which triggered the mode transition.
For example: set “L” or set “H”.
The color blue stands for the consequence of the trigger event.
The numbers, “1 =>”, “2 =>” indicate the order of the consequences.
For example: “1=> BD_Normal” means the transceiver TLE9221SX changes over to BD_Normal mode.
“2=> H” means the flag is cleared after the TLE9221SX has changed over to BD_Normal mode.
“FB” stands for “Follow Bus” and means that depending on the signal on the FlexRay bus, the pins RxD and RxEN can either be “high” or “low”.
3) The wake-up flag stands for a detected wake-up event (compare with Chapter 7.3 and Table 10).
The uVBAT flag is the same as the uVBAT undervoltage flag, which is set after the uVBAT undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVIO flag is the same as the uVIO undervoltage flag, which is set after the uVIO undervoltage detection timer expires (compare with Chapter 8.3.1).
The uVCC flag is the same as the uVCC undervoltage flag, which is set after the uVCC undervoltage detection timer expires (compare with Chapter 8.3.1).
4) The ERRN output indicates the wake-up flag, the wake-up source bit and the error bit (compare with Table 9). The error bit is set only by the undervoltage bits, such as the uVBAT
undervoltage bit (bit 8), the uVCC undervoltage bit (bit 9) and the uVIO undervoltage bit (bit 10). All other possible sources setting the error bit, such as, for example, a bus failure or an
overtemperature event, are considered as not set in this table.
5) The signal at the ERRN output pin depends on the host command applied and not on the current operating mode (compare with Chapter 6.3).
6) The signals at the RxD and RxEN outputs depend on the current operation mode, and are independent of the host command applied (compare with Table 5).
7) Setting the wake-up flag also resets all undervoltage flags.
8) In BD_Standby mode, only the uVCC undervoltage flag can be active (see Table 14).
Data Sheet
57
Rev. 1.10, 2013-07-15
TLE9221SX
Bus Error Indication
10
Bus Error Indication
In case the TLE9221SX is not able to drive the correct data to the FlexRay bus, the transceiver sets the bus error
bit (bit 4). The bus error bit indicates faulty data by setting the ERRN output to “low” (compare with Table 9).
Therefore, three different detection mechanisms are implemented:
•
•
•
uVCC undervoltage detection
RxD and TxD bit comparison
Overcurrent detection
Just as any other SIR entry, the bus error bit is reset either by a SIR read-out or by changing over to BD_Normal
mode (compare with Chapter 6.3.1 “Reset the ERRN Output Pin”).
Setting the bus error bit disables the Transmitter of the TLE9221SX in order to avoid corrupt data on the FlexRay
bus. An active bus error bit does not trigger any change in the mode of operation.
10.1
Setting the Bus Error Bit by uVCC Undervoltage
The Transmitter of the TLE9221SX is fed by the power supply uVCC (compare with Figure 2). In case uVCC is in
undervoltage condition, the TLE9221SX cannot drive the correct bus levels to the FlexRay bus. Therefore, the
transceiver sets the uVCC undervoltage bit together with the bus error bit and the error bit.
In BD_Normal mode, the active uVCC undervoltage bit and the active bus error bit disable the Transmitter. The
uVCC undervoltage bit starts the uVCC undervoltage timer and if the timer expires, the undervoltage flag is set and
a mode changeover is initiated (see also Chapter 8.3.3 “Undervoltage Event at uVCC”).
10.2
Setting the Bus Error Bit by RxD and TxD Comparison
The transceiver TLE9221SX compares the digital input signal at TxD with the signal received from the FlexRay
bus at the RxD output. If the data transmit signal at the TxD input is different from the signal received at the RxD
output, the TLE9221SX sets the bus error bit.
The RxD to TxD bit comparison is active only, when the transceiver TLE9221SX is in BD_Normal mode and the
Transmitter is active (TxEN = “low”; BGE = “high”). Both, the rising and the falling edge at the TxD input signal
trigger an internal comparator to compare the TxD signal with the RxD signal. The results are stored in an internal
error counter. When the internal error counter exceeds 10 reported comparison failures, the bus error bit is set.
The error counter is reset when the Transmitter is reset.
10.3
Setting the Bus Error Bit by Overcurrent Detection
Four different current sensors monitor the output current and the input current at the pins BP and BM. In case the
TLE9221SX detects an overcurrent caused by a bus short-circuit either to GND or to one of the power supplies,
the TLE9221SX sets the bus error bit.
Data Sheet
58
Rev. 1.10, 2013-07-15
TLE9221SX
Overtemperature Protection
11
Overtemperature Protection
The Transmitter of TLE9221SX is protected against overheating with an internal temperature sensor (compare
with Figure 4). The temperature sensor provides two temperature thresholds: TJ(Warning) and TJ(Shut_Down).
On exceeding the lower threshold TJ(Warning), the transceiver sets the overtemperature warning bit (bit 6), indicating
a “high” temperature situation. On exceeding the upper threshold TJ(Shut_Down), the transceiver TLE9221SX sets the
overtemperature shut down bit (bit 5), indicating a critical temperature situation. On reaching the TJ(Shut_Down)
threshold, the transceiver TLE9221SX also disables the Transmitter (see Figure 38). The overtemperature
detection of the Transmitter is active only in BD_Normal mode. An overtemperature detection event does not
trigger any change in the operating mode.
Both bits, the overtemperature shut down bit and the overtemperature warning bit set the error bit (bit 11) in the
SIR. The error bit is indicated at the ERRN output (compare with Chapter 6.3 “Status Information at the ERRN
Output Pin”).
The Transmitter can be enabled again after an overtemperature event by clearing the SIR (see also
Chapter 6.2.3 “Clearing Sequence of SIR”).
TJ
TJ(Shut_Down)
TJ(Warning)
t
BP
BM
t
TxD
t
RxD
t
ERRN
dReTimeERRN
t
BD_Normal
Figure 38
Data Sheet
Overtemperature protection
59
Rev. 1.10, 2013-07-15
TLE9221SX
Transmitter Time-out
12
Transmitter Time-out
To ensure that an active Transmitter blocks the FlexRay bus permanently, a time-out function is implemented
within the TLE9221SX. In case the Transmitter is active for the time period t > dBDTxActiveMax, the Transmitter
will be disabled automatically (see Figure 39). The Transmitter time-out sets the Transmitter time-out bit (bit 7) in
the SIR and also the error bit. In BD_Normal mode, the Transmitter time-out is indicated at the ERRN output by a
logical “low” signal. To reset the TxEN or BGE time-out, either change over again to BD_Normal mode or read out
the SIR (see Chapter 6.3.1 “Reset the ERRN Output Pin”).
TxEN
transmitter time-out
t
dBDTxActiveMax
BGE
t
transmitter “Idle”
transmitter “active”
transmitter “Idle”
BP
BM
t
TxD
t
RxD
t
ERRN
dReactionTimeERRN
t
BD_Normal
Figure 39
Data Sheet
Transmitter time-out function
60
Rev. 1.10, 2013-07-15
TLE9221SX
Mode Indication, Power-up and Parity Information
13
Mode Indication, Power-up and Parity Information
13.1
Power-up Bit
After switching on the power supplies uVCC and uVBAT, the FlexRay transceiver TLE9221SX sets the power-up bit
(bit 3) in the SIR. The power-up bit is visible only by reading out the SIR and will be reset by clearing the SIR (see
Chapter 6.2.3 “Clearing Sequence of SIR”).
13.2
Mode Indication Bit EN and Mode Indication Bit STBN
Two bits in the SIR are reserved for the indication of the operating mode. The SIR indicates the current mode of
operation, regardless of whether the mode is selected via host command, undervoltage flag or wake-up flag. The
mode indication bits have the same order as the host commands. Bit 13 of the SIR reflects the related host
command at the EN pin of the actual mode of operation and bit 14 indicates the related host command at the STBN
pin (compare with Table 17).
Table 17
Mode indication bits
Mode of Operation
Mode Indication Bit EN (bit 13)
Mode Indication Bit STBN (bit 14)
BD_Normal
“high”
“high”
BD_ReceiveOnly
“low”
“high”
BD_Standby
“low”
“low”
BD_Sleep
no read-out possible
no read-out possible
BD_GoToSleep
no read-out possible
no read-out possible
13.3
Even Parity Bit
The even parity bit (bit 15) can be used to check the transmission of the SIR. The even parity bit is set to logical
“low” if the sum of all status bits is even, and it is logical “high” if the sum of all status bits is odd.
Data Sheet
61
Rev. 1.10, 2013-07-15
TLE9221SX
General Product Characteristics
14
General Product Characteristics
14.1
Absolute Maximum Ratings
Table 18
Absolute maximum ratings voltages, currents and temperatures1)
All voltages with respect to ground; positive current flowing into the pin;
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Unit
Remarks
Max.
Voltages
14.1.1 Supply voltage battery
uVBAT
-0.3
40
V
–
14.1.2 Supply voltage VCC
uVCC
-0.3
6.0
V
–
14.1.3 Supply voltage VIO
uVIO
-0.3
6.0
V
–
14.1.4 DC voltage versus GND on
the pin BP
uBP
-40
40
V
–
14.1.5 DC voltage versus GND on
the pin BM
uBM
-40
40
V
–
14.1.6 DC voltage versus GND on
the pin INH
uINH
-0.3
uVBAT + 0.3 V
–
14.1.7 DC voltage versus GND on
the pin WAKE
uWAKE
-27
uVBAT + 0.3 V
–
14.1.8 DC voltage versus GND on
the pin STBN
uVSTBN
-0.3
VIO
V
–
14.1.9 DC voltage versus GND on
the pin EN
uVEN
-0.3
VIO
V
–
14.1.10 DC voltage versus GND on
the pin TxD
uVTxD
-0.3
VIO
V
–
14.1.11 DC voltage versus GND on
the pin TxEN
uVTxEN
-0.3
VIO
V
–
14.1.12 DC voltage versus GND on
the pin BGE
uVBGE
-0.3
VIO
V
–
14.1.13 DC voltage versus GND on
the pin RxD
uVRxD
-0.3
VIO
V
–
14.1.14 DC voltage versus GND on
the pin RxEN
uVRxEN
-0.3
VIO
V
–
14.1.15 DC voltage versus GND on
the pin ERRN
uVERRN
-0.3
VIO
V
–
14.1.16 Output current on the pin INH iINH
-1
–
mA
–
14.1.17 Output current on the pin
RxD
iRxD
-40
40
mA
–
14.1.18 Output current on the pin
RxEN
iRxEN
-40
40
mA
–
14.1.19 Output Current on the pin
ERRN
iERRN
-40
40
mA
–
Currents
Data Sheet
62
Rev. 1.10, 2013-07-15
TLE9221SX
General Product Characteristics
Table 18
Absolute maximum ratings voltages, currents and temperatures1)
All voltages with respect to ground; positive current flowing into the pin;
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Remarks
Temperatures
14.1.20 Junction temperature
TJunction
-40
150
°C
–
14.1.21 Storage temperature
TS
- 55
150
°C
–
14.1.22 ESD immunity at BP, BM,
VBAT, WAKE versus GND
uESDEXT
-10
10
kV
HBM,
(100 pF via 1.5 kΩ), 2),
CT index: 873);
14.1.23 ESD immunity at all other
pins
uESDINT
-2
2
kV
HBM,
(100 pF via 1.5 kΩ), 2),
CT index: 88;
14.1.24 ESD immunity to GND
(all pins)
uESDCDM
-750
750
V
CDM, 4);
ESD Immunity
1)
2)
3)
4)
Not subject to production test, specified by design.
ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001.
FlexRay Physical Layer Conformance Test Specification, version 3.0.1, Chapter 5.2, static test cases, index number.
ESD susceptibility, Charged Device Model “CDM” according to EIA/JESD22-C101 or ESDA STM5.3.1
Note: Stresses beyond those listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability. Integrated protection functions
are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions
are considered as “outside” the normal-operating range. Protection functions are not designed for
continuous repetitive operation.
Data Sheet
63
Rev. 1.10, 2013-07-15
TLE9221SX
General Product Characteristics
14.2
Functional Range
Table 19
Functional range
Pos.
Parameter
Symbol
Limit Values
Unit
Remarks
Min.
Max.
5.5
18
V
CT index: 95, 1), 2);
18
32
V
60 s, 3), 4);
uVCC
uVIO
4.75
5.25
V
–
3.0
5.25
V
–
uVBAT
5.5
18
V
CT index: 96,
CT index: 100, 2);
-40
150
°C
–
Supply Voltages
14.2.1 Transceiver supply voltage VBAT
14.2.2 Transceiver supply voltage VBAT
extended supply range
14.2.3 Transceiver supply voltage VCC
14.2.4 Transceiver supply voltage VIO
14.2.5 Functional range VBAT including
local and remote wake-up
functions
uVBAT
uVBATEXT
_WAKE
Thermal Parameters
TJunction
14.2.6 Junction temperature
1) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, Chapter 5.2, static test cases, index number.
2) According to the FlexRay EPL version 3.0.1 the TLE9221SX is fully functional, including the wake-up functions, in the
specified uVBAT range while uVCC and uVIO are also in their operating range.
3) Not subject to production test, specified by design
4) The extended supply range covers the load requirements according to ISO 16750-2 (load dump, jump start). This range is
not qualified for continuous, repetitive operation.
Note: Within the functional range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
14.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information,
please visit www.jedec.org.
Table 20
Pos.
Thermal resistance1)
Parameter
Symbol
Limit Values
Unit
Remarks
Min.
Typ.
Max.
–
100
–
K/W
2)
150
160
170
°C
–
TJ(Shut_Down) 170
180
190
°C
–
20
25
°C
–
Thermal Resistance
14.3.1 Junction to ambient1)
RthJA
Thermal Shutdown Junction Temperature
14.3.2 Thermal warning temperature TJ(Warning)
14.3.3 Thermal shut-down
temperature
14.3.4 Temperature difference
ΔT
between warning temperature
and shut-down temperature
ΔT = TJ(Shut_Down) - TJ(Warning)
10
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The product
(TLE9221SX) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu)
Data Sheet
64
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
15
Electrical Characteristics
15.1
Functional Device Characteristics
Table 21
Electrical characteristics
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
Current Consumption uVBAT Power Supply
15.1.1
Current consumption uVBAT,
non-low power mode
iVBAT
–
5.5
6.5
mA
BD_Normal,
BD_ReceiveOnly,
open load on INH,
uVBAT = 13.5 V;
15.1.2
Current consumption uVBAT
BD_Sleep
iVBAT_Sleep40
–
45
65
μA
uVBAT = 13.5 V,
uINH1 = 0 V,
EN = “low”, STBN = “low”,
TJunction = 40° C,
uBDWake = 0 V;
15.1.3
Current consumption uVBAT
BD_Standby
iVBAT_Stb
–
70
180
μA
uVBAT = 13.5 V,
open load on INH,
uBDWake = 0 V;
Current Consumption uVCC Power Supply
15.1.10 Current consumption uVCC
BD_Normal
iVCC
–
25
40
mA
Transmitter = “Data_0” or
“Data 1”;
15.1.11 Current consumption uVCC
BD_Normal
iVCC_Tx_Idle
–
0.07
1
mA
Transmitter = “Idle”,
uVBAT = 13.5 V;
15.1.12 Current consumption uVCC
BD_ReceiveOnly
iVCC_ROM
–
0.05
0.5
mA
uVBAT = 13.5 V;
15.1.13 Current consumption uVCC
BD_Sleep
iVCC_Sleep40
–
0.5
2
μA
uVCC = 5 V,
uVBAT = 13.5 V,
TJunction = 40°C;
15.1.14 Current consumption uVCC
BD_Standby
iVCC_Stb
–
2
8
μA
uVCC = 5 V,
uVBAT = 13.5 V;
Data Sheet
65
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
Current Consumption uVIO Power Supply
15.1.20 Current consumption uVIO,
non-low power mode
iVIO
–
0.15
0.5
mA
BD_Normal,
BD_ReceiveOnly;
15.1.21 Current consumption uVIO
BD_Sleep
iVIO_Sleep40
–
2
3
μA
uVIO = 5 V, TxEN = uVIO,
15.1.22 Current consumption uVIO
BD_Standby
iVIO_Stb
Data Sheet
BGE = TxD = “low”,
TJunction = 40 °C;
–
2
40
μA
uVIO = 5 V, TxEN = uVIO,
BGE = TxD = “low”;
66
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
Undervoltage Detection uVBAT Power Supply
15.1.30 Undervoltage detection
threshold uVBAT
uBDUVVBAT
4.0
4.8
5.5
V
falling edge,
CT index: 421);
15.1.31 Undervoltage detection
hysteresis uVBAT
uBDUVVBAT
–
100
–
mV
2)
;
15.1.32 Power-down threshold uVBAT
uBDPDVBAT
2.0
2.8
3.5
V
2)
;
15.1.33 VBat undervoltage filter time
dBDUVVBAT
50
–
500
µs
2)
, uVBAT = 13.5 V to
uBDUVVBAT(min),
(see Figure 26);
_Hys
_Blk
15.1.35 Response time for uVBAT
undervoltage detection
dBDUVVBAT
–
550
650
ms
2)
15.1.36 Response time for uVBAT
undervoltage recovery
dBDRVBAT
–
6
10
ms
2)
, (see Figure 26),
CT index: 63;
, (see Figure 26),
CT index: 81;
Undervoltage Detection uVCC Power Supply
15.1.40 Undervoltage detection
threshold uVCC
uBDUVVCC
4.0
4.25
4.75
V
falling edge,
CT index: 43;
15.1.41 Undervoltage detection
hysteresis uVCC
uBDUVVCC
–
100
–
mV
2)
;
15.1.42 Power-down threshold uVCC
uBDPDVCC
1.5
2.25
3.5
V
2)
;
15.1.43 uVCC undervoltage filter time
dBDUVVCC
3
–
25
µs
uVCC = 4.75 V to
uBDUVVCC(min),
(see Figure 27);
_Hys
_Blk
15.1.45 Response time for uVCC
undervoltage detection
dBDUVVCC
–
550
650
ms
2)
15.1.46 Response time for uVCC
undervoltage recovery
dBDRVCC
–
6
10
ms
2)
Data Sheet
67
, (see Figure 27),
CT index: 44;
, (see Figure 27),
CT index: 80;
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
Undervoltage Detection uVIO Power Supply
15.1.50 Undervoltage detection
threshold uVIO
uUVIO
2.0
2.65
3.0
V
falling edge,
CT index: 64;
15.1.51 Undervoltage detection
hysteresis uVIO
uUVIO_Hys
–
50
–
mV
2)
15.1.52 uVIO undervoltage filter time
dBDUVVIO
3
–
25
µs
uVIO = 3 V to
uBDUVVIO(min), (see
Figure 28);
_Blk
15.1.54 Response time for uVIO
undervoltage detection
dBDUVVIO
–
550
650
ms
2)
15.1.55 Response time for uVIO
undervoltage recovery
dBDRVIO
–
6
10
ms
2)
Data Sheet
68
;
, (see Figure 28),
CT index: 65;
, (see Figure 28),
CT index: 82;
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Unit Remarks
Typ.
Max.
Digital Output RxD
15.1.60 “high” level output voltage
uVDig_Out_High 0.8 x
uVIO
_RxD
–
1.0 x
uVIO
V
iRxDH = - 2 mA, 3),
CT index: 17;
15.1.61 “low” level output voltage
uVDig_Out_Low
–
–
0.2 x
uVIO
V
iRxDL = 2 mA, 3),
CT index: 18;
_RxD
15.1.62 Output voltage,
uVIO undervoltage
uVDig_Out_UV
–
–
250
mV
R_BDRxD = 100 kΩ,
CT index: 94;
4)
15.1.63 Output voltage,
BD_Off state
uVDig_Out_OFF –
–
100
mV
R_BDRxD = 100 kΩ,
CT index: 97;
5)
15.1.64 Rise time,
15 pF load
dBDRxDR15
–
1
4
ns
2)
15.1.65 Fall time,
15 pF load
dBDRxDF15
–
1
4
ns
2)
15.1.66 Rise time,
25 pF load
dBDRxDR25
–
2
6
ns
20% - 80% of uVIO,
C_BDRxD = 25 pF;
15.1.67 Fall time,
25 pF load
dBDRxDF25
–
2
6
ns
80% - 20% of uVIO,
C_BDRxD = 25 pF;
15.1.68 Sum of rise and fall time,
15 pF load
dBDRxDR15 + –
dBDRxDF15
2
8
ns
2)
15.1.69 Difference of rise and fall
time,
15 pF load
|dBDRxDR15 - –
dBDRxDF15|
0.5
2.5
ns
2)
15.1.70 Sum of rise and fall time,
25 pF load
dBDRxDR25 + –
dBDRxDF25
4
12
ns
C_BDRxD = 25 pF,
CT index: 101;
15.1.71 Difference of rise and fall
time,
25 pF load
|dBDRxDR25 - –
dBDRxDF25|
0.5
2.5
ns
C_BDRxD = 25 pF,
CT index: 102;
15.1.80 “high” level output voltage
uVDig_Out_High 0.8 x
uVIO
_RxEN
–
1.0 x
uVIO
V
iRxDH = - 2 mA, 3),
CT index: 17;
15.1.81 “low” level output voltage
uVDig_Out_Low
–
–
0.2 x
uVIO
V
iRxDL = 2 mA, 3),
CT index: 18;
_RxD
_RxD
,
,
, 20% - 80% of uVIO,
C_BDRxD = 15 pF;
, 80% - 20% of uVIO,
C_BDRxD = 15 pF;
, C_BDRxD = 15 pF,
CT index: 90;
, C_BDRxD = 15 pF,
CT index: 91;
Digital Output RxEN
_RxEN
15.1.82 Output voltage,
uVIO undervoltage
uVDig_Out_UV
–
–
250
mV
R_BDRxEN = 100 kΩ, 4),
CT index: 94;
15.1.83 Output voltage,
BD_Off state
uVDig_Out_OFF –
–
100
mV
R_BDRxEN = 100 kΩ, 5),
CT index: 97;
15.1.84 Rise time,
25 pF load
dBDRxENR25 –
2
6
ns
2)
15.1.85 Fall time,
25 pF load
dBDRxENF25 –
2
6
ns
2)
Data Sheet
_RxEN
_RxEN
69
, 20% - 80% of uVIO,
C_BDRxEN = 25 pF;
, 80% - 20% of uVIO,
C_BDRxEN = 25 pF;
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Unit Remarks
Typ.
Max.
Digital Output ERRN
15.1.90 “high” level output voltage
uVDig_Out_High 0.8 x
uVIO
_ERRN
–
1.0 x
uVIO
V
iERRNH = - 2 mA,3),
CT index: 17;
15.1.91 “low” level output voltage
uVDig_Out_Low
–
–
0.2 x
uVIO
V
iERRNL = 2 mA, 3),
CT index: 18;
_ERRN
15.1.92 Output voltage,
uVIO undervoltage
uVDig_Out_UV
–
–
250
mV
R_BDERRN = 100 kΩ, 4),
CT index: 94;
15.1.93 Output voltage,
BD_Off state
uVDig_Out_OFF –
–
100
mV
R_BDERRN = 100 kΩ, 5),
CT index: 97;
15.1.94 Rise time,
25 pF load
dBDERRNR25 –
2
6
ns
2)
15.1.95 Fall time,
25 pF load
dBDERRNF25 –
2
6
ns
2)
15.1.96 Response time
dReaction
TimeERRN
–
100
μs
2)
_ERRN
_ERRN
–
, 20% - 80% of uVIO,
C_BDERRN = 25 pF;
, 80% - 20% of uVIO,
C_BDERRN = 25 pF;
, (see Figure 13),
CT index: 71;
Digital Input TxD
15.1.100 “high” level input voltage
uBDLogic_1 0.6 x
uVIO
–
uVIO
V
3)
, CT index: 78;
15.1.101 “low” level input voltage
uBDLogic_0 -0.3
–
0.4 x
uVIO
V
3)
, CT index: 79;
15.1.102 “high” level input current
iBDLogic_1
200
μA
–
μA
2)
;
pF
2)
, CT index: 92;
15.1.103 “low” level input current
15.1.104 Input capacitance
Data Sheet
iBDLogic_0
C_BDTxD
20
–
–
70
–
–
1
5
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
–
uVIO
V
3)
CT index: 19;
_BGE
0.7 x
uVIO
uVDig_In_Low
-0.3
–
0.3 x
uVIO
V
3)
CT index: 20;
Digital Input BGE
15.1.110 “high” level input voltage
15.1.111 “low” level input voltage
uVDig_In_High
_BGE
15.1.112 “high” level input current
iDig_In_High_BGE 20
200
μA
–
15.1.113 “low” level input current
iDig_In_Low_BGE -1
–
1
μA
–2)
15.1.114 Input capacitance
C_BDBGE
–
–
5
pF
2)
uVDig_In_High
–
uVIO
V
3)
CT index: 19;
–
0.3 x
uVIO
V
3)
CT index: 20;
200
μA
–
Digital Input STBN
15.1.120 “high” level input voltage
_STBN
0.7 x
uVIO
15.1.121 “low” level input voltage
uVDig_In_Low
-0.3
15.1.122 “high” level input current
iDig_In_High
_STBN
20
_STBN
-1
–
1
μA
2)
C_BDSTBN
–
–
5
pF
2)
uVDig_In_High
–
uVIO
V
3)
CT index: 19;
_EN
0.7 x
uVIO
15.1.131 “low” level input voltage
uVDig_In_Low
-0.3
–
0.3 x
uVIO
V
3)
CT index: 20;
15.1.132 “high” level input current
iDig_In_High_EN
200
μA
–
15.1.123 “low” level input current
iDig_In_Low
_STBN
15.1.124 Input capacitance
Digital Input EN
15.1.130 “high” level input voltage
_EN
20
15.1.133 “low” level input current
iDig_In_Low_EN
-1
–
1
μA
2)
15.1.134 Input capacitance
C_BDEN
–
–
5
pF
2)
Data Sheet
71
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
–
uVIO
V
3)
, CT index: 19;
_TxEN
0.7 x
uVIO
uVDig_In_Low
-0.3
–
0.3 x
uVIO
V
3)
, CT index: 20;
1
μA
2)
;
Tx Enable Input: TxEN
15.1.140 “high” level input voltage
15.1.141 “low” level input voltage
uVDig_In_High
_TxEN
15.1.142 “high” level input current
iDig_In_High
-1
_TxEN
15.1.143 “low” level input current
iDig_In_Low
-200
–
-20
μA
–
–
–
5
pF
2)
–
2600
µs
CT index: 68;
_TxEN
15.1.144 Input capacitance
C_BDTxEN
15.1.145 Maximum time of Transmitter dBDTxActive 1500
Max
activation via TxEN
Data Sheet
72
;
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
–
–
V
iINH1 = -0.2 mA,
uVBAT > 5.5 V,
CT index: 74;
–
5
μA
uINH1 = 0 V,
CT index: 75;
Analog Output INH
15.1.150 Output voltage;
Not_Sleep
uINH1NotSleep
uVBAT
- 0.8
15.1.151 Absolute leakage current;
BD_Sleep
|iINH1Leak|
–
Local Wake-up Input WAKE
15.1.160 Wake-up detection threshold uBDWakeThr 0.35 x 0.5 x
uVBAT uVBAT
0.65 x V
uVBAT
–
15.1.161 Hysteresis on pin Wake
uBDWakeHys 0.01 x 0.04 x 0.12 x V
uVBAT uVBAT uVBAT
–
15.1.162 High level input current
(pull-up)
iBDWakeH
-20
-9
-2
μA
uBDWAKE =
uBDWakeThr + 50 mV,
(see Figure 14), 6);
15.1.163 Low level input current
(pull-down)
iBDWakeL
2
9
20
μA
uBDWAKE =
uBDWakeThr - 50 mV,
(see Figure 14), 6);
15.1.164 Wake pulse filter time
dBDWake
PulseFilter
10
–
40
μs
(see Figure 16),
CT index: 37;
–
100
μs
(see Figure 16),
CT index: 66;
15.1.165 Response time to indicate the dBDWakeup –
Reactionlocal
wake-up
Data Sheet
73
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
0.6
–
2.0
V
40 Ω < RDCLOAD < 55 Ω,
CT index: 15;
–
-0.6
V
TxD = “low”, TxEN = “low”,
40 Ω < RDCLOAD < 55 Ω;
Bus Transmitter: BP, BM
15.1.170 Differential output voltage;
(“Data_0”, “Data_1”),
BD_Normal
uBDTxactive
15.1.171 Differential output voltage;
“Data_0”,
BD_Normal
uBDTxactive_D0 -2.0
7)
,
15.1.172 Matching between differential uBDTxactive
output voltages at “Data_0”
_Diff
and “Data_1”
-200
–
200
mV
BD_Normal, TxEN = “low”,
40 Ω < RDCLOAD < 55 Ω,
uBDTxactive_Diff = uBDTxactive uBDTxactive_D0;
15.1.180 BP absolute maximum output iBPGND
current,
ShortMax
BP shorted to GND,
no time limit
–
22
60
mA
CT index: 30;
15.1.181 BP absolute maximum output iBP-5VShortMax –
current,
BP shorted to = -5 V,
no time limit
43
60
mA
CT index: 58;
15.1.182 BP absolute maximum output iBPBAT27
current,
ShortMax
BP shorted to = 27 V,
no time limit
–
37
60
mA
CT index: 34;
15.1.183 BP absolute maximum output iBPBMShortMax –
current,
Short to BM
30
60
mA
CT index: 60;
15.1.184 BM absolute maximum output iBMGND
current,
ShortMax
BM shorted to GND,
no time limit
–
22
60
mA
CT index: 29;
15.1.185 BM absolute maximum output iBM-5VShortMax –
current,
BM shorted to = -5 V,
no time limit
43
60
mA
CT index: 57;
15.1.186 BM absolute maximum output iBMBAT27
current,
ShortMax
BM shorted to = 27 V,
no time limit
–
37
60
mA
CT index: 33;
15.1.187 BM absolute maximum output iBMBPShortMax –
current,
Short to BP
30
60
mA
CT index: 59;
Data Sheet
74
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
15.1.200 Transmitter delay negative
voltage
dBDTx10
–
31
50
ns
RDCLOAD = 40 Ω, 7),
(see Figure 41),
CT index: 7;
15.1.201 Transmitter delay positive
voltage
dBDTx01
–
31
50
ns
RDCLOAD = 40 Ω, 7), 8),
(see Figure 41),
CT index: 8;
15.1.203 Transmitter delay mismatch
dBDTxAsym = |dBDTx10dBDTx01|
dBDTxAsym –
–
4
ns
RDCLOAD = 40 Ω, 7), 8), 9),
(see Figure 41),
CT index: 6;
15.1.204 Fall time differential bus
voltage, (80% -> 20%)
dBusTx10
12
18.75 ns
6
8)
,
RDCLOAD = 40 Ω, 7),
(see Figure 41),
CT index: 14;
15.1.205 Rise time differential bus
voltage, (20% -> 80%)
dBusTx01
6
12
18.75 ns
RDCLOAD = 40 Ω, 7),
(see Figure 41),
CT index: 13;
15.1.206 Difference between
differential bus voltage rise
time and fall time
dBusTxDiff= |dBusTx01 dBusTx10|
dBusTxDiff
–
–
3
ns
RDCLOAD = 40 Ω,
(see Figure 41),
CT index: 103;
15.1.210 Transmitter delay
Idle -> active
dBDTxia
–
55
75
ns
RDCLOAD = 40 Ω,
(see Figure 42),
CT index: 10;
15.1.211 Transmitter delay
Active -> idle
dBDTxai
–
55
75
ns
RDCLOAD = 40 Ω,
(see Figure 42),
CT index: 9;
15.1.212 Transmitter delay mismatch
dBDTxDM = dBDTxai dBDTxia
dBDTxDM
-30
–
30
ns
RDCLOAD = 40 Ω,
(see Figure 42),
CT index: 56;
15.1.213 Transition time
Idle -> active
dBusTxia
–
15
30
ns
RDCLOAD = 40 Ω,
(see Figure 42),
CT index: 11;
15.1.214 Transition time
Active -> idle
dBusTxai
–
15
30
ns
RDCLOAD = 40 Ω,
(see Figure 42),
CT index: 12;
15.1.215 Transmitter delay BGE
Idle -> active
dBDBGEia
–
55
75
ns
RDCLOAD = 40 Ω,
(see Figure 43);
15.1.216 Transmitter delay BGE
Active -> idle
dBDBGEai
–
55
75
ns
RDCLOAD = 40 Ω,
(see Figure 43);
Data Sheet
75
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
150
–
300
Bus Receiver: BP, BM
15.1.220 Receiver threshold for
detecting “Data_1”
uData1
15.1.221 Receiver threshold for
detecting “Data_0”
uData0
15.1.222 Mismatch of Receiver
thresholds
uData1|uData0|
mV
-10 V < uCM < 15 V, 10),
CT index: 22;
-300
–
-150
mV
-10 V < uCM < 15 V, 10),
CT index: 21;
-30
–
30
mV
uCM = (uBP+uBM)/2 = 2.5 V,
CT index: 23;
15.1.230 Common mode voltage range uCM
-10
–
15
V
CT index: 27, 11);
15.1.231 Filter time for bus idle
detection
dBDIdle
Detection
50
–
200
ns
uBus = 900 mV -> 30 mV,
CT index: 25;
15.1.232 Filter time for bus active
detection
dBDActivity
Detection
100
–
250
ns
uBus = 30 mV -> 900 mV,
CT index: 24;
10
–
40
kΩ
Bus = “Idle”, open load,
uVCC = 5 V,
15.1.233 Receiver common mode input RCM1, RCM2
resistance
CT index: 26;
15.1.234 Receiver differential input
resistance
RCM1 + RCM2 20
–
80
kΩ
Bus = “Idle”,
open load;
15.1.235 Absolute differential bus “Idle” uBDTxIdle
voltage,
All modes
–
–
30
mV
TxEN = “high”,
40 Ω < RDCLOAD < 55 Ω,
CT index: 16;
15.1.240 “Idle” voltage on BP and BM, uBias
non-low power mode
non-low power
1.8
2.4
3.2
V
TxEN = “high”, bus = “Idle”,
uVCC = 5 V,
40 Ω < RDCLOAD < 55 Ω,
CT index: 35;
15.1.241 “Idle” voltage on BP and BM, uBias
BD_Sleep, BD_Standby,
low power
BD_GoToSleep
-100
–
100
mV
TxEN = “high”, bus = “Idle”,
uVCC = 5 V,
40 Ω < RDCLOAD < 55 Ω,
CT index: 36;
15.1.250 Absolute leakage current on
BP, when Transmitter off
iBPLeak
–
7
15
μA
uBP = uBM = 5 V,
all other pins connected to
GND, CT index: 45;
15.1.251 Absolute leakage current on
BM, when Transmitter off
iBMLeak
–
7
15
μA
uBP = uBM = 5 V,
all other pins connected to
GND, CT index: 46;
–
500
1600
μA
uBP = uBM = 0 V,
all other pins connected to
16 V via 0 Ohm,
CT index: 83;
15.1.252 Absolute leakage current loss iBPLeakGND
to GND on BP
Data Sheet
76
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
15.1.253 Absolute leakage current loss iBMLeakGND
to GND on BM
–
500
1600
μA
uBP = uBM = 0 V,
all other pins connected to
16 V via 0 Ohm,
CT index: 84;
15.1.260 Receiver delay, falling edge
dBDRx10
–
65
75
ns
C_BDRxD = 25 pF,
dBUSRx0BD = dBUSRx1BD >
tBit = 60 ns,
(see Figure 44),
CT index: 2;
15.1.261 Receiver delay, rising edge
dBDRx01
–
65
75
ns
C_BDRxD = 25 pF,
dBUSRx0BD = dBUSRx1BD >
tBit = 60 ns,
(see Figure 44),
CT index: 3;
15.1.262 Receiver delay mismatch
dBDRxAsym = |dBDRx10 dBDRx01|
dBDRxAsym –
–
5
ns
C_BDRxD = 25 pF, 9),
dBUSRx0BD = dBUSRx1BD >
tBit = 60 ns,
(see Figure 44),
CT index: 1;
15.1.263 Bus driver idle response time dBDRxai
50
–
250
ns
C_BDRxEN = 25 pF,
(see Figure 45),
CT index: 4;
15.1.264 Bus driver activity response
time
dBDRxia
100
–
300
ns
C_BDRxEN = 25 pF,
(see Figure 45),
CT index: 5;
15.1.265 Idle-Loop delay
dBDTxRxai =
dBDRxai+dBDTxai
dBDTxRxai
–
–
325
ns
C_BDRxEN = 25 pF
CT index: 93;
15.1.270 BP output current, bus “Idle”
iBPIdle
–
–
5.0
mA
-27 V < BP < 27 V;
15.1.271 BM output current, bus “Idle”
iBMIdle
–
–
5.0
mA
-27 V < BM < 27 V;
;
15.1.272 Input capacitance at pin BP
C_BDBP
–
–
30
pF
2)
15.1.273 Input capacitance at pin BM
C_BDBM
–
–
30
pF
2)
;
15.1.274 Differential input capacitance C_BDBus
between BP and BM
–
–
20
pF
2)
;
Data Sheet
77
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
Table 21
Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
Remote Wake-up Detection: BP, BM
15.1.280 Low-power Receiver
threshold for detecting
“Data_0”
uData0_LP
-400
–
-100
mV
(see Figure 18),
CT index: 76;
15.1.281 Acceptance time-out of a
“Data_0” phase in the wakeup pattern
dWU0Detect
1
–
4
µs
(see Figure 18),
CT index: 38;
15.1.282 Acceptance time-out of an
dWUIdleDetect
“Idle” or “Data 1” phase in the
wake-up pattern
1
–
4
µs
(see Figure 18),
CT index: 39;
15.1.283 Acceptance time-out for
wake-up pattern recognition
dWUTimeout
48
–
140
µs
(see Figure 18),
CT index: 40;
15.1.284 Acceptance time-out for
interruptions
dWUInterrupt
0.13
–
1
µs
(see Figure 20), 2),
CT index: 77;
–
100
μs
(see Figure 18),
CT index: 67;
15.1.285 Response time after wake-up dBDWakeup –
Reactionremote
12)
,
Host Commands and SIR
15.1.290 Mode transition time after
applying the host command
dBDModeChange –
–
100
μs
(see Figure 10),
iNH1Leak > 0.2 mA,
all mode changes,
CT index: 69;
15.1.291 Mode transition time to
BD_Standby after power-up
dBDPowerUp
–
100
μs
VBAT > uBDUVVBAT,
VCC > uBDUVVCC,
(see Figure 30);
15.1.292 Filter time for detection of the dBDLogicFilter 10
host commands at the pins
EN and STBN
–
30
μs
(see Figure 10);
–
15.1.293 Time for mode selection via
the EN pin within the Go-ToSleep command
dBDSleep
25
–
50
μs
(see Figure 33);
15.1.294 Timing window for EN pin to
clock out the SIR
dENClock
3
5
8
μs
(see Figure 11);
10
–
30
μs
(see Figure 11);
15.1.295 Time-out at the EN pin for the dENTimeout
SIR read-out
1)
2)
3)
4)
5)
6)
7)
FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
Not part of production test, specified by design.
No undervoltage at uVIO and either uVCC or uVBAT with supply.
Undervoltage at uVIO and either uVCC or uVBAT with supply.
BD_Off state uVCC and uVBAT are without supply (see also Chapter 8.4.1).
Currents not tested at full uVBAT range in production, they are specified by design.
TxD signal is constant from 100 ns up to 4400 ns before the first edge. The parameter is valid for both polarities.
Data Sheet
78
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
8) Sum of TxD signal rise and fall time (20% - 80% VIO) of up to 9 ns.
9) Guaranteed for +/- 300 mV as well as for +/- 150 mV level of uBus.
10) Activity detected previously for uBus up to +/- 3000 mV
11) Tested on a receiving bus driver. The sending bus driver has a ground offset voltage in the range of -12.5 V to +12.5 V and
sends a 50/50 test pattern.
12) The minimum value is only guaranteed when the phase that is interrupted was continuously present for at least 870 ns.
15.2
Diagrams
uVBAT
uVcc
uVIO
100 nF
100 nF
100 nF
GND
VBAT
VCC
VIO
EN
INH
C_BDERRN
STBN
ERRN
TLE9221SX
C_BDRxEN
C_BDRxD
TxD
RxEN
TxEN
RxD
BGE
WAKE
BP
BM
RDCLOAD
CDCLOAD
Figure 40
Data Sheet
Simplified test circuit
79
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
100...4400ns
TxD
100% μVIO
50% μVIO
0% μVIO
t
dBDTx10
dBDTx01
uBus
uBDTxActive
100%
80 %
300 mV
0 mV
t
-300 mV
20 %
- uBDTxActive
0%
dBusTx10
Figure 41
dBusTx01
Transmitter characteristics
TxEN
100% uVIO
50% uVIO
0% uVIO
t
dBDTxia
dBDTxai
uBus
0V
t
- 30 mV
- 300 mV
- uBDTxactive
dBusTxia
dBusTxai
BGE = “high”
TxD = “low”
Figure 42
Data Sheet
Transmitter characteristics from “Idle” to “active” and vice versa
80
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
BGE
100% uVIO
50% uVIO
0% uVIO
t
dBDBGEia
dBDBGEai
uBus
0V
t
- 30 mV
- 300 mV
- uBDTxactive
dBusTxia
Figure 43
Data Sheet
dBusTxai
TxEN = “low”
TxD = “low”
Transmitter characteristics with bus guardian enable
81
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
uBus
dBusRx10
dBusRx01
uBusRxData
300 mV
150 mV
0V
t
- 150 mV
- 300 mV
- uBusRxData
dBusRx0BD
dBDRx10
dBusRx1BD
dBDRx01
100% VIO
50% VIO
0% VIO
t
The Receiver timings are valid for bus signals dBusRx0BD and dBusRx1BD longer as
the minimum bit time = 60 ns and for both polarities:
dBusRx0BD = dBusRx1BD > tBit = 60 ns
Figure 44
Data Sheet
Receiver timing characteristics
82
Rev. 1.10, 2013-07-15
TLE9221SX
Electrical Characteristics
uBus
dBusRx10
dBusRx01
0V
- 30 mV
- 150 mV
t
- 300 mV
- uBusRx
dBusActive
dBDRxia
dBusIdle
dBDRxai
RxD
100% VIO
50% VIO
0% VIO
t
RxEN
100% VIO
50% VIO
0% VIO
t
The signals on the pins RxD and RxEN switch within a delay < 10 ns
Figure 45
Data Sheet
Receiver transition from “Idle” to “active” and vice versa
83
Rev. 1.10, 2013-07-15
TLE9221SX
Application Information
16
Application Information
16.1
ESD Robustness according to IEC61000-4-2
Tests for ESD robustness according to IEC61000-4-2 “Gun test” (150 pF, 330 Ω) have been performed. The
results and test conditions are available in a separate test report.
Table 22
ESD robustness according to IEC61000-4-2
Performed Test
Symbol Result
Unit
Remarks
Positive pulse
Negative pulse
Electrostatic discharge voltage at pin BM, BP and uESDIEC
WAKE versus GND,
CT index: 89, 1);
≥ +11
kV
2) 3)
Electrostatic discharge voltage at pin BM, BP and uESDIEC
WAKE versus GND,
CT index: 89:
≤ -11
kV
2) 3)
,
,
1) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
2) ESD susceptibility “ESD GUN” according to: “FlexRay Communications System Physical Layer - EMC Measurement
Specification, version 3.0, Section 2.2, IEC61000-4-2”.
Tested by external test facility (IBEE Zwickau, EMC test report no.: 22-02-13).
3) Test result without any external bus filter network, e.g. common mode choke.
16.2
Bus Interface Simulation Model Parameter
The simulated value RBDTransmitter describes the equivalent bus driver output impedance.
RBDTransmitter = 50Ω x ( uBus100 – uBus40 ) / ( 2.5 x uBus40 – uBus100 )
uBus100
=
differential output voltage on a 100Ω||100pF load,
while driving “Data_1” to the bus. Value based on simulation.
uBus40
=
differential output voltage on a 40Ω||100pF load,
while driving “Data_1” to the bus. Value based on simulation.
Figure 46
Bus driver output resistance
Table 23
Bus driver simulation resistor
Pos.
Parameter
Symbol
Limit Values
Min.
16.2.1 Bus driver interface
simulation resistor
RDBDTransmitter 30
Unit Remarks
Typ.
Max.
100
500
Ω
CT index: 98, 1), 2);
1) Simulated value for reference purposes only.
2) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
Data Sheet
84
Rev. 1.10, 2013-07-15
TLE9221SX
Application Information
16.3
Typical RxD Output Signals
The simulated RxD output behavior describe the rise and fall times of the RxD pin on a 50 Ohm, 10 pF load at the
end of a standard lossless transmission line with 1 ns propagation delay (see Table 24, Figure 47 and Figure 48).
Table 24
Pos.
RxD output signal (simulated values),
Parameter
Symbol
Limit Values
Min.
Unit Remarks
Typ.
Max.
dBDRxDR10+ –
dBDRxDF10
–
16.5
ns
C_BDRxD = 10 pF, 1)
R_CBDRxD = 50 Ω,
CT index: 99; 2)
16.3.2 Difference of rise and fall time |dBDRxDR10 –
- dBDRxDF10|
on the RxD output
–
5
ns
C_BDRxD = 10 pF, 1)
R_CBDRxD = 50 Ω,
CT index: 105;
16.3.1 Sum of rise and fall time on
the RxD output
1) Simulated value for reference purposes only.
2) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
6.0
VRxD in V
RxD output - rise time (typical)
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
t in ns
Figure 47
Data Sheet
RxD output rise time (typical simulation value)
85
Rev. 1.10, 2013-07-15
TLE9221SX
Application Information
6.0
RxD output - fall time (typical)
VRxD in V
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
0
5
10
15
Figure 48
RxD output fall time (typical simulation value)
16.4
Operating Temperature
20
25
t in ns
30
The FlexRay transceiver TLE9221SX is qualified for temperature Grade 1 (-40°C to +125°C ambient operating
temperature) according to AEC - Q100. Grade 1 according AEC - Q100 is equivalent to the ambient temperature
for class 1 TAMB_Class1 (CT index:53)1) defined by the FlexRay EPL, version 3.0.1.
Infineon specifies for the electrical characteristics (see Table 21) the junction temperature TJunction. The ambient
temperature can be calculated with the power dissipation and the thermal resistance RthJA (see Figure 49).
TJ = TA + RthJA x Pd
TA = TJ - RthJA x Pd
with:
TA
TJ
Pd
RthJA
Figure 49
= ambient temperature
= junction temperature
= power dissipation of the FlexRay transceiver
= thermal resistance junction to ambient
Ambient temperature TA calculation
1) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
Data Sheet
86
Rev. 1.10, 2013-07-15
TLE9221SX
Application Information
16.5
Application Example
LDO
VBAT
Q1
INH1
10 μF
10μF
e.g TLE4473GV53
Q2
INH2
10 μF
GND
1
VCC
INH
16
VBAT
100nF
VIO
3
100nF
LCMC
BP
15
BGE
BP
RxEN
14
BM
ERRN
BM
STBN
RTB
RTA
EN
TxEN
TxD
12
WAKE
WAKE
RxD
Figure 50
Data Sheet
100nF
7
9
10
8
2
5
4
6
GND
100kΩ
Micro Controller
e.g.
TC17xx-Series
100nF
11
FlexRay
Communication
Controller
GND
13
Simplified application example for the TLE9221SX
87
Rev. 1.10, 2013-07-15
TLE9221SX
Application Information
16.6
•
•
Further Application Information
Please contact us for information regarding the pin FMEA.
For further information you may visit: http://www.infineon.com
Data Sheet
88
Rev. 1.10, 2013-07-15
TLE9221SX
Package Outlines
C
7 x 0.65 = 4.55
0.3 ±0.08 2)
0.1 C 16x
SEATING
PLANE
7.8 ±0.4
0°...8°
0.75 ±0.2
0.65
6
5.3 ±0.3 1)
+0.10
0.15 -0
.0
2 MAX.
6.2 ±0.31)
1.75 ±0.1
Package Outlines
0.05 MIN.
STAND OFF
17
0.2 C A B
0.15 M A B C 16x
A
16
Index
Marking
9
1
Ejector Mark
Cavity ID
8
B
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.05 max. per side
Figure 51
PG-SSOP-16-2-PO V03
PG-SSOP16-2
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations, the device is available as a green product. Green products are RoHS compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
89
Dimensions in mm
Rev. 1.10, 2013-07-15
TLE9221SX
Revision History
18
Revision History
Revision
Date
Changes
1.1
2013-07-15
Data Sheet updated based on Data Sheet Rev. 1.00:
• Page 64, Table 19:
New parameter for the supply uVBAT added:
Extended functional range for uVBAT_EXT (Position: 14.2.2).
1.0
2013-05-17
Data Sheet created.
Data Sheet
90
Rev. 1.10, 2013-07-15
Edition 2013-07-15
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2013 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.