Version 1.0 , June 2001 Application Note AN-PSM-11 Switched and Averaged PSPICE Models Authors: Horst Edel Daniel Lindenmeyer Published by Infineon Technologies AG www.infineon.com/simulate www.infineon.com/coolset Support: [email protected] Power Management & Supply N e v e r Titel: (Infineon Logo 4c.eps) Erstellt von: Adobe Illustrator(R) 8.0 Vorschau: Diese EPS-Grafik wurde nicht gespeichert mit einer enthaltenen Vorschau. Kommentar: Diese EPS-Grafik wird an einen PostScript-Drucker gedruckt, aber nicht an andere Druckertypen. s t o p t h i n k i n g Switched and Averaged Pspice Models Serial number:9101-20-P1-1----- This work is protected by copyright. All rights reserved. Neither the complete work nor extracts therefrom may be copied or reproduced, regardless of the means employed, without the permission of the publisher. Text, illustrations and examples were produced with great care. Nevertheless, errors cannot be completely excluded. The author can assume neither a legal responsibility nor any form of liability for any possibly remaining incorrect details and their consequences. PSPICE is a registered trademark of MicroSim Corp. USA. © 2000 by Ing. Büro Horst Edel Page 2 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models Contents 1 Preliminary remarks 4 1.1 Description of the converter symbols 1.2 General notes 2 Flyback converter with electrical isolation, 1 output 2.1 2.2 2.3 2.4 2.5 Linearized circuit Averaged model Time-domain characteristic with current loop DC operating points Frequency-domain characteristic 3 Flyback converter with electrical isolation, 2 outputs 3.1 3.2 3.3 3.4 3.5 Linearized circuit Averaged model Time-domain characteristic with current loop DC operating points Frequency-domain characteristic 4 5 8 8 8 9 10 11 12 12 12 13 14 15 A Convergence aids 16 B Notes on the subcircuits 16 B.1 Activation B.2 Adapting the averaged models Page 3 / 20 16 17 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 1 Preliminary remarks The simulations described in this document were carried out with PSpice V8.0 Version V2.0. 1.1 Description of the converter symbols All the symbols used in the converter circuits have the same structure. Inputs ue: Connection for the input voltage. d1: Input of the averaged pulse control factor d1 for controlling the converter. CAUTION: This input is not restricted to values between 0 and 1. Meaningless pulse control factors (e.g. d1 = −0.5) can therefore be specified. (Limiting occurs in the pulse-width modulator). Outputs ua: Connection(s) for the output voltage(s). Ud: Drain connection of the external switching transistor. d3: Output for display of the operating mode and length of the interval d3Ts (inductor current iL = 0). d3 = 0 means the converter is operating continuously. For example, d3 = 0.3 means the converter is operating discontinuously and the time duration of the interval is d3Ts =0.3 * Ts (Ts is the switching period). dis: Output which describes the slope of the switch current in the interval d1Ts. This quantity is necessary for current loop operation. In the case of a “singleinductor-converter”, dis is equal to the slope of the inductor current iL in the interval d1Ts. In the case of a converter with several inductors, however, it is a weighted linear combination of the inductor currents. iL: Output for the averaged inductor current. In the case of a converter with one inductor it is the mean value of the current through this inductor. This quantity is important for current loop operation. eta: Output which indicates the efficiency of the circuit. CAUTION: The output supplies meaningful values only in the steady-state condition and with DC analysis. Moreover, it serves only as a point of reference, as, of course, the switching losses of the real converter are not taken into account. With all models, variable parameters are represented in the symbol and can be edited by double-clicking. The variable values can be either figures (e.g. L = 50uH) or parameter values (e.g. L ={L1}). For latter, the parameter values must be defined in the circuit by a PARAM block. Every averaged model has a null parameter. This parameter serves as a convergence aid. PSPICE experiences difficulties if an expression in an EVALUE source in IF commands is to become zero. Example: E3 IF (V(dss)-Dmin>0, V(dss),Dmin) Page 4 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models It makes sense here to replace the 0 by a very small value (1u = 10-6; 1m = 10-3). -1m< null < 1m It is by no means certain that a value with a large magnitude is always favorable. It is possible that a circuit with null=100u does not converge, but does with null=10u. Unfortunately a little experimentation is unavoidable. The control inputs and outputs are each referred to the ground of input Ue. In the case of the circuits with electrical isolation, the outputs can be connected in any way, i.e. also connected in series. They must have only one, albeit very high-resistance path to the primary ground. 1.2 General notes Both converters are intended for operation with pulse-width modulators with integrated switching transistors. The test circuits are identical for both. The TDA1683x is used for driving the flyback converter with one output (1004i_LIN) and the TDA16822 for the converter with two outputs (1005i_LIN). Both are Infineon products. The averaged circuit will be presented first, then the averaged model derived from it. A simulation in the time domain follows in order to demonstrate the accuracy of the model. It compares the transient responses when a pulse-width modulator with current loop is used. The curves show the comparison of the inductor current iL and the output voltage ua of the switched and the averaged circuits. Quantity iL ua Switched model I(L1) V(uazt) Averaged model V(iL) V(ua) The table shows the assignment of the quantities used to the models. The curve V(d3) of the averaged model shows the temporal response of the length of d3. This quantity can assume a value between zero and one. V(d3) = 0 means that the interval d3Ts = 0, i.e. the converter operates continuously. V(d3) = 1 means that the inductor current is always zero. This can be the case, for instance, if the controller in a converter with feedback disconnects as a consequence of an excessive output voltage (actual value). The transformer ratios V1 and V2 in the case of the converter with two outputs represent the ratio of the number of primary turns w1 to the respective secondary winding w2 and w3: V1 = w1 / w2 V2 = w1 / w3 Page 5 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models The diode forward voltage drops can be arbitrarily chosen in the case of the averaged models (including zero, for instance). In order that the results from the switched model agree with those of the averaged model during the comparison simulation in the time domain, the diode forward voltage drops must in each case be assumed as ud = 0.8V, since the forward voltage of the SPICE diode is preset at approximately 0.8V. The differences compared to the switched model depend very strongly on the chosen time increment and the ripple of the inductor current. The larger the two are chosen, the greater the differences become. The subsequent simulations can be performed only with the averaged model, since only with that is SPICE able to calculate operating points which differ from zero. The first simulation shows an analysis of the DC operating points. It can be seen how the efficiency η = V(eta) and the length of the interval d3 = V(d3) change when the control voltage is increased from 0 to 4V. The second diagram shows the comparison of the output voltage ua = V(ua) with the theoretical value V(uas). This value is calculated in the simulation by an EVALUE source. Since no internal resistances are taken into account in this calculation, the deviations naturally become greater as the load current increases. The last simulation shows the characteristic in the frequency domain. In each case the response characteristic of pulse control factor d1 to the output voltage ua, i.e. ua/d1, is shown in Bode diagrams. The upper diagram shows the amplitude response A = 20 log Re 2 + Im 2 and the lower the phase response ϕ = arctan Im Re with ua = F ( jω ) = Re( jω ) + j Im( jω ) ud In the process the load resistor Ra is varied logarithmically with three values per decade. It can be readily seen that at a certain resistance value the converter changes from continuous to discontinuous operating mode. SPICE calculates the operating point before every frequency response analysis. Six operating point calculations (DC analyses) are therefore performed for each run. The results of these calculations are available in the SPICE output file. Page 6 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models Example of a SPICE output file: Operating points from the frequency response analysis of converter 1004i fq **** SMALL SIGNAL BIAS SOLUTION PARAM RA = 10 ****************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( d1) .0662 ( d3) 126.1E-18 ( FB) 2.0000 ( iL) .6688 ( Tj) 23.0000 ( ua) 6.2452 ( Ud) 99.9550 ( ue) 100.0000 (dis) 1.000E+06 ( eta) .8804 ( Vcc) 20.0000 (X U1.3) -.0450 **** SMALL SIGNAL BIAS SOLUTION PARAM RA = 21.544 ****************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( d1) .0976 ( d3) 0.0000 ( FB) 2.0000 ( iL) .5121 ( Tj) 23.0000 ( ua) 9.9567 ( Ud) 99.9500 ( ue) 100.0000 (dis)1.000E+06 ( eta) .9208 ( Vcc) 20.0000 (X U1.3) -.0505 **** SMALL SIGNAL BIAS SOLUTION PARAM RA = 100 ****************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( d1) .1003 ( d3) .4605 ( FB) 2.0000 ( iL) .4987 ( Tj) 23.0000 ( ua) 21.9080 ( Ud) 99.9500 ( ue) 100.0000 (dis)1.000E+06 ( eta) .9599 ( Vcc) 20.0000 (X U1.3) -.0505 **** SMALL SIGNAL BIAS SOLUTION PARAM RA = 215.44 ****************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( d1) .1003 ( d3) .5988 ( FB) 2.0000 ( iL) .4987 ( Tj) 23.0000 ( ua) 32.3400 ( Ud) 99.9500 ( ue) 100.0000 (dis)1.000E+06 ( eta) .9709 ( Vcc) 20.0000 (X U1.3) -.0505 **** SMALL SIGNAL BIAS SOLUTION PARAM RA = 464.16 ****************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( d1) .1003 ( d3) .6939 ( FB) 2.0000 ( iL) .4987 ( Tj) 23.0000 ( ua) 47.6540 ( Ud) 99.9500 ( ue) 100.0000 (dis)1.000E+06 ( eta) .9785 ( Vcc) 20.0000 (X U1.3) -.0505 **** SMALL SIGNAL BIAS SOLUTION PARAM RA = 1.0000E+03 ****************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE ( d1) .1003 ( d3) .7591 ( FB) 2.0000 ( iL) .4987 ( Tj) 23.0000 ( ua) 70.1330 ( Ud) 99.9500 ( ue) 100.0000 (dis)1.000E+06 ( eta) .9837 ( Vcc) 20.0000 (X U1.3) -.0505 Page 7 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 2 Flyback converter with electrical isolation, 1 output 2.1 Averaged circuit Ts: Cycle time Ud1: Forward voltage of D1 Rds: Forward resistance of S1 Although no switch is integrated, the parameter Rds is required in order to determine the damping in the converter. (File: 1004i_sch.sch) 2.2 Averaged model D1*(-Ua1+Ue/V1)-(1-D1-D3)*Ud1 V(8,100)*(-V(5,101)+V(2,100)/V1)-(1-V(8,100)-V(207,100))*V(30,100) V8 0 RDS*D1*IL RDS*V(8,100)*I(L1) + 0 R15 Eed -I(VU1)/V1 21 R5 ------> 100MEG 6 80 Gtr E5 Eed V(207,100)*V(5,101) D3*Ua1 VU1 40 Etr1 Eed Rxx6 5 V7 C2 1k 0 {CA1} 15 Ged D3*I(L1) Ged G6 L1 E2 V(4,80)/V1 V(207,100)*I(L1) {L} Ud Rxx8 Eed - -I(VU1)/V1 {RL} Ue ------> Up/V1 Ua1 R9 {RCA1} Rxx7 101 1k Rxx1 1k 22 12 + + 3 E14 1k - 4 2 - Rxx3 1k dis 0 Rxx2 E2b + + E 1MEG 252 1k PARAMETERS: Ls {L*1MEG} LT {L/TS} 251 E2a V(2,100)/Ls UE/Ls Eed 100 IF(1-V(8,100)-V(206,100)>null,V(206,100),1-V(8,100)) d2 = 2*iLg*LT/((-Ua1+Ud1)*V1) R22 202 (-V(5,101)+V(30,100))*V1 E202 1MEG E203 2*V(14,100)*LT Rxx4 8 D1 1k 203 R23 204 1MEG 205 1MEG R12 206 E205 E204 1MEG E206 D3'=1-D1-D2 1-V(8,100)-V(204,100) Eed IF(V(202,100)>null, V(203,100)/V(202,100) ,1) R11 100 D3 207 E207 Eed D3=D3'>0 ? D3' : 0 D3<1-D1 ? D3 : 1-D1 Eed IF(V(205,100)>null,V(205,100),0) eta 223 E223 ETA=(UA1*IA1+UA2*IA2)/(UE*IE+0.001) R18 30 R20 222 1MEG Eud1 220 1MEG E222 R3 V(2,100)*I(V8) 100 1MEG R16 1MEG 14 E220 ud1 = V1>0 ? ud1 : -ud1 V(5,101)*I(V7) 100 Eed iL E8 IF(V1>null, UD1, -UD1) I(L1) iLg Eed IF(V(222,100)>null, V(220,100)/V(222,100), 0) (File: 1004i_md.sch) Page 8 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 2.3 Time-domain characteristic with current loop (File: 1004i_zp.sch) (G) 1004i_zp 1.0V 0V V(X_U5.gtdrv)/12 V(d1) V(d3) 5.0 1 2 0 0.8+40*0.03*V(iL)+0.5*V(d1)*10u*40*0.03*V(dis) 4.0 V(X_U5.pwmrmp) V(FB) 0 V(iL) I(L1) V(ua) V(uazt) 20V SEL>> -0V 0s 0.5ms 1.0ms 1.5ms 2.0ms V(Vcc) Time Datum: November 11, 2000 Zeit: 20:08:06 Switch-on characteristic with sawtooth controller voltage V(FB).The second curve shows the comparison of the inductor peak current iLs in the switched model with the calculation in the averaged model: iLs ∼ mean value of iL + half current rise dis * Ts. iLs = 0.8 + 40RsiL + 1/2d1Ts40Rsdis Page 9 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models At marking 1 the current is limited by the maximum pulse control factor Dmax = 0.5. At marking 2 the PWM is switched off by the drop in the supply voltage Vcc. Page 10 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 2.4 DC operating points E1 calculated for comparison of the output voltage ua (File:1004i_gl.sch) (B) 1004i_gl 200V 150V 100V 50V 0V V(ua) V(uas) 1.0V 0.5V SEL>> 0V 0V 1.0V V(eta) 2.0V 3.0V 4.0V V(d3) V_VFB Datum: November 11, 2000 Zeit: 18:50:50 Logarithmic variation of Ra from 10Ω ... 1kΩ with 3 values per decade, with Ue = 100V and Ud1 = 0.8V. The TDA 1683x is switched on only after V(FB) > 0.8V. Page 11 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 2.5 Frequency-domain characteristic (File:1004i_fq.sch) (D) 1004i_fq 100 50 0 SEL>> -50 DB(V(ua)/V(d1)) 0d -50d -100d -150d -200d 10Hz 100Hz P(V(ua)/V(d1)) 1.0KHz 10KHz 100KHz Frequency Datum: November 11, 2000 Zeit: 19:02:09 Response characteristic of ua/d1. Variation of Ra from 10Ω ... 1kΩ with 3 values per decade. Page 12 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 3 Flyback converter with electrical isolation, 2 outputs 3.1 Averaged circuit Ts: Elementary period Rds: Forward resistance of S1 Although no switch is integrated, the parameter Rds is required in order to determine the attenuation in the converter. Ud1: Forward voltage of D1 Ud2: Forward voltage of D2 (File: 1005i_sch.sch) 3.2 Averaged model D1*(-Ua1+Ue/V1)-(1-D1-D3)*Ud1 V(8,100)*(-V(5,101)+V(2,100)/V1)-(1-V(8,100)-V(207,100))*V(30,100) 0 -I(VU1)/V1-I(VU2)/V2 RDS*D1*IL RDS*V(8,100)*I(L1) 100MEG Gtr 1k E2b + +E 1MEG 252 Rxx7 101 D1*(-Ua2+Ue/V2)-(1-D1-D3)*Ud2 251 V(8,100)*(-V(7,102)+V(2,100)/V2)-(1-V(8,100)-V(207,100))*V(31,100) IF(V2*I(E2c)>-null, 1k*I(E2c), 0) 7 52 50 51 53 VU2 E2a + V(2,100)/Ls E5a Eed Eed E2c V(207,100)*V(7,102) 54 D3*Ua2 Eed 100 1k {CA2} V(4,80)/V2 Etr2 Eed PARAMETERS: Ls {L*1MEG} LT {L/TS} 55 ------> Ua2 Up/V2 R9a {RCA2} 0 Rxx8 d2 = 2*iLg*LT/((-Ua1+Ud1)*V1) (-V(5,101)+V(30,100))*V1 202 R22 E202 1MEG 102 1k R23 203 E203 204 205 E204 1MEG R11 IF(1-V(8,100)-V(206,100)>null,V(206,100),1-V(8,100)) 1MEG 206 E205 E206 D3'=1-D1-D2 IF(V(202,100)>null, V(203,100)/V(202,100), 1) 2*V(14,100)*LT Rxx4 8 eta 223 R3 Eed R12 1MEG 207 E207 D3<1-D1 ? D3 : 1-D1 D3=D3'>0 ? D3' : 0 1-V(8,100)-V(204,100) Eed Eed D3 IF(V(205,100)>null,V(205,100),0) 100 D1 1k Rxx5 1k V11 0 C2a E24a - 0 UE/Ls Rxx1 R9 {RCA1} Ged G6 80 ------> Ua1 Up/V1 D3*I(L1) L1 1k dis 1k {CA1} 15 1k Rxx2 E24 D3*Ua1 V(207,100)*I(L1) {L} Ud Rxx6 V7 0 C2 Ged Etr1 Eed 6 Rxx10 Eed V(4,80)/V1 R5 {RL} Ue E5 V(207,100)*V(5,101) VU1 40 21 ------> E2 - 0 -I(VU1)/V1-I(VU2)/V2 R15 Eed Eed 5 - V8 + IF(V1*I(E2)>-null, 1k*I(E2), 0) 22 10 + 1k 12 - 3 E14 - 4 + 2 + Rxx3 E223 ETA=(UA1*IA1+UA2*IA2)/UE*IE R18 1MEG 222 E222 30 R19 R20 221 1MEG E221 1MEG 220 Eud1 E220 1MEG 100 IF(V(222,100)>null, (V(220,100)+V(221,100))/V(222,100), 0) V(7,102)*I(V11) V(5,101)*I(V7) R16 R17 1MEG 31 1MEG 14 IF(V2>null, UD2, -UD2) IF(V1>null, UD1, -UD1) ud1 = V1>0 ?-ud1 : -ud1 Eed 100 iL E8 Eud2 ud2 = V2>0 ? ud2 : -ud2 Eed I(L1) iLg Eed V(2,100)*I(V8) (File: 1005i_md.sch) Page 13 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 3.3 Time-domain characteristic with current loop (File: 1005i_zp.sch) (A) 1005i_zp 5.0V SEL>> 0V V(X_U16.pwmrmp) V(FB) V(SoftS) 500m 0 -500m I(L1) V(iL) 20V 10V 0V -10V 0s 0.5ms V(ua1) V(uazt1) V(ua2) 1.0ms V(uazt2) Time Datum: November 11, 2000 1.5ms 2.0ms Zeit: 18:44:19 Switch-on characteristic with current loop for a step change of the control voltage V(FB) from V(FB) = 0 to V(FB) = 3V. The top curve shows how the inductor peak current is limited, first by the soft-start voltage and then by the controller voltage V(FB). Page 14 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 3.4 DC operating points Calculate E1 and E2 for comparison of the output voltages ua1 and ua2 (File: 1005i_gl.sch) (E) 1005i_gl 20V 10V 0V -10V V(ua2) V(ua2s) V(ua1) V(ua1s) 20V 0V -20V -40V 1.0V 0.5V SEL>> 0V 0V 1.0V V(eta) 2.0V 3.0V 4.0V V(d3) V_VFB Datum: November 11, 2000 Zeit: 19:03:47 Logarithmic variation of Ra from 1Ω ... 100Ω with 3 values per decade, with Ue = 100V and Ud1 = Ud2 = 0.8V. The TDA 16822 is switched on only after V(FB) > 0.8V. Page 15 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models 3.5 Frequency-domain characteristic (File: 1005i_fq.sch) (F) 1005i_fq 50 0 SEL>> -50 DB(V(ua2)/V(d1)) 0d -100d -200d -300d 10Hz 100Hz P(V(ua2)/V(d1)) 1.0KHz 10KHz 100KHz Frequency Datum: November 11, 2000 Zeit: 19:04:38 Response characteristic of ua2/d1. Variation of Ra from 1Ω ... 100Ω with 3 values per decade. The phase response begins at 0 because the transformer ratio V2 is negative. Page 16 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models A Convergence aids As SPICE was originally developed for simulation of integrated circuits, it makes sense to adapt the OPTIONS to the needs and conditions of switched mode power supplies. Experience shows that the following extreme values are adequate: Minimum voltage of interest in the circuit: Minimum current of interest in the circuit: Greatest resistance in the circuit: Umin = 1 mV. Imin = 1 mA. Rmax = 100MΩ. If the preset relative tolerance (RELTOL) of 0.001 is retained, the following is obtained for the transient analysis: RELTOL = 0.001 (preset) VNTOL=RELTOL*Umin ⇒ VNTOL = 1 uV (preset) ABSTOL = RELTOL *Imin ⇒ ABSTOL = 1uA In addition, it is advantageous to increase the number of iterations per time increment in the transient analysis; ITL4 = 40 ... 100. In the DC analysis, i.e. to determine the operating point, SPICE automatically connects a very small conductance in parallel with the switching components. This conductance should be adapted to the circuit: GMIN = 1/Rmax ⇒ GMIN = 0.01u In addition, the number of iterations for determining the operating point should be increased: ITL1 = 500 This results in the following changes to the OPTIONS: ABSTOL = 1uA GMIN = 0.01u ITL1 = 500 ITL4 = 40 B Notes on the subcircuits B.1 Activation All subcircuits are located in the infineon library which can be found in the subdirectory ..\lib. The library consists of two files: Infineon1.slb Infineon1.lib In order to link the library, the following needs to be entered into SCHEMATICS before the first simulation is carried out: File / Edit Library / File / Open... / infineon1.slb / Save Page 17 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models The circuits in SCHEMATICS can be called with the commands Draw / Get New Part / Browse / infineon.slb. The subcircuit description is located in ...\lib\infineon1.lib. You therefore have to make this library known in SCHEMATICS: Analysis / Library and Include Files... / infineon.lib / Add Library* The circuits contained in directory ...\SMPS_examples are executable only under PSPICE version 7.1 or higher. In order to use the subcircuits, the grid size must be set in SCHEMATICS: Options / Display Options / Grid Size 00.05in or Grid Size 01.25 mm B.2 Adapting the averaged models The averaged models (files *_mod.sch) of the subcircuits can be customized. To this end, the netlist must be regenerated following the modification: Analysis / Create Netlist This netlist can now be opened with the PSPICE text editor: Analysis / Examine Netlist All resistors beginning with Rxx must now be removed. This is done most easily with the Search command of the editor. Finally, the netlist must be copied into the subcircuit in infineon.lib. Page 18 / 20 AN-PSM-11 V1.0 Switched and Averaged Pspice Models Attention please! We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Simulation models provided by INFINEON are not warranted by INFINEON as fully representing all of the specifications and operating characteristics of the semiconductor product to which the model relates. The model describe the characteristics of a typical device. In all cases, the current data sheet information for a given device is the final design guideline and the only actual performance specification. Although models can be a useful tool in evaluating device performance, they cannot model exact device performance under all conditions, nor are they intended to replace bread-boarding for final verification. INFINEON therefore does not assume any liability arising from their use. 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Semiconductores Avenida Mutinga,3800-Pirituba 05110-901 São Paulo-SP T (+55)11-39 08 25 64 Fax (+55)11-39 08 27 28 CDN Infineon Technologies Corporation 320 March Road,Suite 604 Canada,Ontario K2K 2E2 T (+1)6 13-5 91 63 86 Fax (+1)6 13-5 91 63 89 CH Siemens Schweiz AG Bauelemente Freilagerstrasse 40 CH-8047 Zürich T (+41)1-4 953065 Fax (+41)1-4 955050 D Infineon Technologies AG Völklinger Str.2 D-40219 Düsseldorf T (+49)2 11-3 99 29 30 Fax (+49)2 11-3 99 14 81 Infineon Technologies AG Werner-von-Siemens-Platz 1 D-30880 Laatzen (Hannover) T (+49)5 11-8 77 22 22 Fax (+49)5 11-8 77 15 20 Infineon Technologies AG Von-der-Tann-Straße 30 D-90439 Nürnberg T (+49)9 11-6 54 76 99 Fax (+49)9 11-6 54 76 24 Infineon Technologies AG Weissacher Straße 11 D-70499 Stuttgart T (+49)7 11-1 37 33 14 Fax (+49)7 11-1 37 24 48 D Infineon Technologies AG Halbleiter Distribution Richard-Strauss-Straße 76 D-81679 München T (+49)89-92 21 40 86 Fax (+49)89-92 21 20 71 DK Siemens A/S Borupvang 3 DK-2750 Ballerup T (+45)44 77-44 77 Fax (+45)44 77-40 17 E Siemens S.A. Dpto.Componentes Ronda de Europa,5 E-28760 Tres Cantos-Madrid T (+34)91-5 14 71 51 Fax (+34)91-5 14 70 13 H Simacomp Kft. Lajos u.103 H-1036 Budapest T (+36)1-4 57 16 90 Fax (+36)1-4 57 16 92 NL Siemens Electronic Components Benelux Postbus 16068 NL-2500 BB Den Haag T (+31)70-3 33 20 65 Fax (+31)70-3 33 28 15 Email:[email protected] HK Infineon Technologies Hong Kong Ltd. Suite 302,Level 3, Festival Walk, 80 Tat Chee Avenue, Yam Yat Tsuen, Kowloon Tong Hong Kong T (+8 52)28 32 05 00 Fax (+8 52)28 27 97 62 NZ Siemens Auckland 300 Great South Road Greenland Auckland T (+64)9-5 20 30 33 Fax (+64)9-5 20 15 56 I P Siemens S..A. Semiconductor Sales Via Piero e Alberto Pirelli,10 I-20126 Milano T (+39)02-66 76 -1 Fax (+39)02-66 76 43 95 Siemens S.A. an Componentes Electronicos R.Irmaos Siemens,1 Alfragide P-2720-093 Amadora T (+351)1-4 17 85 90 Fax (+351)1-4 17 80 83 IND Siemens Ltd. Components Division No.84 Keonics Electronic City Hosur Road Bangalore 561 229 T (+91)80-8 52 11 22 Fax (+91)80-8 52 11 80 Siemens Ltd. CMP Div,5th Floor 4A Ring Road,IP Estate New Delhi 110 002 T (+91)11-3 31 99 12 Fax (+91)11-3 31 96 04 Siemens Ltd. CMP Div,4th Floor 130,Pandurang Budhkar Marg, Worli Mumbai 400 018 T (+91)22-4 96 21 99 Fax (+91)22-4 96 22 01 IRL Siemens Ltd. Electronic Components Division 8,Raglan Road IRL-Dublin 4 T (+3 53)1-2 16 23 42 Fax (+3 53)1-2 16 23 49 IL Nisko Ltd. 2A,Habarzel St. P.O.Box 58151 61580 Tel Aviv –Isreal T (+9 72)3 -7 65 73 00 Fax (+9 72)3 -7 65 73 33 PK Siemens Pakistan Engineering Co.Ltd. PO Box 1129,Islamabad 44000 23 West Jinnah Ave Islamabad T (+92)51-21 22 00 Fax (+92)51-21 16 10 PL Siemens SP.z.o.o. ul.Zupnicza 11 PL-03-821 Warszawa T (+48)22-8 70 91 50 Fax (+48)22-8 70 91 59 ROK Siemens Ltd. Asia Tower,10th Floor 726 Yeoksam-dong,Kang-nam Ku CPO Box 3001 Seoul 135-080 T (+82)2-5 27 77 00 Fax (+82)2-5 27 77 79 RUS INTECH electronics ul.Smolnaya,24/1203 RUS-125 445 Moskva T (+7)0 95 -4 51 97 37 Fax (+7)0 95 -4 51 86 08 S Siemens Components Scandinavia Österögatan 1,Box 46 S-164 93 Kista T (+46)8-7 03 35 00 Fax (+46)8-7 03 35 01 Email: [email protected] Page 20 / 20 VRC Infineon Technologies Hong Kong Ltd. Beijing Office Room 2106,Building A Vantone New World Plaza No.2 Fu Cheng Men Wai Da Jie Jie 100037 Beijing T (+86)10 -68 57 90 -06,-07 Fax (+86)10 -68 57 90 08 Infineon Technologies Hong Kong Ltd. Chengdu Office Room14J1,Jinyang Mansion 58 Tidu Street Chengdu, Sichuan Province 610 016 T (+86)28-6 61 54 46 /79 51 Fax (+86)28 -6 61 01 59 Infineon Technologies Hong Kong Ltd. Shanghai Office Room1101,Lucky Target Square No.500 Chengdu Road North Shanghai 200003 T (+86)21-63 6126 18 /19 Fax (+86)21-63 61 11 67 Infineon Technologies Hong Kong Ltd. Shenzhen Office Room 1502,Block A Tian An International Building Renim South Road Shenzhen 518 005 T (+86)7 55 -2 28 91 04 Fax (+86)7 55-2 28 02 17 ZA Siemens Ltd. Components Division P.O.B.3438 Halfway House 1685 T (+27)11-6 52 -27 02 Fax (+27)11-6 52 20 42 AN-PSM-11 V1.0