A pp li c at i on N ot e , R ev . 1. 2 , S e pt e m be r 2 00 7 A p p li c a t i o n N o t e N o . 1 2 3 L o w C o s t 2. 3 3 G H z C l a s s A S D A R S A c t i v e A n te n n a A m p l i f i e r O ut p u t S ta g e u s i n g t h e I n f i ne o n B FP 6 50 S i G e T ra n s i s t o r R F & P r o t e c ti o n D e v i c e s Edition 2007-09-03 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2009. All Rights Reserved. LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. 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Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Application Note No. 123 Application Note No. 123 Revision History: 2007-09-03, Rev. 1.2 Previous Version: 2004-11-09, Rev. 1.1 Page Subjects (major changes since last revision) All Document layout change Application Note 3 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage 1 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage using the Infineon BFP650 SiGe Transistor Applications • 2.33 GHz “SDARS” Satellite Radio Active Antenna Output Stage Overview The Silicon-Germanium BFP650 SiGe Low Noise Transistor is shown in an SDARS active antenna LNA application. The BFP650 is targeted for the output stage in a 2 or 3 stage LNA chain. A key parameter is +20 dBm P1dB capability in the output stage. The demo board is standard FR4 material and "0402" case sizes components are used throughout. A total of approximately 45 mm² of PCB area is required, and the total component count, including the BFP650 and all passives, is 13. 7\SFLDO6'$56$FWLYH$QWHQQD/1$ 0+]6,5,866WDJHV 0+];05DGLRVWDJHV &RPELQHG6DWHOOLWH&LUFXODU3RODUL]DWLRQ7HUUHVWULDO$QWHQQD/LQHDU3RODUL]DWLRQ ,QILQHRQ %)3%)3) ,QILQHRQ %)3) 25 %)3) &RD[&DEOH $SSUR[G% ORVV %DQGSDVV)LOWHU ,QILQHRQ %)3 * G% ,'& P$ 1) G% 3G% G%P#9P$ 3G% G%P#9P$ 20,7WKLVVWDJHIRU ;05DGLR $1BEORFNBGLDJUDPYVG Figure 1 Block Diagram Summary Achieved 14.1 dB gain, 1.3 dB Noise Figure over the 2320 - 2345 MHz band, drawing 59.2 mA @ 3.3 V, or 53.1 mA @ 3.0 V. Noise figure result does NOT "back out" FR4 PCB losses - if PCB loss at LNA input were extracted, Noise Figure result would be approximately 0.1 - 0.2 dB lower. Amplifier is unconditionally stable from 5 MHz to 6 GHz. Output P1dB = +19.6 dBm @ 3 V, or +18.7 dBm @ 3.0 V. Input 3rd Order Intercept = +21.1 dBm @ 2332 MHz, 3.3 V, Output IP3 = +35.2 dBm @ 3.3 V. Application Note 4 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage PCB Cross - Section Diagram 7+,663$&,1*&5,7,&$/ 723/$<(5 LQFKPP ,17(51$/*5281'3/$1( LQFKPP" /$<(5)250(&+$1,&$/5,*,',7<2)3&% 7+,&.1(66+(5(127&5,7,&$/$6 /21*$6727$/3&%7+,&.1(66'2(6127(;&((',1&+PP 63(&,),&$7,21)25727$/3&%7+,&.1(66,1&+ PPPP %27720/$<(5 Figure 2 $1B3&%YVG PCB - Cross Sectional Diagram Schematic Diagram 9FF RU9 - '&&RQQHFWRU , RUP$ 5 RKPV 5 . & X) & S) 5 RKPV / %ODFNUHFWDQJOHVDUHPLFURVWULS Q+ WUDFNVQRWFKLSFRPSRQHQWV - 5),1387 & X) / 4 Q+ %)36L*H 7UDQVLVWRU 627 RKPPLFURVWULS & S) - 5)287387 RKPPLFURVWULS 3&% 5HY$ 3&%RDUG0DWHULDO 6WDQGDUG)5 & S) & S) %)39FH RU9 ,QGXFWLYH(PLWWHU'HJHQHUDWLRQ0LFURVWULS IRU,3LPSURYHPHQW5)PDWFKLQJ :LGWK LQFKPP /HQJWK LQFKPP Figure 3 & S) $1B6FKHPDWLFYVG Schematic Diagram Application Note 5 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Summary of Data T = 25 °C, network analyzer source power = -25 dBm Table 1 Summary of LNA Data Parameter Result Comments Frequency Range Under 2320 to 2345 MHz Covers both XM Radio and SIRIUS frequency bands DC Current 59.2 mA @ 3.0 V 53.2 mA @ 3.0 V Note power supply voltage is measured directly across PCB supply line and ground, to eliminate voltage drop across wire harness! Gain 14.2 dB @ 2320 MHz 14.1 dB @ 2332.5 MHz 14.1 dB @ 2345 MHz Negligible change in gain or matching at 3.3 or 3.0 V Noise Figure 1.3 dB @ 2320 MHz 1.3 dB @ 2332.5 MHz 1.3 dB @ 2345 MHz These values do NOT extract PCB losses, etc. resulting from FR4 board and passives used on PCB - these results are at input SMA connector. Input P1dB +6.5 dBm @ 3.3 V +5.6 dBm @ 3.0 V Measured @ 2332.5 MHz. See pages 10 and 11. Output P1dB +19.6 dBm @ 3.3 V +18.7 dBm @ 3.0 V See pages 10 and 11. Power Added Efficiency (PAE) at 1 dB Compression Point 44.4% @ 3.3 V 44.2% @ 3.0 V PAE = (POUT - PIN) / (VCC x IC) Decent results for a “Class A” amplifier. Input 3rd Order Intercept +21.1 dBm @ 2332 MHz See pages 17 and 18. Measured at 3.3 V Output 3rd Order Intercept +35.1 dBm @ 2332 MHz See pages 17 and 18. Measured at 3.3 V Input Return Loss 14.5 dB @ 2320 MHz 14.5 dB @ 2332.5 MHz 14.5 dB @ 2345 MHz Output Return Loss 13.9 dB @ 2320 MHz 13.6 dB @ 2332.5 MHz 13.3 dB @ 2345 MHz Reverse Isolation 18.0 dB @ 2320 MHz 17.9 dB @ 2332.5 MHz 17.9 dB @ 2345 MHz Application Note 6 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Noise Figure, Plot, 2232.5 MHz to 2432.5 MHz. Center of Plot (x-axis) is 2332.5 MHz. 5RKGH6FKZDU])6(. 1RY 1RLVH)LJXUH (871DPH 0DQXIDFWXUHU 2SHUDWLQJ&RQGLWLRQV 2SHUDWRU1DPH 7HVW6SHFLILFDWLRQ &RPPHQW %)3*+]6'$56$FWLYH$QWHQQDP:2XWSXW6WDJH ,QILQHRQ7HFKQRORJLHV 9 9, P$7 & *HUDUG:HYHUV 0+] 3&% 5HY$ 1RYHPEHU $QDO\]HU 5)$WW 5HI/YO G% G%P 5%: 9%: 0+] +] 5DQJH G% 5HI/YODXWR 21 0RGH 'LUHFW (15 +3$(15 0HDVXUHPHQW QGVWDJHFRUU 21 1RLVH)LJXUHG% 0+] 0+]',9 0+] $1BSORWBQIYVG Figure 4 Noise Figure Application Note 7 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Noise Figure, Tabular Data 2232.5 MHZ to 2442.5 MHz From Rhode & Schwarz FSEK3 + FSEM30 System Preamplifier = MITEQ SMC-02 Table 2 Noise Figure Frequency Noise Figure 2232.5 MHz 1.34 dB 2245 MHz 1.33 dB 2257.5 MHz 1.35 dB 2270 MHz 1.32 dB 2282.5 MHz 1.34 dB 2295 MHz 1.33 dB 2307.5 MHz 1.34 dB 2320 MHz 1.33 dB 2332.5 MHz 1.30 dB 2345 MHz 1.29 dB 2357.5 MHz 1.30 dB 2370 MHz 1.31 dB 2382.5 MHz 1.31 dB 2395 MHz 1.30 dB 2407.5 MHz 1.31 dB 2420 MHz 1.32 dB 2432.5 MHz 1.32 dB 2442.5 MHz 1.29 dB Application Note 8 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Scanned Image of PC Board Figure 5 Image of PC Board Application Note 9 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Scanned Image of PC Board, Close-In Shot Total PCB area used ≅ 45 mm² Figure 6 Image of PC Board, Close-In Shot Application Note 10 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Stability Plots of Stability Factor "K" and Stability Measure "B1" from 5 MHz to 6 GHz. Plots are generated from real, measured S parameters taken from the demo PC board, NOT a simulation. S parameters are exported from Network Analyzer, then imported into Eagleware GENESYS software, which calculates and plots K and B1. Note K>1 and B1 > 0, showing unconditional stability. K is trace in red color (bottom trace) and is assigned to left vertical axis at bottom of page. Note K > 1. “Glitch" at low frequencies e.g. < 100 MHz is due to lack of dynamic range in network analyzer - S parameter S12 becomes vanishingly small as one moves lower in frequency, which causes expression for calculating "K" to "blow up”. B1 is trace is blue in color (top trace) and is assigned to right vertical axis. Figure 7 Plot of K(f) and B1(f) Application Note 11 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Gain Compression Test VCC = 3.3 V. Network Analyzer is set to "CW" mode - e.g. set to a single frequency, with power sweep. Input power is swept from -18 dBm to +10 dBm at 2332.5 MHz. Amplifier hits Input 1 dB compression point (IP1dB) at +6.5 dBm input power. A 20 dB pad is placed after the amplifier to prevent the network analyzer input from being "slammed" with too much power. Note indicated gain shows approximately -6 dB + 20 dB (pad) = +14.1 dB when amplifier is not in compression, and +13.1 dB at 1 dB compression point. Output P1dB = +6.5 dBm + 13.1 dB gain = +19.6 dBm, or 91.2 mW. &+ 6 ORJ0$* G% 5()G% 1RY BG% G%P 35P BG% G%P &RU 0$5.(5 G%P 'HO 6PR 9ROWVP$ 67$57G%P &:0+] 6723G%P $1BSORWBJDLQBFRPSB9YVG Figure 8 Plot of Gain Compression @ 3.3 Volts Application Note 12 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Gain Compression Test VCC = 3.0 V. Network Analyzer is set to "CW" mode - e.g. set to a single frequency, with power sweep. Input power is swept from -18 dBm to +10 dBm at 2332.5 MHz. Amplifier hits Input 1 dB compression point (IP1dB) at +5.6 dBm input power. A 20 dB pad is placed after the amplifier to prevent the network analyzer input from being "slammed" with too much power. Note indicated gain shows approximately -6 dB + 20 dB (pad) = +14 dB when amplifier is not in compression, and +13 dB at 1 dB compression point. Output P1dB = +5.6 dBm + 13.1 dB gain = +18.7 dBm, or 74.1 mW. &+ 6 ORJ0$* G% 5()G% 1RY BG% G%P 35P BG% G%P &RU 0$5.(5 G%P 'HO 6PR 9ROWVP$ 67$57G%P &:0+] 6723G%P $1BSORWBJDLQBFRPSB9YVG Figure 9 Plot of Gain Compression @ 3.0 Volts Application Note 13 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Input Return Loss, Log Mag 5 MHz to 6 GHz Sweep &+ 6 ORJ0$* G% 5()G% 1RY BG% 0+] 35P BG% *+] &RU BG% *+] 'HO 67$570+] 67230+] $1BSORWBLQSXWBUHWXUQBORVVYVG Figure 10 Plot of Input Return Loss Application Note 14 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Input Return Loss, Smith Chart Reference Plane = Input SMA Connector on PC Board 5 MHz to 6GHz &+ 6 8)6 B 1RY S) 0+] 35P B *+] &RU B *+] 'HO 6PR 67$570+] 67230+] $1BVPLWKBLQSXWBUHWXUQBORVVYVG Figure 11 Smith Chart of Input Return Loss Application Note 15 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Forward Gain, wide Sweep 5 MHz to 6 GHz &+ 6 ORJ0$* G% 5()G% 1RY BG% 0+] 35P &RU 'HO 6&$/( G%GLY BG% *+] BG% *+] 6PR 67$570+] 67230+] $1BSORWBIZBJDLQBZLGHYVG Figure 12 Plot of Forward Gain Application Note 16 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Reverse Isolation 5 MHz to 6 GHz &+ 6 ORJ0$* G% 5()G% 1RY BG% 0+] 35P BG% *+] &RU BG% *+] 'HO 6PR 67$570+] 67230+] $1BSORWBUHYHUVHBLVRODWLRQYVG Figure 13 Plot of Reverse Isolation Application Note 17 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Output Return Loss, Log Mag 5 MHz to 6 GHz &+ 6 ORJ0$* G% 5()G% 1RY BG% 0+] 35P BG% *+] &RU BG% *+] 'HO 6PR 67$570+] 67230+] $1BSORWBRXWSXWBUHWXUQBORVVYVG Figure 14 Plot of Output Return Loss Application Note 18 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Output Return Loss, Smith Chart Reference Plane = Output SMA Connector on PC Board 5 MHz to 6 GHz &+ 6 8)6 1RY S) B 0+] 35P B *+] &RU B *+] 'HO 6PR 67$570+] 67230+] $1BVPLWKBRXWSXWBUHWXUQBORVVYVG Figure 15 Smith Chart of Output Return Loss Application Note 19 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage Input Stimulus for Amplifier Two-Tone Test f1 = 2332 MHz, f2 = 2333 MHz, -10 dBm each tone. $1BSORWBWRZBWRQHBLQSXWYVG Figure 16 Tow-Tone Test, Input Stimulus Application Note 20 Rev. 1.2, 2007-09-03 Application Note No. 123 Low Cost 2.33 GHz Class A SDARS Active Antenna Amplifier Output Stage LNA Response to Two-Tone Test Input IP3 = -10 + (62.2/2) = +21.1 dBm Output IP3 = +21.1 dBm + 14.1 dB gain = +35.2 dBm $1BSORWBWRZBWRQHBUHVSRQVHYVG Figure 17 Tow-Tone Test, LNA Response Application Note 21 Rev. 1.2, 2007-09-03