SC284 Datasheet

SC284
Dual Channel 2.5MHz, 1.8A
Synchronous Step-Down Regulator
POWER MANAGEMENT
Features
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Description
VIN Range — 2.9 – 5.5V
VOUT Selectable — 0.8 - 3.3V
Up to 1.8A Output Current for Each Channel
Ultra-Small Footprint, <1mm Height Solution
Switching Frequency — 2.5MHz
Efficiency Up to 94%
Excellent Light Load Efficiency
Low Output Noise Across Load Range
Excellent Transient Response
Start Up into Pre-Bias Output
100% Duty-Cycle Low Dropout Operation
Shutdown Current — <1µA
Internal Soft Start
Input Under-Voltage Lockout
Output Over-Voltage, Current Limit Protection
Over-Temperature Protection
Adjustable Output Voltage
Package — 3 x 3 x 0.6(mm) UT20
Temperature Range — -40 to +85°C
Lead-free, halogen-free, and RoHS/WEEE compliant
Applications
Desktop Computing
Set-Top Box
 LCD TV
 Network Cards
 Printer
The SC284 is a dual channel 1.8A synchronous stepdown regulator designed to operate with an input
voltage range of 2.9 to 5.5 Volts. Each channel offers
fifteen pre-determined output voltages via four control
pins programmable from 0.8 to 3.3 Volts. The control pins
allow for on-the-fly voltage changes, enabling system
designers to implement dynamic power savings. The
SC284 is also capable of adjusting the output voltage via
an external resistor divider.
The device operates with a fixed 2.5MHz oscillator
frequency, allowing the use of small surface mount
external components.
Connecting CTL0 — CTL3 to logic low forces the device
into shutdown mode reducing the supply current to less
than 1µA. Connecting any of the control pins to logic
high enables the converter and sets the output voltage
according to Table 1. Other features include undervoltage lockout, soft-start to limit inrush current, and
over-temperature protection.
The SC284 is available in a 3 x 3 x 0.6 (mm) MLPQ-UT20
package and has a rated temperature range of -40 to
+85°C.
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Typical Application Circuit
VINA
CINA
10µF
RAVINA 1Ω
CAVINA 10nF
VINB
CINB
10µF
RAVINB 1Ω
CAVINB 10nF
LXA
VOUTA
AVINA
LB 2.2µH
LXB
VOUTB
AGNDA
PVINB
SC284
COUTA
22µF
COUTB
22µF
VOUTA
VOUTB
PGNDA
AVINB
AGNDB
Revision 2.1
LA 2.2µH
PVINA
CTL0A
CTL1A
CTL2A
CTL0A
CTL3A
CTL3A
CTL1A
CTL2A
PGNDB
CTL0B
CTL1B
CTL2B
CTL3B
CTL0B
CTL1B
CTL2B
CTL3B
SC284
20
P V IN A
19
18
17
16
1
TOP VIEW
15
CTL1B
14
CTL0B
AGNDA
2
A V IN A
3
13
A V IN B
CTL0A
4
12
AGNDB
CTL1A
5
11
P V IN B
T
Package
SC284ULTRT(1)(2)
3 x 3 x 0.6(mm) MLPQ-UT20
SC284EVB(3)
Evaluation Board
Notes:
(1) Available in tape and reel only. A reel contains 3,000 devices.
(2) Available in lead-free package only. Device is fully WEEE and RoHS
compliant and halogen-free.
(3) Please specify the default VOUTA & VOUTB when ordering.
10
LXB
9
PGNDB
8
VO UTB
7
C TL3A
C TL2A
6
Device
C TL2B
CTL3B
VOUTA
Ordering Information
PGNDA
LXA
Pin Configuration
3 x 3 x 0.6(mm) MLPQ-UT20
θJA 40°C/W
Marking Information
284
yyw w
xxxx
yyww = Datecode
xxxx = Semtech Lot number
Table 1 – Output Voltage Settings
CTL3_
CTL2_
CTL1_
CTL0_
Output Voltage
0
0
0
0
Shutdown
0
0
0
1
0.80
0
0
1
0
1.00
0
0
1
1
1.025
0
1
0
0
1.05
0
1
0
1
1.20
0
1
1
0
1.25
0
1
1
1
1.30
1
0
0
0
1.50
1
0
0
1
1.80
1
0
1
0
2.20
1
0
1
1
2.50
1
1
0
0
2.60
1
1
0
1
2.80
1
1
1
0
3.00
1
1
1
1
3.30
SC284
Absolute Maximum Ratings
Recommended Operating Conditions
VINA and VINB Supply (V) . . . . . . . . . . . . . . . . . . -0.3 to +6.0
VINA and VINB Supply (V) . . . . . . . . . . . . . . . . . . . . 2.9 to 5.5
LXA, LXB (V). . . . . . . . . . . . . -1 to VIN+1, -3 (20ns Max), 6 Max
Maximum Output current each channel (A). . . . . . . . . . . 1.8
VOUTA, VOUTB (V). . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN+0.3)
Temperature Range (°C). . . . . . . . . . . . . . . . . . . . . . . . . . -40 to +85
CTLxA/B pins (V). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)
Peak IR Reflow Temperature (°C). . . . . . . . . . . . . . . . . . . . . . . . 260
ESD Protection Level (kV) . . . . . . . . . . . . . . . . . . . . . . . . . 3KV
(2)
Thermal Information
Thermal Resistance, Junction to Ambient (1) (°C/W) . . . . . . . . 40
Maximum Junction Temperature (°C) . . . . . . . . . . . . . . . . . . +150
Storage Temperature Range (°C). . . . . . . . . . . . . . . . . -65 to +150
Exceeding the absolute maximum ratings may result in permanent damage to the device and/or device malfunction. Operation outside of the
parameters specified in the Electrical Characteristics section is not recommended.
Notes:
(1) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
(2) Tested according to JEDEC standard JESD22-A114-B.
Electrical Characteristics
Unless specified: VINA= VINB= 5.0V, VOUTA= VOUTB=1.50V, CINA=CINB=10µF, COA=COB= 22µF, L= 2.2µH, -40°C≤ TJ≤ +125 °C. Unless otherwise noted
typical values are TA= +25 °C.
Parameter
Conditions
Min
Typ
Max
Units
Rising VINA, VINB
2.65
2.75
2.85
V
Hysteresis
240
300
ΔVOUT
Channel A & B; VIN= 2.9 – 5.5V; IOUT=0A
-2.0
ILIMIT
Channel A & B; Peak LX current
2.25
IQ
Channel A & B; No load, Per channel
10
ISHDN
CTL0-3= GND, Per channel
1
High Side Switch Resistance(2)
RDSON_P
Channel A & B; ILX= 100mA, TJ= 25 °C
95
Low Side Switch Resistance(2)
RDSON_N
Channel A & B; ILX= -100mA, TJ= 25 °C
65
Channel A & B; VIN= 5.5V; LX= 0V; CTL0-3= GND
1
Under-Voltage Lockout
Output Voltage Tolerance(1)
Current Limit
Supply Current
Shutdown Current
LX Leakage Current(2)
Load Regulation
Symbol
UVLO
ILK(LX)
Channel A & B; VIN= 5.5V; LX= 5.0V; CTL0-3= GND
ΔVLOAD-REG
Channel A & B; VIN= 5.0V; IOUT=1mA – 1.8A
Oscillator Frequency
fOSC
Channel A & B
Soft-Start Time
tSS
Channel A & B; IOUT= 1.8A
3.0
mV
+2.0
%
3.75
A
mA
10
µA
mΩ
10
µA
-10
-1
±0.5
2.0
2.5
850
%
3.0
MHz
µs
SC284
Electrical Characteristics (continued)
Parameter
Foldback Holding Current
CTLx Input Current(2)
Symbol
ICL_HOLD
Conditions
Min
Typ
Max
Units
Average LX Current, VOUT=1.5V
240
mA
Average LX Current, VOUT=3.3V
130
mA
ICTL_
Channel A & B; CTL0-3=VIN or GND
-2.0
CTLx Input High Threshold
VCTLx_HI
Channel A & B
1.2
CTLx Input Low Threshold
VCTLx_LO
Channel A & B
VOUT Over Voltage Protection
VOVP
Channel A & B
115
%
Thermal Shutdown Temperature
TSD
Channel A & B(3)
160
°C
TSD_HYS
Channel A & B(3)
10
°C
Thermal Shutdown Hysteresis
2.0
µA
V
0.4
V
Notes:
(1) The “Output Voltage Tolerance” includes output voltage accuracy, voltage drift over temperature and the line regulation.
(2) The negative current means the current flows into the pin and the positive current means the current flows out from the pin.
(3) The thermal shutdown for both Channel A and B is independent from each other.
SC284
Typical Characteristics
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, Unless otherwise noted, L= 2.2uH (TOKO: 1127AS-2R2M).
Efficiency vs.
Load Current
Efficiency
Total Loss (Per Channel)
vs. Load Current
Total Loss
100%
1000
VIN=5.0V;VOUT=3.3V
TA=25°C
95%
90%
85%
Loss (mW)
Efficiency (%)
VIN=5.0V;VOUT=3.3V
800
80%
VIN=3.3V;VOUT=1.5V
75%
600
VIN=3.3V;VOUT=1.5V
400
70%
VIN=5.0V;VOUT=1.5V
65%
200
TA=25°C
VIN=5.0V;VOUT=1.5V
60%
0
0.0
0.3
0.6
0.9
1.2
Output Current (A)
1.5
1.8
0.0
0.9
1.2
Output Current (A)
1.5
1.8
500
1.0%
TA=25°C
0.8%
TA= 25°C
450
0.6%
400
0.2%
Dropout Voltage (mV)
VIN=3.3V;VOUT=1.5V
0.4%
VIN=5.0V;VOUT=1.5V
0.0%
-0.2%
-0.4%
-0.6%
L= 1071AS-2R2M
(DCR= 60m_max)
350
300
250
200
150
100
VIN=5.0V;VOUT=3.3V
-0.8%
L= 1127AS-2R2M
(DCR=48m_max)
50
-1.0%
0
0.0
0.3
0.6
0.9
1.2
1.5
1.8
0.0
0.3
Output Current (A)
0.9
1.2
1.5
1.8
HysteresisVariation
Variation
UVLOUVLO
Hysteresis
5%
0.8%
4%
0.6%
3%
0.4%
2%
0.2%
1%
Variation
1.0%
0.0%
-0.2%
0%
-1%
-0.4%
-2%
-0.6%
-3%
-0.8%
0.6
Output Current (A)
Rising
Threshold Variation
UVLOUVLO
Rising
Threshold
Variation
Variation
0.6
DropoutDropout
Voltage
in 100% Duty Cycle Operation
Voltage of 100% Duty Cycle Operation
LoadLoad
Regulation
Regulation
Load Regulation
0.3
-4%
IOUT= 0A
IOUT= 0A
-5%
-1.0%
-40
-15
10
35
Ambient Temperature (°C)
60
85
-40
-15
10
35
60
85
Ambient Temperature (°C)
SC284
Typical Characteristics (continued)
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, Unless otherwise noted, L= 2.2uH (TOKO: 1127AS-2R2M).
(P & N)vs.
Variation
Line
RDS(ON)RDSON
Variation
Inputover
Voltage
RDSON
(P & N) Variation
Over Temperature
RDS(ON)
Variation
vs. Temperature
30%
20%
25%
15%
P-Channel
20%
10%
5%
Variation
15%
Variation
VIN= 5.0V
ILX= ±100mA
10%
N-Channel
0%
-5%
5%
-10%
0%
ILX= ±100mA
TA= 25°C
-5%
N-Channel
P-Channel
-15%
-20%
-10%
2.5
3.0
3.5
4.0
4.5
5.0
-40
5.5
-15
5%
60
85
1.0%
4%
0.8%
VOUT= 3.3V
3%
0.6%
2%
0.4%
1%
0.2%
Variation
Variation
35
Switching Frequency
Variation
vs. Temperature
Switching Frequency
Variation
Switching
Frequency
Variation over
Switching
Frequency
Variation
vs. Line
Input Voltage
0%
-1%
-2%
-0.2%
-0.6%
IOUT= 0A
TA= 25°C
-4%
0.0%
-0.4%
VOUT= 1.5V
-3%
VIN= 5.0V
IOUT= 0A
-0.8%
-5%
-1.0%
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40
-15
Input Voltage (V)
35
60
85
Line Regulation
Temperature
Line Regulationvs.
over
Temperature
1.0%
1.0%
0.8%
0.8%
0.6%
0.6%
0.4%
VOUT= 1.5V
Regulation
0.4%
10
Ambient Temperature (°C)
Line
Regulation
Line Regulation
ove Line
Regulation
10
Ambient Temperature (°C)
Input Voltage (V)
0.2%
0.0%
-0.2%
0.2%
0.0%
-0.2%
-0.4%
-0.4%
VOUT= 3.3V
-0.6%
-0.6%
IOUT= 0A
TA= 25°C
-0.8%
VOUT= 1.5V
IOUT= 0A
-0.8%
-1.0%
-1.0%
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
-40
-15
10
35
60
85
Ambient Temperature (°C)
SC284
Typical Waveforms
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, L= 2.2uH (TOKO: 1127AS-2R2M).
Output Voltage Ripple (VOUT=1.5V)
Output Voltage Ripple (VOUT=1.5V)
Output Voltage Ripple (VOUT=1.5V)
Output Voltage Ripple (VOUT=1.5V)
VOUT
1 0 m V /d iv
VOUT
1 0 m V /d iv
I LX
1 A /d iv
I LX
1 A /d iv
V LX
2 V /d iv
V LX
2 V /d iv
V IN = 3.3V
I O U T = 1.8A
V IN = 5.0V
I O U T = 1.8A
5 0 0 n s/d iv
Output Voltage Ripple (VOUT=3.3V)
5 0 0 n s/d iv
Output Voltage Ripple (VOUT=3.3V)
Output Voltage Ripple (VOUT=3.3V)
Output Voltage Ripple (VOUT=3.3V)
VOUT
1 0 m V /d iv
VOUT
1 0 m V /d iv
I LX
0 .5 A /d iv
I LX
1 A /d iv
V LX
2 V /d iv
V LX
2 V /d iv
V IN = 5.0V
I O U T = 0A
V IN = 5.0V
I O U T = 1.8A
5 0 0 n s/d iv
Transient Response (VOUT=1.5V)
Transient Response (VOUT=1.5V; 0A to 1A to 0A)
VOUT
5 0 0 n s/d iv
Transient Response (VOUT=3.3V)
Transient Response (VOUT=3.3V; 0A to 1A to 0A)
VOUT
100m V /div
100m V /div
IO U T
IO U T
1A /div
500m A /div
V IN = 5.0V
I O U T = 0A to 1A
5 0 µs/d iv
V IN = 5.0V
I O U T = 0A to 1A
5 0 µs/d iv
SC284
Typical Waveforms (continued)
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, L= 2.2uH (TOKO: 1127AS-2R2M).
Start Up (VOUT=1.5V)
Start Up (VOUT=1.5V)
Start Up (Enable)(VOUT=1.5V)
VIN
Start Up (Enable)(VOUT=1.5V)
VIN
2V/div
2V/div
VCTLx
VCTLx
2V/div
2V/div
VOUT
VOUT
0.5V/div
0.5V/div
VIN=5.0V
ROUT=1k
VIN=5.0V
ROUT=0.83 (1.8A)
50µs/div
Start Up (VOUT=1.5V), EN=VIN
Start Up (Power up VIN=VCTLx) (VOUT=1.5V)
VIN
200µs/div
Start Up (VOUT=1.5V), EN=VIN
Start Up (Power up VIN=VCTLx) (VOUT=1.5V)
VIN
2V/div
2V/div
VOUT
VOUT
0.5V/div
0.5V/div
VIN=5.0V
ROUT=1k
VIN=5.0V
ROUT=0.83 (1.8A)
200µs/div
Start Up (VOUT=3.3V)
Start Up (VOUT=3.3V)
Start Up (Enable)(VOUT=3.3V)
VIN
200µs/div
Start Up (Enable)(VOUT=3.3V)
VIN
2V/div
2V/div
VCTLx
VCTLx
2V/div
2V/div
VOUT
VOUT
1V/div
1V/div
VIN=5.0V
ROUT=1k
100µs/div
VIN=5.0V
ROUT=1.83 (1.8A)
200µs/div
SC284
Typical Waveforms (continued)
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, L= 2.2uH (TOKO: 1127AS-2R2M).
Start Up (VOUT=3.3V), EN=VIN
Start Up (Power up VIN=VCTLx) (VOUT=3.3V)
VIN
Start Up (VOUT=3.3V), EN=VIN
Start Up (Power up VIN=VCTLx) (VOUT=3.3V)
VIN
2V/div
2V/div
VOUT
VOUT
1.5V/div
1.5V/div
VIN=5.0V
ROUT=1k
VIN=5.0V
ROUT=1.83 (1.8A)
200µs/div
Shutdown-Disable (1.5V)
Shutdown-Disable (3.3V)
Shutdown (Disable)(VOUT=1.5V)
VIN
200µs/div
Shutdown (Disable)(VOUT=3.3V)
VIN
2V/div
2V/div
VCTLx
VCTLx
2V/div
2V/div
VOUT
VOUT
1V/div
1.5V/div
VIN=5.0V
ROUT=1.5
200µs/div
VIN=5.0V
ROUT=3.3
200µs/div
SC284
Pin Descriptions
Pin #
Pin Name
Pin Function
1
PvinA
Channel A — Input supply voltage for the converter power stage and internal circuitry.
2
AGNDA
Ground connection for internal circuitry — connect directly to PGNDA.
3
AVINA
Power supply for internal circuitry — Must be connected to PVINA using an R-C filter of 1Ω and 10nF.
4
CTL0A
Channel A — Control bit 0, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
5
CTL1A
Channel A — Control bit 1, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
6
CTL2A
Channel A — Control bit 2, see Table 1 for decoding. This pin has a 1 MΩ internal pulldown resistor. This resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
7
CTL3A
Channel A — Control bit 3, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
8
VOUTB
Output voltage sense pin of Channel B
9
PGNDB
Channel B — Ground connection for converter power stage and internal circuitry.
10
LXB
11
PvinB
Channel B — Input supply voltage for the converter power stage and internal circuitry.
12
AGNDB
Ground connection for internal circuitry — connect directly to PGNDB.
13
AVINB
Power supply for internal circuitry — Must be connected to PVINB using an R-C filter of 1Ω and 10nF.
14
CTL0B
Channel B — Control bit 0, see Table 1 for decoding. This pin has a 1 MΩ internal pulld-own resistor. This resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
15
CTL1B
Channel B — Control bit 1 - see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This
resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is
in under-voltage lockout.
16
CTL2B
Channel B — Control bit 2, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
17
CTL3B
Channel B — Control bit 3, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
18
VOUTA
Output voltage sense pin of Channel A
19
PGNDA
Channel A — Ground connection for converter power stage and internal circuitry.
20
LXA
Switching node of Channel B — connect an inductor between this pin and the output capacitor.
Switching node of Channel A — connect an inductor between this pin and the output capacitor.
10
SC284
Block Diagram
C u rre n t A m p
A V IN A
1
P V IN A
20
LXA
19
PGNDA
11
P V IN B
10
LXB
9
PGNDB
3
P lim it A m p
O scilla to r a n d
S lo p e G e n e ra to r
VO UTA
18
CTL0A
4
CTL1A
5
CTL2A
6
CTL3A
7
AGNDA
2
C o n tro l
L o g ic
V o lta g e
S e le ct
E rro r A m p
PW M
C om p
500m V
R ef
C u rre n t A m p
A V IN B
13
P lim it A m p
O scilla to r a n d
S lo p e G e n e ra to r
VOUTB
8
CTL0B
14
CTL1B
15
CTL2B
16
CTL3B
17
AGNDB
12
C o n tro l
L o g ic
V o lta g e
S e le ct
E rro r A m p
500m V
R ef
PW M
C om p
11
SC284
Applications Information
Detailed Description
The SC284 is a two channel synchronous step-down
converter. Both channels on this device are designed to
operate in fixed-frequency PWM mode at 2.5MHz and
provide the same current capacity of up to 1.8A. The
switching frequency is chosen to minimize the size of the
external inductor and capacitors while maintaining high
efficiency. Both channels of SC284 are independent.
Operation
During normal operation, the PMOS MOSFET is activated
on each rising edge of the internal oscillator. The voltage
feedback loop uses an internal feedback resistor divider.
The period is set by the internal oscillator. The device
has an internal synchronous NMOS rectifier and does
not require a Schottky diode on the LX pin. The device
operates as a buck converter in PWM mode with a fixed
frequency of 2.5MHz.
Programmable Output Voltage
Both channels on SC284 have fifteen pre-determined
output voltage values which can be individually selected
by programming the CTL input pins (see Table 1 — Output
Voltage Settings). Each CTL pin has an active 1 MΩ internal
pull-down resistor. The 1MΩ resistor is switched in circuit
whenever the CTL input voltage is below the input
threshold, or when the part is in under-voltage lockout. It is
recommended to tie all high CTL pins together and use an
external pull-up resistor to VIN if there is no enable signal, or
if the enable input is an open drain/collector signal. The CTL
pins may be driven by a microprocessor to allow dynamic
voltage adjustment for systems that reduce the supply
voltage when entering sleep states. Avoid all zeros being
present on the CTL pins when changing programmable
output voltages as this would disable the device.
SC284 is also capable of regulating a different (higher)
output voltage, which is not shown in the Table 1, via an
external resistor divider. There will be a typical 2µA current flowing into the VOUT pin. The typical schematic for
an adjustable output voltage option from the standard
1.0V with CTLx=[0010], is shown in Figure 1. RFB1A/B
and RFB2A/B are used to adjust the desired output voltage. If the RFB2A/B current is such that the 2µA VOUT
pin current can be ignored, then RFB1A/B can be found
by the next equation. RFB2A/B needs to be low enough
in value for the current through the resistor chain to be
at least 20µA in order to ignore the VOUT pin current.
VOUT VOSTD
u R FB2
VOSTD
R FB1
where VOSTD is the pre-determined output voltage via the
CTL pins.
CFF is needed to maintain good transient response
performance. The correct value of CFF can be found using
the following Equation.
CFF [nF]
2 .5 u
VOUT 0.52
VOSTD
u(
)
R FB1 [k:] u VOUT VOSTD VOSTD 0.5
To simplify the design, it is recommended to program the
desired output voltage from a standard 1.0V as shown in
Figure 1 with the correct CFF calculated from Equation 2.
For programming the output voltage from other standard
voltages, RFB1, RFB2 and CFF need to be adjusted to meet
Equations 1 and 2.
V IN A
R A V IN A 1Ω
C IN A
10µF
C A V IN A
0.1µF
V IN B
R A V IN B 1Ω
C IN B
10µF
C A V IN B
0.1µF
Enable A
PVIN A
SC284
AVIN A
AGN D A
R FB 1 A
VOU T A
PVIN B
C T L1A
C OU TA
R FB 1A = (V OU TA -1)
x R FB 2 A
for C T LAX = 0010
(1.0V)
L
R FB 1 B
VOU T B
C T L3A
C T L0B
C FFA
V OU TB
LXB
C T L0A
C T L2A
Enable B
R FB2 A
10kΩ
AVIN B
AGN D B
V OU TA
L
LXA
PGN D A
R FB2 B
10kΩ
C FFB
C OU TB
R FB1 B = (V OU TB -1)
x R FB 2 B
for C T LBX = 0010
(1.0V)
C T L1B
C T L2B
C T L3B
PGN D B
Figure 1 — Output Voltage Programming
12
SC284
Applications Information (continued)
Maximum Power Dissipation
2
T A = 68 °C
1 .8
Load Current Channel B (A)
Each channel of SC284 has its own ΘJA of 40°C/W when
only one channel is in operation. Since both channels are
within same package, there is about 50% heat which will be
transferred to the adjacent channel. The equivalent total
thermal impedance will be higher when the neighboring
channel is also in operation. To guarantee an operating
junction temperature of less than 125°C, Figure 2 shows
the maximum allowable power loss of each channel. The
curve is based upon the junction temperature of either
channel reaching a maximum of 125°C. Each channel of
SC284 can support up to 1.8A load current. Figures 3a
and 3b show the maximum allowable load current based
upon the limit of maximum loss for VIN=3.3V and VIN=5.0V,
respectively. The curves are drawn for high duty-cycle
operation. If the operating duty-cycle is lower, the loss is
lower allowing higher load current.
1 .6
T A = 75 °C
1 .4
T A = 85 °C
1 .2
1
0 .8
0 .6
0 .4
0 .2
0
0
0 .2
0.4
0 .6
0 .8
1
1 .2
1 .4
1 .6
2
T A < 7 6 °C
Load Current B (A)
Loss of Channel B (W)
T A = 2 5 °C
1 .8
1 .6
1 .4
1 .2
1
0 .8
0 .6
T A = 8 5 °C
1 .4
1 .2
1
0 .8
0 .6
0 .4
T A = 5 5 °C
0 .2
0 .4
0 .2
0
0
0
0.2
0 .4 0 .6 0 .8
1
1 .2 1 .4 1 .6 1 .8
Loss of Channel A (W)
2
2 .2 2 .4
2 .6 2 .8
Figure 2 — Maximum allowable loss for each channel
for a maximum junction temperature of 125°C
Protection Features
The SC284 provides the following protection features:
Current Limit
Over-Voltage Protection
Soft-Start Operation
Thermal Shutdown
•
•
•
•
T A < 8 5 °C
1 .6
2 .2
2
2
(a) VIN= 3.3V, VOUT=2.5V
1 .8
2 .8
2 .6
2 .4
1 .8
Load Current Channel A (A)
0
0 .2
0 .4
0 .6
0 .8
1
1 .2
1 .4
1 .6
1 .8
2
Load Current A (A)
(b) VIN= 5.0V, VOUT=3.3V
Figure 3 — Maximum allowable Load Current for each
channel for a maximum junction temperature of 125°C
Current Limit and Protection
The internal PMOS power device in the switching stage
is protected by a current limit feature. If the inductor
current is above the PMOS current limit for 16 consecutive
cycles, the part enters foldback current limit mode and
the output current is limited to the current limit holding
current (ICL_HOLD) of a few hundred milliampere. Under
this condition, the output voltage will be the product
of ICL_HOLD and the load resistance. The current limit
holding current will decrease when the output voltage
increases. The load presented must fall below the current
limit holding current for the part to exit foldback current
13
SC284
Applications Information (continued)
limit mode. Figure 4 shows how the typical current limit
holding current varies with output voltage. The SC284 is
capable of sustaining an indefinite short circuit without
damage and will resume normal operation when the fault
is removed. The foldback current limit mode is disabled
during soft-start. Current limit functionality is shown in
Figure 5 at the end of this section.
Current Limit Holding Current over Vout
rail, the SC284 will not discharge the output during the
soft start interval.
Shut Down
When all CTL pins of each channel are low, the channel will
run in shutdown mode, drawing less than 1μA from the
input power supply. The internal switches and bandgap
voltage will be immediately turned off.
300
Current Limit Holding Current (mA)
TA= 25°C
250
Thermal Shutdown
VIN= 3.6V
The device has a thermal shutdown feature to protect
the SC284 if the junction temperature exceeds 160°C.
During thermal shutdown, the on-chip power devices are
disabled, tri-stating the LX output. When the temperature
drops by 10°C, it will initiate a soft start cycle to resume
normal operation.
VIN= 5.0V
200
150
100
VIN= 3.3V
50
Inductor Selection
0
1.0
1.5
2.0
2.5
3.0
3.5
Output Voltage (V)
Figure 4 — Typical Current Limit Holding Current
vs. Output Voltage
Over-Voltage Protection
In the event of a 15% over-voltage on the output, the
PWM drive is disabled leaving the LX pin floating.
Soft-Start
The soft-start mode is activated after VIN reaches its UVLO
and one or more CTL pins are set high to enable the part.
A thermal shutdown event will also activate the soft start
sequence. Soft-start mode controls the maximum current
during startup thus limiting inrush current. The PMOS
current limit is stepped through four soft start levels of
approximately 20%, 25%, 40%, & 100%. Each step is maintained for 200μs following an internal reference start up
duration of 50μs giving a total nominal startup period of
850μs. During startup, the chip operates by controlling
the inductor current swings between 0A and current limit.
If at any time VOUT reaches 86% of the target or at the end
of the soft-start period, the SC284 will switch to PWM
mode operation. Figure 6 at the end of this section shows
the typical diagram of soft start operation.
The SC284 is capable of starting up into a pre-biased
output. When the output is precharged by another supply
The SC284 converter has internal loop compensation.
The compensation is designed to work with an output
filter corner frequency of less than 40kHz for a VIN of 5V
and 50KHz for a VIN of 3.3V over any operating condition.
The corner frequency of the output filter is shown in the
following equation.
1
fC
2S
L u C OUT
Values outside this range may lead to instability,
malfunction, or out-of-specification performance.
In general, the inductance is chosen by making the
inductor ripple current to be less than 30% of maximum
load current. When choosing an inductor, it is important
to consider the change in inductance with DC bias
current. The inductor saturation current is specified as
the current at which the inductance drops a specific
percentage from the nominal value. This is approximately
30%. Except for short-circuit or other fault conditions,
the peak current must always be less than the saturation
current specified by the manufacturer. The peak current is
the maximum load current plus one half of the inductor
ripple current at the maximum input voltage. Load and/or
line transients can cause the peak current to exceed this
level for short durations. Maintaining the peak current
14
SC284
Applications Information (continued)
below the inductor saturation specification keeps the
inductor ripple current and the output voltage ripple at
acceptable levels. Manufacturers often provide graphs of
actual inductance and saturation characteristics versus
applied inductor current. The saturation characteristics of
the inductor can vary significantly with core temperature.
Core and ambient temperatures should be considered
when examining the core saturation characteristics.
When the inductance has been determined, the DC
resistance (DCR) must be examined. The efficiency that
can be achieved is dependent on the DCR of the inductor.
The lower values give higher efficiency. The RMS DC
current rating of the inductor is associated with losses in
the copper windings and the resulting temperature rise of
the inductor. This is usually specified as the current which
produces a 40˚C temperature rise. Most copper windings
are rated to accommodate this temperature rise above
maximum ambient.
Magnetic fields associated with the output inductor can
interfere with nearby circuitry. This can be minimized by
the use of low noise shielded inductors which use the
minimum gap possible to limit the distance that magnetic
fields can radiate from the inductor. However shielded
inductors typically have a higher DCR and are thus less
efficient than a similarly sized non-shielded inductor.
Final inductor selection depends on various design
considerations such as efficiency, EMI, size, and cost.
Table 2 lists the manufacturers of recommended inductor
options. The saturation characteristics and DC current
ratings are also shown.
Manufacturer
Part Number
L
(μH)
DCR
Max
(Ω)
Rated
Current
(A)
L at
Rated
Current
(μH)
Dimensions
LxWxH
(mm)
TOKO
1071AS-2R2M
2.20±20% 0.060
1.80
1.54
2.8x3.0x1.5
TOKO
1071AS-1R0N
1.00±30% 0.040
2.70
0.70
2.8x3.0x1.5
TOKO
1127AS-2R2M
2.20±20% 0.048
2.50
1.54
3.5x3.7x1.8
Panasonic
ELLVGG1R0N
1.00±23% 0.062
2.20
0.70
3.2x3.2x1.5
COUT Selection
The internal voltage loop compensation in the SC284
limits the minimum output capacitor value to 22µF if
using a 2.2µH inductor or 44µF if using a 1µH inductor.
This is due to its influence on the the loop crossover
frequency, phase margin, and gain margin. Increasing
the output capacitor above this minimum value will
reduce the crossover frequency and provide greater
phase margin. The total output capacitance should not
exceed 50µF to avoid any start-up problems. For most
typical applications it is recommended to use an output
capacitance of 22µF to 44µF. When choosing the output
capacitor’s capacitance, verify the voltage derating effect
from the capacitor vendor’s data sheet.
Capacitors with X7R or X5R ceramic dielectric are
recommended for their low ESR and superior temperature
and voltage characteristics. Y5V capacitors should not
be used as their temperature coefficients make them
unsuitable for this application.
The output voltage droop due to a load transient is
determined by the capacitance of the ceramic output
capacitor. The ceramic capacitor supplies the load current
initially until the loop responds. Within a few switching
cycles the loop will respond and the inductor current will
increase to match the required load. The output voltage
droop during the period prior to the loop responding
can be related to the choice of output capacitor by the
relationship from the following equation.
u ',/2$'
&287
9'5223 u I26&
The output capacitor RMS ripple current may be calculated
from the following equation.
,&287506 § 9287 u 9,10$; 9287 ·
¸¸
¨
/ u I26& u 9,1
¨©
¹
Table 2 – Recommended Inductors
15
SC284
Applications Information (continued)
Table 3 lists the manufacturers of recommended output
capacitor options.
Manufacturer
Part Nunber
Value
(μF)
Type
Rated
Voltage
(VDC)
Value
at
3.3V
(μF)
Dimensions
LxWxH
(mm)
Murata
GRM21BR60J106K
10±10%
X5R
6.3
4.74
2.0x1.25x1.25
(EIA:0805)
Murata
GRM219R60J106K
10±10%
X5R
6.3
4.05
2.0x1.25x0.85
(EIA:0805)
Murata
GRM21BR60J226M
22±20%
X5R
6.3
6.57
2.0x1.25x1.25
(EIA:0805)
Murata
GRM31CR60J476M
47±20%
X5R
6.3
20.3
3.2x1.6x1.6
(EIA:1206)
The input voltage ripple and RMS current ripple are at
a maximum when the input voltage is twice the output
voltage or 50% duty cycle.
The input capacitor provides a low impedance loop for
the edges of pulsed current drawn by the PMOS switch.
Low ESR/ESL X5R ceramic capacitors are recommended
for this function. To minimise stray inductance ,the
capacitor should be placed as closely as possible to the
VIN and GND pins of the SC284.
Table 3 – Recommended Capacitors
CIN Selection
The SC284 source input current is a DC supply current
with a triangular ripple imposed on it. To prevent large
input voltage ripple, a low ESR ceramic capacitor is
required. A minimum value of 10μF should be used. It is
important to consider the DC voltage coefficient characteristics when determining the actual required value. It
should be noted a 10µF, 6.3V, X5R ceramic capacitor with
5V DC applied may exhibit a capacitance as low as 4.5µF.
To estimate the required input capacitor, determine the
acceptable input ripple voltage and calculate the
minimum value required for CIN as shown by the following
equation.
&,1
§
9 ·
¨¨ 287 ¸¸
9,1 ¹
©
§ '9
·
¨¨
(65 ¸¸ u I26&
© ,287
¹
9287
9,1
The input capacitor RMS ripple current varies with the
input and output voltage. The maximum input capacitor
RMS current is found from the next equation .
,&,1506 9287
9,1
§ 9287 ·
¨¨ ¸
9,1 ¸¹
©
16
SC284
Applications Information (continued)
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Figure 6 — Soft Start Operation
17
SC284
Applications Information (continued)
PCB Layout Considerations
The layout diagram in Figure 7 shows a recommended
top-layer PCB for the SC284 and supporting components.
Figure 8 shows the bottom layer for this PCB. Fundamental
layout rules must be followed since the layout is critical
for achieving the performance specified in the Electrical
Characteristics table. Poor layout can degrade the
performance of the DC-DC converter and can contribute
to EMI problems, ground bounce, and resistive voltage
losses. Poor regulation and instability can result.
The following guidelines are recommended when
developing a PCB layout:
. The input capacitor, CIN, should be placed as close to the
VIN and GND pins as possible. This capacitor provides
a low impedance loop for the pulsed currents present
at the buck converter’s input. Use short wide traces
to connect as closely to the IC as possible. This will
minimize EMI and input voltage ripple by localizing
the high frequency current pulses.
2. Keep the LX pin traces as short as possible to minimize
pickup of high frequency switching edges to other
parts of the circuit. COUT and L should be connected as
close as possible between the LX and GND pins, with
a direct return to the GND pin from COUT.
3. Route the output voltage feedback/sense path away
from the inductor and LX node to minimize noise and
magnetic interference.
4. Use a ground plane referenced to the SC284 GND pin.
Use several vias to connect to the component side
ground to further reduce noise and interference on
sensitive circuit nodes.
5. If possible, minimize the resistance from the output
and GND pin to the load. This will reduce the voltage
drop on the ground plane and improve the load
regulation. It will also improve the overall efficiency
by reducing the copper losses on the output and
ground planes.
Figure 7 — Recommended PCB Layout (Top Layer)
Figure 8 — Bottom Layer Detail
18
SC284
Outline Drawing – 3x3 MLPQ-UT20
Land Pattern – 3x3 MLPQ-UT20
19
SC284
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Contact Information
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Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
20