J500 Series - Linear Systems

J500 SERIES
CURRENT REGULATING
DIODES
FEATURES
REPLACES SILICONIX/VISHAY J500 SERIES
WIDE CURRENT RANGE
0.192 to 5.6mA
BIASING NOT REQUIRED
VGS = 0V
ABSOLUTE MAXIMUM RATINGS
A
A
K
K
1
@ 25 °C (unless otherwise stated)
Maximum Temperatures
Storage Temperature
-55 to 150°C
Junction Operating Temperature
-55 to 150°C
Maximum Power Dissipation
Continuous Power Dissipation @25°C
350mW
Maximum Currents
Forward Current
20mA
Reverse Current
50mA
Maximum Voltages
Peak Operating Voltage
POV = 50V
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL
CHARACTERISTIC
POV
Peak Operating Voltage
VR
Reverse Voltage
CF
Forward Capacitance
MIN
6
TYP
MAX
UNITS
50
CONDITIONS
V
IF = 1.1IF(max)
0.8
V
IR = 1mA
2.2
pF
VF = 25V, f = 1MHz
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
3
Forward Current
IF(mA)
Dynamic Impedance
Zd(MΩ)
PART
VF = 25V
VF = 25V
4
Knee
Impedance
Zk(MΩ)
VF = 6V
Limiting Voltage
VL(V)
5
IF = 0.8IF(min)
MIN
NOM
MAX
MIN
TYP
TYP
TYP
MAX
J500
0.192
0.24
0.288
4.00
15
2.50
0.4
1.2
J501
0.264
0.33
0.396
2.20
10
1.60
0.5
1.3
J502
0.344
0.43
0.516
1.50
7
1.10
0.6
1.5
J503
0.448
0.56
0.672
1.20
5
0.80
0.7
1.7
J504
0.600
0.75
0.900
0.80
3.5
0.55
0.8
1.9
J505
0.800
1.00
1.200
0.50
2.
0.40
0.9
2.1
J506
1.120
1.40
1.680
0.33
1.5
0.25
1.1
2.5
J507
1.440
1.80
2.160
0.20
1
0.19
1.3
2.8
J508
1.900
2.40
2.900
0.20
0.7
0.13
1.5
3.1
J509
2.400
3.00
3.600
0.15
0.5
0.09
1.7
3.5
J510
2.900
3.60
4.300
0.15
0.4
0.07
1.9
3.9
J511
3.800
4.70
5.600
0.12
0.3
0.05
2.1
4.2
Linear Integrated Systems
•
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 20112 07/02/13 Rev#A8 ECN# J500 Series
V-I CHARACTERISTICS CURRENT REGULTING DIODE
IF
Zk
rDS
IF
VL
VR
POV
VF
VR
IR
PACKAGING DETAILS
1.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
2.
Pulsed, t = 2ms. Steady state currents may vary.
3.
Pulsed, t = 2ms. Continuous currents may vary.
4.
Pulsed, t = 2ms. Continuous impedances may vary.
5.
Min VF required to ensure IF = 0.8IF(min).
6.
Max VF where IF = 1.1xF(max). is guaranteed. Pulsed test ≤2ms.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any
infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent
rights of Linear Integrated Systems.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing
high-quality discrete components. Expertise brought to LIS is based on processes and products developed
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.
Linear Integrated Systems
•
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 20112 07/02/13 Rev#A8 ECN# J500 Series