DPAD SERIES MONOLITHIC DUAL PICO AMPERE DIODES FEATURES Direct Replacement For SILICONIX DPAD SERIES HIGH ON ISOLATION 20fA EXCELLENT CAPACITANCE MATCHING ABSOLUTE MAXIMUM RATINGS ΔCR≤0.2pF DPAD DPAD1 TO-72 Top View TO-78 Top View Case & Substrate 1 @ 25°C (unless otherwise stated) Maximum Temperatures Storage Temperature -55ºC to +150°C Operating Junction Temperature -55ºC to +150°C SSTDPAD SOIC Maximum Power Dissipation Continuous Power Dissipation (DPAD) 3 500mW Maximum Currents Forward Current (DPAD) 50mA * Case and Pin 4 must be floating on all TO-78 case devices COMMON ELECTRICAL CHARACTERISTICS @ 25ºC (unless otherwise stated) SYMBOL CHARACTERISTIC BVR Reverse Breakdown Voltage VF MIN. TYP. MAX. UNITS DPAD1 -45 DPAD2,5,10,20,50,100 -45 SSTDPAD5,50,100 -30 Forward Voltage 1.5 DPAD1 0.2 ALL OTHERS 0.5 DPAD1 0.8 │CR1- CR2│ (ΔCR) Crss Total Reverse Capacitance DPAD2,5,10,20,50,100 IR= -1µA V 0.8 Differential Capacitance IF= 1mA VR1 = VR2 = -5V, f=1MHz pF VR = -5V, f=1MHz 2.0 SSTDPAD5,50,100 CONDITIONS 4.0 SPECIFIC ELECTRICAL CHARACTERISTICS @ 25ºC (unless otherwise stated) SYMBOL IR 2 CHARACTERISTIC Maximum Reverse 2 Leakage Current DPAD 2 SSTDPAD (SST)DPAD1 -1 (SST)DPAD2 -2 (SST)DPAD5 -5 (SST)DPAD10 -10 (SST)DPAD20 -20 (SST)DPAD50 -50 -50 (SST)DPAD100 -100 -100 Linear Integrated Systems UNITS CONDITIONS -5 pA VR = -20V • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201145 5/16/2013 Rev#A4 ECN# DPAD Series Figure 1. Operational Amplifier Protection Input Differential Voltage limited to 0.8V (typ) by DPADs D1 and D2. Common Mode Input voltage limited by DPADs D3 and D4 to ±15V. Figure 2. Sample and Hold Circuit Typical Sample and Hold circuit with clipping. DPAD diodes reduce offset voltages fed capacitively from the JFET switch gate. FIGURE 1 FIGURE 2 DIMENSIONS IN INCHES All dimensions in inches 1. Absolute maximum ratings are limiting values above which serviceability may be impaired. 2. The DPAD type number denotes its maximum reverse current value in pico amperes. Devices with I R values intermediate to those shown are available upon request. 3. Derate 4 mW/ºC above 25ºC Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Revised 29 OCT 2006. Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201145 5/16/2013 Rev#A4 ECN# DPAD Series