J/SST201 SERIES HIGH GAIN N-CHANNEL JFET AMPLIFIER FEATURES DIRECT REPLACEMENT FOR SILICONIX J/SST201 SERIES VGS(off) ≤ 1.5V LOW CUTOFF VOLTAGE HIGH GAIN AV = 80 V/V ABSOLUTE MAXIMUM RATINGS1 SST SERIES SOT-23 TOP VIEW SOT-23 TOP VIEW J SERIES TO-92 TOP VIEW @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature -55 to +150 °C Operating Junction Temperature -55 to +150 °C D Maximum Power Dissipation 1 3 350mW Continuous Power Dissipation TA=25°C S G 2 Maximum Current Forward Gate Current 50mA Maximum Voltages Gate to Drain Voltage -40V Gate to Source Voltage -40V ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL CHARACTERISTIC BVGSS Gate to Source Breakdown Voltage VGS(off) Gate to Source Cutoff Voltage IDSS IGSS IG ID(off) MIN TYP J/SST201, 202 -40 J/SST204 -25 J/SST201 -0.3 -1.5 J/SST202 -0.8 -4 J/SST204 -0.2 2 J/SST201 0.2 1 J/SST202 0.9 4.5 J/SST204 0.2 3 Drain to Source Saturation Current2 UNITS Gate Reverse Current V VDS = 15V, ID = 10nA mA -100 Gate Operating Current -2 Drain Cutoff Current 2 J/SST201, 204 0.5 J/SST202 1 Forward Transconductance Ciss Input Capacitance 4.5 Crss Reverse Transfer Capacitance 1.3 Noise Voltage Linear Integrated Systems 6 • CONDITIONS IG = -1µA, VDS = 0V gfs en MAX VDS = 15V, VGS = 0V VGS = -20V, VDS = 0V pA VDG = 10V, ID = 0.1mA VDS = 15V, VGS = -5V mS VDS = 15V, VGS = 0V, f = 1kHz pF VDS = 15V, VGS = 0V, f = 1MHz nV/√Hz VDS = 10V, VGS = 0V, f = 1kHz 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201112 05/15/2014 Rev#A8 ECN# J SST 201 SOT-23 0.89 1.03 0.37 0.51 1 1.78 2.05 2.80 3.04 3 2 1.20 1.40 2.10 2.64 0.89 1.12 0.085 0.180 0.013 0.100 0.55 DIMENSIONS IN MILLIMETERS NOTES 1. Absolute maximum ratings are limiting values above which serviceability may be impaired. 2. Pulse Test: PW ≤ 300µs, Duty Cycle ≤ 3% 3. All characteristics MIN/TYP/MAX numbers are absolute values. Negative values indicate electrical polarity only. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201112 05/15/2014 Rev#A8 ECN# J SST 201