SST/U401 – SST/U406 LOW NOISE LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET AMPLIFIER FEATURES LOW DRIFT │VGS1-2/T│= 10µV/ºC TYP. LOW NOISE en=6nV/Hz@10Hz TYP. LOW PINCHOFF VP=2.5V MAX. ABSOLUTE MAXIMUM RATINGS NOTE 1 @ 25 °C (unless otherwise noted) Maximum Temperatures Storage Temperature -55 to +150°C Operating Junction Temperature -55 to +150°C Maximum Voltage and Current for Each Transistor NOTE 1 SOIC Top View TO-71 Top View -VGSS Gate Voltage to Drain or Source 50V -VDSO Drain to Source Voltage 50V -IG(f) Gate Forward Current 10mA Maximum Power Dissipation per side NOTE 2 Device Dissipation TA = 25°C 300mW MATCHING CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTIC U401 U402 U403 U404 U405 │VGS1-2/T│max. Drift vs. Temperature 10 10 25 25 40 U406 UNITS 80 µV/ºC CONDITIONS VDG = 10V, ID = 200µA TA = -55ºC to +125ºC │VGS1-2│max. Offset Voltage 5 10 10 15 20 40 mV VDG = 10V, ID = 200µA ELECTRICAL CHARACTERISTICS TA = 25ºC (unless otherwise noted) NOTE 3 SYMBOL CHARACTERISTIC MIN. TYP. MAX. UNITS CONDITIONS BVGSS Breakdown Voltage -50 -60 -- V VDS= 0 ID= 1nA BVG1G2 Gate-to-Gate Breakdown ±50 -- -- V IG= ±1µA ID= 0, IS = 0 f = 1kHz TRANSCONDUCTANCE Gfss Full Conduction 2000 -- 7000 µS VDG= 10V VGS= 0 Gfs Typical Operation 1000 -- 2000 µS VDG= 15V ID= 200µA f = 1kHz │Gfs1/Gfs2│ Mismatch 0.97 -- 1.0 IDSS Saturation Drain Current 0.5 -- 10 IDSS1 IDSS2 Saturation Current Ratio 0.9 0.98 1.0 VDG= 10V VGS= 0 mA GATE VOLTAGE VGS(off) or VP Pinchoff Voltage -0.5 -- -2.5 V VDS= 15V ID= 1nA VGS Operating Range -- -- -2.3 V VDS= 15V ID= 200µA ID= 200µA GATE CURRENT IG Operating -- -4 -15 pA VDG= 15V IG High Temperature -- -- -10 nA TA=+125ºC IGSS Gate Reverse Current -- -- -100 pA VGS=-30v, VDS= 0V IG1G2 Gate to Gate Isolation Current -- -- ±1.0 µA VG1-VG2= ±50V, ID= IS= 0 Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201123 03/18/2015 Rev#A8 ECN# SST/U401 SST/U406 SYMBOL CHARACTERISTIC MIN. TYP. MAX. UNITS CONDITIONS OUTPUT CONDUCTANCE GOSS Full Conduction -- -- 40 µS VDS= 10V, VGS= 0V, f = 1kHz GOS Operating -- 2 2.7 µS VDS= 15V, ID= 200µA, f = 1kHz 95 -- -- dB V DG2= 20V ID1= ID2=200µA -- -- 0.5 dB VDS= 15V VGS= 0 f= 100Hz NBW= 6Hz VDS= 15V ID= 200µA f= 10Hz COMMON MODE REJECTION CMRR -20 log [(VGS1-VGS2)/ΔVDG1-2] V DG1= 10V NOISE NF en Figure Voltage -- 6 20 nV/Hz RG=10M NBW= 1Hz CAPACITANCE CISS Input -- 4 8 pF CRSS Reverse Transfer -- 1.5 3 pF VDS= 15V TO-78 TO-71 ID= 200µA f= 1MHz P-DIP 0.210 0.170 SOIC 4 4 8 8 Note: All Dimensions in inches NOTES: 1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired. 2. Derate 2.4mW/ºC when TA is greater than 25ºC 3. All MIN/TYP/MAX limits are absolute numbers. Negative signs indicate electrical polarity only. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201123 03/18/2015 Rev#A8 ECN# SST/U401 SST/U406