MKG 40RK600LB

MKG 40RK600LB
Buck / Boost Tpology
ID25
= 54A
VDSS
=600V
RDS(on) max= 41mW
CoolMOS™ 1) with fast SONIC Diode
ISOPLUS™ - electrically isolated surface to heatsink
Surface Mount Power Device
Part number
MKG40RK600LB
D
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2x S
D
C6 MOSFET
•Fast CoolMOS
-very low on-resistance
- low gate charge
- avalanche rated for unclamped
inductive switching (UIS)
Applications:
•Buck / boost chopper
•PFC stage
• Forward converter
Package: SMPD
•isolated surface to heatsink
•low coupling capacity between pins and heatsink
•PCB space saving
•enlarged creepage towards heatsink
•application friendly pinout
•low inductive current path
•high reliability
1)
CoolMOS™ is a trademark of
Infineon Technologies AG.
t
e
n
t
™ 1)
a
Features / Advantages:
IXYS reserves the right to change limits, test conditions and dimensions.
© 2013 IXYS All rights reserved
Data according ot IEC 60747 and per semiconductor unless otherwise specified
20131121
1-4
MKG 40RK600LB
MOSFET T
Ratings
Symbol
Definitions
VDSS
drain source breakdown voltage
Conditions
min.
up to TVJ = 150°C
600
V
VGS
gate source voltage
continuous
transient
TVJ = 25°C
±20
±30
V
V
ID25
ID80
ID100
drain current
TC = 25°C
TC = 80°C
TC = 100°C
54
41
34
A
A
A
EAS
IA
non-repetetive avalanche energy
single pulse
TVJ = 25°C
1.95
13.4
J
A
dV /dt
rate of rise of voltage
IS > IDM; VDD < 400 V
TVJ = 25°C
15
V/ns
RDSon
static drain source on resistance
ID = 44 A; VGS = 10 V (Chip)
TVJ = 25°C
37
41
mΩ
VGS(th)
gate threshold voltage
ID = 3 mA; VDS = VGS
TVJ = 25°C
3
3.5
V
IDSS
drain source leakage current
VDS = VDSS; VGS = 0 V
TVJ = 25°C
TVJ = 150°C
5
50
µA
µA
±100
nA
6.5
360
gate source leakage current
VDS = 0 V; VGS = ±20 V
input capacitance
output capacitance
VGS = 0 V; VDS = 100 V; f = 1 MHz
TVJ = 25°C
TVJ = 125°C
Qg
Qgs
Qgd
total gate charge
gate source charge
gate drain (Miller) charge
VDS = 480 V; ID = 44 A
VGS = 10 V; RG = 1.6 Ω
TVJ = 25°C
td(on)
tr
td(off)
tf
Eon
Eoff
Erec(off)
turn-on delay time
current rise time
turn-off delay time
current fall time
turn-on energy per pulse
turn-off energy per pulse
reverse recovery losses at turn-off
RthJC
RthJH
thermal resistance junction to case
thermal resistance junction to heatsink
iv
Inductive switching
boost mode with diode D
VDS = 380 V; ID = 44 A
VGS = 13 V; RG = 1.6 Ω
Definitions
IS25
IS80
continuous source current
VSD
forward voltage drop
trr
QRM
IRM
reverse recovery time
reverse recovery charge (intrinsic diode)
max. reverse recovery current
max. repetitive reverse voltage
IF = 44 A; VGS = 0 V
TVJ = 25°C
typ.
0.9
TVJ = 25°C
Conditions
min.
TVJ = 25°C
DC
DC
TC =
TC =
typ.
TVJ = 25°C
TVJ = 125°C
IR
reverse current
VR = VRRM
TVJ = 25°C
TVJ = 125°C
max. reverse recovery current
IF = 30 A; VR = 350 V
-di/dt = 240 A/µs
TVJ = 100°C
tbd
trr
reverse recovery time
IF = 1 A; VR = 30 V; -di/dt = 100 A/µs TVJ = 100°C
tbd
RthJC
RthJH
thermal resistance junction to case
thermal resistance junction to heatsink
n
IF = 44 A (Chip)
e
A
A
1.1
V
950
ns
µC
A
Ratings
forward voltage
t
K/W
K/W
max.
32
62
VF
© 2013 IXYS All rights reserved
ns
ns
ns
ns
mJ
mJ
mJ
70
tbd
25°C
80°C
continuous source current
IXYS reserves the right to change limits, test conditions and dimensions.
nC
nC
nC
Ratings
min.
IF25
IF80
IRM
190
0.4
TC =
TC =
a
t
Definitions
VRRM
nF
pF
0.6
IF = 44 A; VR = 400 V
-diF /dt = 100 A/µs
max.
tbd
tbd
tbd
tbd
tbd
tbd
tbd
TVJ = 25°C
Conditions
t
Symbol
Symbol
290
36
150
with heatsink compound; IXYS test setup
Source-Drain Diode of MOSFET T
Diode D
2.5
e
IGSS
Ciss
Coss
typ.
25°C
80°C
1.70
1.65
max.
600
V
65
45
A
A
2.0
V
V
100
8
µA
mA
A
ns
0.6
with heatsink compound; IXYS test setup
Data according ot IEC 60747 and per semiconductor unless otherwise specified
0.85
K/W
K/W
20131121
2-4
MKG 40RK600LB
Package SMPD
Ratings
Symbol
Definitions
Conditions
Tstg
TVJ
storage temperature
virtual junction temperature
min.
typ.
-55
-55
max.
125
150
Weight
8
FC
mounting force with clip
d Spp/App
d Spb/Apb
creepage distance on surface /
striking distance through air
terminal to terminal
terminal to backside
VISOL
isolation voltage
t = 1 second
t = 1 minute
CP
coupling capacity
between shorted terminals and backside metal
40
°C
°C
g
130
N
1.65
mm
4.0
mm
50/60 Hz; RMS; IISOL < 1 mA
CTI
3000
2500
V
V
90
pF
1
mΩ
400
Rpin-chip
V = (RDSon + 2·R)·ID resp. V = VF + 2·R·IF
resistance pin to chip
UL Logo
~
~
~
Part number
Backside DCB
Assembly line
M = MOSFET
K = CoolMOS™ 1)
G = C6
40 = Current Rating [A]
RK = Boost/Brake Chopper
600 = Reverse Voltage [V]
LB = SMPD-B
e
Part number
Date code
XXXXXXXXXX
yywwA
Part #
Date Code
Assembly line
Lot #
Split Lot
Individual #
Pin 1 identifier
t
Digits
1 to 19:
20 to 23:
24 to 25:
26 to 31:
32:
33 to 36:
iv
Data Matrix Code
Marking on Product
MKG40RK600LB-TRR
MKG40RK600LB
Delivering Mode Base Qty Ordering Code
Tape&Reel
200
514630
n
t
Standard
Part Name
a
Ordering
Equivalent Circuits for Simulation
V0
R0
e
I
*on die level
threshold voltage
R0 max
slope resistance *
V
mW
t
V0 max
IXYS reserves the right to change limits, test conditions and dimensions.
© 2013 IXYS All rights reserved
Data according ot IEC 60747 and per semiconductor unless otherwise specified
20131121
3-4
MKG 40RK600LB
Outlines SMPD
Dimensions in mm
(1 mm = 0.0394“)
A(8:1)
5,5 0,1
2)
(6x) 1 0,05
0 + 0,15
2°
 0,1
18 0,1
seating plane
(3x) 2 0,05
9 0,1
8
4 0,05
0,55 0,1
9
iv
32,7 0,5
23 0,2
e
7
2)
4,85 0,2
0,5 0,1
1)
2 0,2
25 0,2
3)
 0,05
3 2 1
A
t
6 5 4
Pin number
5,5 0,1
13,5 0,1
Notes:
1) potrusion may add 0.2 mm max. on each side
2) additional max. 0.05 mm per side by punching misalignement
or overlap of dam bar or bending compression
3) DCB area 10 to 50 µm convex;
position of DCB area in relation to plastic rim: ±25 µm
(measured 2 mm from Cu rim)
4) terminal plating: 0.2 - 1 µm Ni + 10 - 25 µm Sn (galv.)
cutting edges may be partially free of plating
a
2,75 0,1
t
16,25 0,1
T
D
6
IXYS reserves the right to change limits, test conditions and dimensions.
© 2013 IXYS All rights reserved
9
7, 8
t
e
n
19 0,1
4, 5
1, 2, 3
Data according ot IEC 60747 and per semiconductor unless otherwise specified
20131121
4-4