IX2R11 IX2R11 500 Volt, 2 Ampere High & Low-side Driver for N-Channel MOSFETs and IGBTs Features General Description • Floating High Side Driver with boot-strap power supply along with a Low Side Driver. • Fully operational to 500V • ± 50V/ns dV/dt immunity • Gate drive power supply range: 10 - 35V • Undervoltage lockout for both output drivers • Separate logic power supply range: 3.3V to VCL • Built using the advantages and compatibility of CMOS and IXYS HDMOSTM processes • Latch-Up protected over entire operating range • Matched propagation delay for both outputs • High peak output current: 2A • Low output impedance • Low power supply current • Immune to negative voltage transients The IX2R11 High Side and Low Side Driver is for driving Nchannel MOSFETs and IGBTs with high side and low side outputs, whose input signals reference the low side. The High Side driver can control a MOSFET or IGBT connected to a positive bus voltage up to 500V. The logic input stages are compatible with TTL or CMOS, have built-in hysteresis and are fully immune to latch up over the entire operating range. The IX2R11 can withstand dV/dt on the output side up to ± 50V/ns. The IX2R11 comes in either the 16-PIN SOIC package (IX2R11S3) or the 14-PIN DIP through-hole package (IX2R11P7). Ordering Information Applications • • • • • • Driving MOSFETs and IGBTs in half-bridge circuits High voltage, high side and low side drivers Motor Controls Switch Mode Power Supplies (SMPS) DC to DC Converters Class D Switching Amplifiers Part Number Package Type IX2R11P7 IX2R11S3 14-PIN DIP 16-PIN SOIC Warning: The IX2R11 is ESD sensitive. Precaution: When performing the High-Voltage tests, adequate safety precautions should be taken. * Operational voltage rating of 500V determined in a typical half-bridge circuit configuration (refer to Figure 10 and Figure 11). Operational voltage in other circuit configurations may vary Figure 1. Typical Circuit Connection IX2R11S3 Up to 500V © 2007 IXYS CORPORATION All rights reserved DS99165C(10/07) 1 First Release IX2R11 Figure 2 - IX2R11 Functional Block Diagram Pin Description And Configuration SYMBOL V DD FUNCTION Logic Supply DESCRIPTION Positive power supply for the chip CMOS functions HIN HS Input High side Input signal, TTL or CMOS compatible; HGO in phase LIN LS Input Low side Input signal, TTL or CMOS compatible; LGO in phase ENB Enable Chip enable, active low. When driven high, both outputs go low. DG VCH HGO Ground Supply Voltage Output Logic reference ground High side power supply, referenced to HS High side driver output HS Return High side voltage return VCL Supply Voltage Low side power supply, referenced to LS LGO Output Low side driver output LS Ground Low side return 16-PIN SOIC N/C HGO 7 9 VDD VCH 6 10 HIN HS 5 11 ENB N/C 4 12 LIN VCL 3 13 DG LS 2 14 NC LGO 1 IX2R11P7 8 IXYS reserves the right to change limits, test conditions, and dimensions. IX2R11S3 14-PIN DIP 2 IX2R11 Absolute Maximum Ratings* Symbol VCH Definition High side floating supply voltage Min -0.3 Max + 35 Units V VHS High side floating supply offset voltage -200 +500 V VHGO High side floating output voltage VHS - 0.3 VCH + 0.3 V VCL Low side fixed supply voltage -0.3 +35 V VLGO Low side output voltage -0.3 VCL + 0.3 V VDD Logic supply voltage -0.3 VCL+ 0.3 V VDG Logic supply offset voltage VLS - 1 VLS + 1 V VIN Logic input voltage(HIN, LIN, ENB) VLS - 0.3 VCL + 0.3 V dVHS/dt Allowable offset supply voltage transient --- 50 PD Package power dissipation@ TAMBIENT ≤ 25oC --- 1.25 W PD Package power dissipation@ TCASE ≤ 25 C --- 2.5 W RTHJA Thermal resistance, junction-to-ambient --- 100 o RTHJC Thermal resistance, junction-to-case --- 50 TJ Junction Temperature --- 150 o C TS Storage temperature -55 150 o C --- 300 o C Min Max VHS+10 VHS+20 V TL o Lead temperature (soldering, 10 secs.) V/ns C/W o C/W Recommended Operating Conditions Symbol Definition Units VCH High side floating supply absolute voltage VHS High side floating supply offset voltage -250 +500 V VHGO High side floating output voltage VHS VHS+VCH V VCL Low side fixed supply voltage 10 20 V VLGO Low side output voltage 0 VCL V VDD Logic supply voltage VDG+3 VDG+VCL V VDG Logic supply offset voltage VLS-0.3 VLS+0.3 V VIN Logic input voltage(HIN, LIN, ENB) VDG VDD V TA Ambient Temperature -40 125 o C *Note: Operating the device beyond parameters with listed “absolute maximum ratings” may cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. © 2007 IXYS CORPORATION All rights reserved 3 IX2R11 Dynamic Electrical Characteristics* Symbol Definition Test Conditions Min Typ Max Units t on Turn-on propagation delay Cload = 1nF VDD, VCL,VCH=15V --- 140 170 ns t off Turn-off propagation delay Cload= 1nF VDD, VCL,VCH=15V --- 100 120 ns t enb Enable delay, active low VDD=15V VCL,VCH=18V --- 90 110 ns tr Turn-on rise time Cload= 1nF VCH, VCL=15V --- 8 11 ns tf Turn-off fall time Cload= 1nF VCH, VCL=15V --- 7 10 ns t dm Delay matching, HS & LS turn-on/off --- 30 40 ns Static Electrical Characteristics Symbol Definition Test Conditions Min Typ Max V INH Logic “1” input voltage V DD,V CL,V CH=15V 9.5 9.8 --- V V INL Logic “0” input voltage V DD,V CL,V CH=15V --- 5.8 6 V IO= 20mA --- 0.3 1 V IO= 20mA --- 0.04 0.1 V VHLGO // VHHGO High level output voltage, Units VCH-VHGO or VCL-VLGO VLLGO // VLHGO Low level output voltage, VHGO or VLGO IHL HS to LS bias (leakage) current. VHS Offset = 600V --- 100 150 uA IQHS Quiescent VCH supply current VIN= 0V, VCH =15V --- 700 1000 uA IQLS Quiescent VCL supply current VIN= 0V, VCL=15V --- 160 300 uA I QDD Quiescent VDD supply current VIN= 0V, VDD=15V --- 0.2 5 uA IIN+ Logic “1” input bias current VIN= VDD = 15V --- 11 25 uA IIN- Logic “0” input bias current VIN= 0V --- --- 1 uA V CHUV + VCH supply under-voltage positive going threshold. 7 8.1 9 V V CHUV - VCH supply under-voltage negative going threshold. 7 8 9 V V CLUV + VCL supply under-voltage positive going threshold 9 9.9 11 V V CLUV - VCL supply under-voltage negative going threshold. 8.2 9.2 10.5 V IGO+ HS or LS output high short circuit sourcing current; VGO= 15V, PW<10us 2 2.5 --- A IGO- HS or LS output low short circuit sinking current; VGO= 0V, PW<10us --- -2.5 -2 A * These characteristics are guaranteed by design only. Tested on a sample basis. IXYS reserves the right to change limits, test conditions, and dimensions. 4 IX2R11 Timing Waveform Definitions ENB HIN/LIN 50% ENB tenb 10% LGO/HGO LGO/HGO Figure 3. INPUT/OUTPUT Timing Diagram 50% Figure 4. ENABLE Waveform Definitions 50% 50% 50% HIN LIN HIN/LIN Input Signal tdon tr tf tdoff 90% 90% 90% tdm HGO 10% 10% 10% HGO/LGO LGO LGO HGO tdm Outgoing Signal Figure 5. Definitions of Switching Time Waveforms Figure 6. Definitions of Delay Matching Waveforms VCL=15V 0.1 uF 9 3 0.1 6 5 HIN ENB LIN 7 10 11 uF 10 uF CL HGO VCH + VHS 10 uF (0 to 650V) IX2R11 12 13 2 1 LGO 500V 400V ~ 0 CL Sa mp le Te ste d ~ 10 uF V++ Buss (V HS ) 650V for Op era ti 200kHz ~ on 500kHz 1MHz fPWM Figure 7. Switching Time Test Circuit © 2007 IXYS CORPORATION All rights reserved Figure 8. Device operating range: Buss voltage vs. Frequency Tested in typical circuit configuration (refer to Figures 10 & 11) 5 IX2R11 + C2 10uF U1 IX2R11 VCH HGO HS VDD HIN ENB LIN DG LS U2 Vin 18V V1 78L15 LS VCL LGO LS L1 200uH C6 0.1uF + C3 10uF OUTPUT MONITOR HV SCOPE PROBE D1 + C1 100uF/250V dVs/dt > 50V/ns GND1 3 2 HV 600V GND1 BATTERY HGO HS GND2 GND2 15V Vout GND 1 C5 0.1uF DSEI 12-10A HS 15V V3 C8 PULSE BNC C9 10uF 0.1uF 2 3 GND2 VCC 16 U3 HCPL-314J ½ 14 VEE U2 2 OUT 15 Measure dV/dt (HV Scope Probe) Q1 D2 DSEI12-10A 1,8 6,7 IXDD414 4,5 10K GND3 IXFP4N100Q -600V GND3 Figure 9. Test circuit for allowable offset supply voltage transient. 1 VCH 11 1uF/35V MLCC 12 VOUTVOUT+ GND 3 NDY1215C 10uF/35V 10 Up to 400V VIN+ 1 2 1k VOUT- 15 VOUT+ 14 30 5.1 11 1uF/35V MLCC 12 10uF/35V 13 1k 14 1k 15 1k 16 17 18 IX2R11S3 VDD HIN ENB LIN HS NC VDD HIN ENB LIN DG LS HGO VCH HS NC NC VCL LS LGO IXCP 10M90S 1N5817 15 8 IXTH14N60P 7 6 18uH 0.1uF/1kV 5 4 5.1 3 0.47uF 0.47uF 1N5817 IXTH14N60P 2 15 1 10uF/35V 1uF/35V MLCC Figure 10. Test circuit for high frequency, 750kHz, operation. VDD, VCH, VCL = 15V IXYS reserves the right to change limits, test conditions, and dimensions. 6 20/5W 20/5W VCL IX2R11 1 VCH 11 1uF/35V MLCC 12 VOUTVOUT+ GND 3 NDY1215C 10uF/35V 10 Up to 500V VIN+ 1 VOUT- 15 14 VOUT+ 2 1k 30 5.1 11 1uF/35V MLCC 12 10uF/35V 13 1k 14 1k 15 1k 16 17 18 IX2R11S3 VDD HIN ENB LIN HS NC VDD HIN ENB LIN DG LS HGO VCH HS NC NC VCL LS LGO 1N5817 51 8 IXTH14N60P 7 6 0.1uF/1kV 5 4 5.1 3 1N5817 2 IXTH14N60P 51 1 VCL 10uF/35V 1uF/35V MLCC Figure 11. Test circuit for low frequency, 75kHz, operation. VDD, VCH, VCL = 15V © 2007 IXYS CORPORATION All rights reserved IXCP 10M90S 7 IX2R11 Figure 13 Rise Times vs. VCL, VCH Supply Voltage CLOAD = 1000pF VDD = 5V 10 8.5 9.5 8 9 7.5 High Side 8.5 Fall Times (ns) Rise Times (ns) Figure 12 8 7.5 7 Low Side 6.5 High Side 7 6.5 6 Low Side 5.5 6 5 5.5 4.5 5 Fall Times vs. VCL, VCH Supply Voltage CLOAD = 1000pF VDD = 5V 4 5 10 15 20 25 30 35 5 10 VCL / VCH Supply Voltage (V) Figure 14 20 25 30 35 Figure 15 Fall Times vs. Temperature CLOAD = 1000pF VDD, VCL, VCH = 15V Rise Times vs. Temperature C LOAD = 1000pF VDD, V CL, V CH = 15V 14 12 12 10 High side 10 Fall Times (ns) Rise Times (ns) 15 VCL / VCH Supply Voltage (V) High side 8 Low side 6 4 8 Low side 6 4 2 2 0 -100 -50 0 50 100 0 -100 150 -50 0 50 100 150 Temperature (C) Temperature (C) Figure 16 Figure 17 Input Threshold Level vs. Temperature VDD,VCL,VCH = 15V Input T hreshold vs. V D D S upply V oltage 18 12 Input Threshold Level (V) Threshold Level (V) 16 14 12 P ositive going 10 8 6 N egative going 4 2 0 10 Rising input level 8 6 Falling input level 4 2 0 0 5 10 15 20 25 30 -60 V D D S upply V oltage (V ) IXYS reserves the right to change limits, test conditions, and dimensions. -10 40 Temperature (C) 8 90 140 IX2R11 Figure 19 Turn Off Propagation Delay vs. VCL, VCH Voltage VDD = 5V Figure 18 Turn On Propagation Delay vs. VCL, VCH Voltage VDD = 5V 180 140 Low Side 140 120 High Side 100 120 Propagation Time (ns) Propagation Time (ns) 160 80 60 40 High Side 100 80 Low Side 60 40 20 20 0 0 5 10 15 20 25 30 35 5 10 VCL / VCH Supply Voltage (V) 25 30 35 Turn Off Propagation Delay vs. VDD Supply Voltage Turn On Propagation Delay vs. VDD Supply Voltage 130 Propagation Delay Time (ns) 170 160 150 140 VCL=25V VCL=18V 130 VCL=12V 120 VCH=12V 110 VCH=18V VCH=25V 100 120 110 VCH=12V 100 VCH=18V 90 VCH=25V 80 VCL=12V 70 VCL=18V 60 VCL=25V 50 40 0 5 10 15 20 25 0 5 VDD Logic Supply (V) 15 20 25 Figure 23 Turn Off Propagation Delay vs. Temperature VDD, VCL, VCH = 15V Turn On Propagation Delay vs. Temperature VDD, VCL, VCH = 15V 120 140 Propagation Delay Time (ns) Low side 120 100 High Side 80 60 40 20 0 -100 10 VDD Supply Voltage (V) Figure 22 Propagation Delay Time (ns) 20 Figure 21 Figure 20 Propagation Delay Time (ns) 15 VCL / VCH Supply Voltage (V) -50 0 50 100 80 60 Low side 40 20 0 -100 150 Temperature (C) © 2007 IXYS CORPORATION All rights reserved High side 100 -50 0 50 Temperature (C) 9 100 150 IX2R11 Figure 24 Figure 25 Enable Threshold vs. VDD Logic Supply Voltage Active Low Enable ENABLE Shut Off Delay vs. VDD Supply Voltage 130 18 Low Side 120 Shut Down Delay (ns) ENABLE Threshold (V) 16 14 Postive Going Outputs Disabled 12 10 8 6 Negative Going Outputs Enabled 4 110 VCL = 10V 100 VCL = 18V High Side VCL = 25V VCL = 35V 90 VCH = 10V 80 70 VCH = 18V 2 VCH = 25,35V 60 0 5 10 15 20 0 25 5 10 VDD Supply Voltage (V) Figure 26 25 Quiescent Supply Currents vs. Supply Voltages VINL, VINH = 0V 1 140 0.9 120 Supply Current (mA, uA) ENABLE Shutdown Delay (ns) 20 Figure 27 ENABLE Shutdown Delay vs. Temperature VDD, VCL, VCH = 15V High side 100 80 60 Low side 40 20 0.8 ICH (mA) 0.7 0.6 0.5 0.4 0.3 IDD (uA) 0.2 ICL (mA) 0.1 0 0 -60 -40 -20 0 20 40 60 80 100 120 140 0 Temperature (C) 18 Input Bias Current (uA) 0.8 0.7 VCH (mA) 0.6 0.5 0.4 0.3 0 -100 15 20 25 30 35 40 LIN, HIN Input Bias Current vs. VDD Supply Voltage 20 VCL (mA) 0.1 10 Figure 29 0.9 0.2 5 VCL, VCH, VDD Supply Voltage (V) Figure 28 Quiescent Supply Current vs. Temperature VDD,VCL,VCH = 15V VINL, VINH = 0V Quiescent Supply Current 15 VDD Supply Voltage (V) VDD (uA) 16 14 12 10 8 6 4 2 0 -50 0 50 100 150 Temperature (C) IXYS reserves the right to change limits, test conditions, and dimensions. 10 0 5 10 15 VDD Voltage (V) 20 25 IX2R11 Figure 30 Figure 31 High Level Ouput Voltage vs. Supply Voltage VHLGO / VHHGO = VCL - VLGO / VCH - VHGO IOUT = 20mA Low Level Output Voltage vs. Supply Voltage VLLGO / VLHGO = VLGO / VHGO IO = 20mA 0.45 0.06 0.4 Low Level Output (V) High Level Ouput (V) 0.05 0.35 0.3 0.25 0.2 0.15 0.1 0.04 0.03 0.02 0.01 0.05 0 0 5 10 15 20 25 30 35 5 10 15 Figure 32 30 35 Under Voltage Lock Out vs. Temperature Positive Going Trip Point 12 Under Voltage Trip Point (V) 12 Under Voltage Trip Point (V) 25 Figure 33 Under Voltage Lock Out vs. Temperature Negative Going Trip Point 10 VCL 8 VCH 6 4 2 0 -100 -50 0 50 100 VCL 10 8 VCH 6 4 2 0 -100 150 -50 0 50 100 150 Temperature (C) Temperature (C) Figure 34 Figure 35 Output Sink Current vs. Supply Voltage Output Source Current vs. Supply Voltage 6 0 5 -1 Ouput Sink Current (A) Ouput Source Current (A) 20 VCL, VCH (V) VCL, VCH (V) 4 3 2 1 -2 -3 -4 -5 0 -6 0 5 10 15 20 25 30 35 40 0 VCL, VCH Supply Voltage (V) © 2007 IXYS CORPORATION All rights reserved 5 10 15 20 25 30 V CL, VCH Supply Voltage (V)\ 11 35 40 IX2R11 Figure 36 Figure 37 Offset Leakage Current vs. High Side Offset Voltage 106 Offset Leakage Current (uA) 120 Leakage Current (uA) 100 80 60 40 20 0 0 100 200 300 400 500 600 Offset Leakage Current vs. Temperature High Side Offset Voltage = 600V 104 102 100 98 96 94 92 90 -100 700 -50 Figure 38 100 150 Output Sinking Current vs. Temperture V DD , V CL, V CH = 15V 2.5 Output Sink Current (A) 3 Source Output Current (A) 50 Figure 39 Output Sourcing Current vs. Temperature VDD, VCL, VCH = 15V 2.5 2 1.5 1 0.5 0 -100 0 Temperature (C) High Side Offset Voltage (V) -50 0 50 100 150 Temperature (C) IXYS reserves the right to change limits, test conditions, and dimensions. 12 2 1.5 1 0.5 0 -100 -50 0 50 Temperature (C) 100 150 IX2R11 IX2R11S3 Package Outline IX2R11P7 Package Outline IXYS Corporation 3540 Bassett St; Santa Clara, CA 95054 Tel: 408-982-0700; Fax: 408-496-0670 e-mail: [email protected] www.ixys.com © 2007 IXYS CORPORATION All rights reserved IXYS Semiconductor GmbH Edisonstrasse15 ; D-68623; Lampertheim Tel: +49-6206-503-0; Fax: +49-6206-503627 e-mail: [email protected] 13