IXA611 Preliminary Data Sheet 600mA Half-Bridge Driver Features • Floating High Side Driver with boot-strap Power supply along with a Low Side Driver. • Fully operational to 650V • ± 50V/ns dV/dt immunity • Gate drive power supply range: 10 - 35V • Undervoltage lockout for both output drivers • Separate Logic power supply range: 3.3V to VCL • Built using the advantages and compatibility of CMOS and IXYS HDMOSTM processes • Latch-Up protected over entire operating range • High peak output current: 600 mA • Matched propagation delay for both outputs • Low output impedance • Low power supply current • Immune to negative voltage transients General Description The IXA611 is a Bridge Driver for N-channel MOSFETs and IGBTs with a high side and low side output, whose input signals reference the low side. The High Side driver can control a MOSFET or IGBT connected to a positive buss voltage up to 650V. The logic input stages are compatible with TTL or CMOS, have built-in hysteresis and are fully immune to latch up over the entire operating range. The IXA611 can withstand dV/dt on the output side up to ± 50V/ns. The IXA611 comes in either the 16-PIN SOIC package (IXA611S3) or the 14-PIN DIP through-hole package (IXA611P7) Applications • • • • • • Warning: The IXA611 is ESD sensitive. Driving MOSFETs and IGBTs in half-bridge circuits High voltage, high side and low side drivers Motor Controls Switch Mode Power Supplies (SMPS) DC to DC Converters Class D Switching Amplifiers IXA611S3 Figure 1. Typical Circuit Connection Copyright © IXYS CORPORATION 2004 DS99166(04/04) First Release IXA611 Figure 2 - IXA611 Functional Block Diagram Pin Description And Configuration Output Ground DESCRIPTION Positive power supply for the chip CMOS functions High side Input signal, TTL or CMOS compatible; HGO in phase Low side Input signal, TTL or CMOS compatible; LGO in phase Chip enable. When driven high, both outputs go low. Logic Reference Ground High Side Power Supply High side driver output High side voltage return pin Low side power supply. This power supply provides power for both outputs. Voltage range is from 4.5 to 25V. Low side driver output Low side return IXA611P7 LGO LS FUNCTION Logic Supply HS Input LS Input Enable Ground Supply Voltage Output Return Supply Voltage IXA611S3 SYMBOL VDD HIN LIN ENB DG VCH HGO HS VCL IXYS ICs are covered by US Patent No. 6,759,692 2 IXA611 Absolute Maximum Ratings Symbol VCH Definition High side floating supply voltage Min -25 Max 650 Units V VHS High side floating supply offset voltage VCH-200 VCH+.3 V VHGO High side floating output voltage VHS-.3 VCH+.3 V VCL Low side fixed supply voltage -0.3 35 V VLGO Low side output voltage -0.3 VCL+.3 V VDD Logic supply voltage -0.3 VDG+35 V VDG Logic supply offset voltage VLS-3.8 VLS+3.8 V VIN Logic input voltage(HIN & LIN) VSS-.3 VDD+.3 V dVS/dt Allowable offset supply voltage transient 50 V/ns PD PD RTHJA RTHJc Package power dissipation@ TA ≤ 25C Package power dissipation@ TC ≤ 25C Thermal resistance, junction-to-ambient Thermal resistance, junction-to-case 1 2.1 125 60 W W K/W K/W TJ Junction Temperature 150 o C TS Storage temperature 150 o C TL Lead temperature (soldering, 10 s) 300 o C -55 Recommended Operating Conditions Symbol VCH Definition Min High side floating supply absolute voltage VHS+10 Max VHS+20 Units V VHS High side floating supply offset voltage -20 650 V VHGO VCL High side floating output voltage VHS VCH+20 V Low side fixed supply voltage 10 20 V VLGO Low side output voltage 0 VCC V VDD Logic supply voltage VDG+3 VDG+20 V VDG Logic supply voffset voltage VLS-1 VLS+1 V VIN Logic input voltage(HIN, LIN, ENbar) VDG VDD TA Ambient Temperature -40 125 Ordering Information Part Number Package Type IXA611P7 IXA611S3 14-PIN DIP 16-PIN SOIC 3 V o C IXA611 Dynamic Electrical Characteristics Symbol ton Definition Turn-on propagation delay Test Conditions VHS= 0V, Cload= 2nF Min toff Turn-off propagation delay VHS= 600V, Cload= 2nF ten Device enable delay tr Turn-on rise time tf tdm Typ 120 Max Units ns 87 ns 202 ns Cload= 2nF 23 ns Turn-off fall time Cload= 2nF 22 ns Delay matching, HS & LS turn-on/off Cload= 2nF 50 ns Static Electrical Characteristics Symbol Definition Test Conditions Min VINH Logic “1” input voltage VDD= VCL= 15V 7.0 VINL Logic “0” input voltage Typ Max V 6 VHLGO // VHHGO High level output voltage, Units V IO= 0A 0.28 V IO= 0A .23 V VCH-VHGO or VCL-VLGO VLLGO // VLHGO High level output voltage, VHGO or VLGO IHL HS to LS bias current. VHS= VCH= 600V .17 mA IQHS Quiescent VCH supply current VIN= 0V or VDD .77 mA IQLS Quiescent VCL supply current VIN= 0V or VDD .79 mA IQDD Quiescent VDD supply current VIN= 0V or VDD 36 uA IIN+ Logic “1” input bias current VIN= VDD 2 uA IIN- Logic “0” input voltage VIN= 0V 1 uA VCHUV+ VCH supply undervoltage positive going threshold. 8.3 V VCHUV- VCH supply undervoltage negative going threshold. 8.2 V VCLUV+ VCL supply undervoltage positive going threshold 8.1 V VCLUV- VCL supply undervoltage negative going threshold. 8.0 V IGO HS or LS Output low short circuit current; VGO= 15V, VIN= 0V, PW<10us ± 0.6 A Timing Waveform Definitions ENB 50% ten LGO/HGO Figure 3. INPUT/OUPUT Timing Diagram Figure 4. ENABLE Waveform Definitions 4 IXA611 Timing Waveform Definitions Figure 5. Definitions of Switching Time Waforms Figure 6. Definitions of Delay Matching Waveforms IXA611S3 Figure 7. Test circuit for allowable offset supply voltage transient. 5 IXA611 IXA611S3 Package Outline IXA611P7 Package Outline IXYS Corporation 3540 Bassett St; Santa Clara, CA 95054 Tel: 408-982-0700; Fax: 408-496-0670 e-mail: [email protected] www.ixys.com IXYS Semiconductor GmbH Edisonstrasse15 ; D-68623; Lampertheim Tel: +49-6206-503-0; Fax: +49-6206-503627 e-mail: [email protected] 6