5041 series High-stability Crystal Oscillator IC with Frequency Adjustment Function OVERVIEW The 5041 series are high-stability clock oscillator ICs with built-in frequency adjustment functions. The frequency adjustment functions can be optimized, by the addition of a minimal adjustment process, to improve the frequency stability. The function is implemented using frequency adjustment data written to a built-in EEPROM over a 1-wire serial interface. The ICs are ideal for compact crystal oscillators for use in applications such as Wireless-LAN that require high frequency stability in the order of ±30 to ±10ppm. They use a pad layout suitable for flip chip bonding mounting. FEATURES FREQUENCY CHARACTERISTICS COMPENSATION BEFORE and AFTER ADJUSTMENT Δf/f [ppm] ▪ Realizing frequency stability improvement with minimal additional process ▪ Temperature compensation range / operating temperature 50 range: -40C to +85C 40 ▪ Frequency adjustment functions built-in 30 Before compensation <Frequency-temperature characteristics compensation function> 20 10 AT-cut crystal, 3rd order frequency-temperature characteristics ±10ppm 0 compensation, with independent low-temperature and high-10 temperature compensation settings After compensation -20 -30 - Center frequency adjustment function -40 - Temperature rotation compensation function -50 -40 -20 0 20 40 60 80 100 - Low-temperature characteristics compensation Ta [°C] - High-temperature characteristics compensation ▪ Rewritable EEPROM built-in ▪ 6 pads: same as general clock oscillator ICs ▪ Operating supply voltage range APPLICATIONS 5041AxB: 2.25V to 3.63V ▪ 3.2mm×2.5mm, 2.5mm×2.0mm, 2.0mm×1.6mm size 5041BxB: 1.60V to 2.25V miniature crystal oscillator modules ▪ Recommended oscillation frequency range ▪ Wireless-LAN and applications requiring high-stability (for fundamental oscillation): 20MHz to 55MHz clock oscillators ▪ Frequency divider built-in Frequency divider output for 1.25MHz (min) low frequency output Selectable by version: fOSC, fOSC/2, fOSC/4, fOSC/8, fOSC/16 ▪ Standby function High-impedance in standby mode, oscillator stops ▪ CMOS output ▪ 15pF output load capacitance ▪ Pad layout for flip chip bonding ▪ Wafer form (WF5041xxB) ORDERING INFORMATION Device Package Version name WF5041□□B-4 WF5041xxB-4 Wafer form Form WF : Wafer form Frequency divider function (output frequency) Operating supply voltage SEIKO NPC CORPORATION―1 5041 series SERIES CONFIGURATION Version name Operating supply voltage range [V] Output frequency fOUT (divider ratio) 5041A1B fOSC 5041A2B fOSC/2 5041A3B 2.25 to 3.63 fOSC/4 5041A4B fOSC/8 5041A5B fOSC/16 5041B1B fOSC 5041B2B fOSC/2 5041B3B 1.60 to 2.25 fOSC/4 5041B4B fOSC/8 5041B5B fOSC/16 SEIKO NPC CORPORATION—2 5041 series PAD LAYOUT (Unit: µm) (420,345) VSS 5 Y INHN 6 (0,0) 1 (−420,−345) 4 Q 3 VDD 2 XT XTN X Chip size: 0.84mm × 0.69mm Chip thickness: 130µm ± 15µm Pad size: 80µm × 80µm Chip base: VSS level PAD DIMENSIONS Pad No. Pin PIN DESCRIPTION Pad dimensions [µm] I/O*1 Name Description X Y –225.2 –253.5 225.2 –253.5 1 XT I Amplifier input 2 XTN O Amplifier output Crystal connection pins. Crystal is connected between XT and XTN. 3 VDD – (+) supply voltage – 328.5 –5.0 4 Q O Output Output frequency determined by internal circuit to one of fOSC, fOSC/2, fOSC/4, fOSC/8, fOSC/16. High impedance in standby mode 328.5 223.8 5 VSS – (–) ground – –328.5 223.8 6 INHN I Output state control input High impedance when LOW (oscillator stops). Power-saving pull-up resistor built-in. –328.5 –5.0 XT XTN *1. I: Input, O: Output BLOCK DIAGRAM RF Regulator *2 VDD 1 N *1 Q Oscillation Detection RPU INHN Temperature Compensation VSS Control Register FO, TO, RTG, TLO, TLG, THO, THG *1. N = 1, 2, 4, 8, 16 (mask option) *2. 5041A×B version only SEIKO NPC CORPORATION—3 5041 series ABSOLUTE MAXIMUM RATINGS VSS = 0V unless otherwise noted. Parameter Symbol Rating Unit Between VDD and VSS −0.3 to +4.0 V VPP Between INHN and VSS −0.3 to +16.5 V VIN Input pins −0.3 to VDD + 0.3 V −0.3 to VDD + 0.3 V ± 20 mA −65 to +150 °C 100 times Supply voltage range*1 VDD Program read/write input voltage range*1 Input voltage range*1 *2 Conditions Output voltage range*1 *2 VOUT Output pins Output current*1 IOUT Q pin Storage temperature range*3 TSTG Wafer form EEPROM maximum writes NEW *1. This parameter rating is the values that must never exceed even for a moment. This product may suffer breakdown if this parameter rating is exceeded. Operation and characteristics are guaranteed only when the product is operated at recommended operating conditions. *2. VDD is a VDD value of recommended operating conditions. *3. When stored in nitrogen or vacuum atmosphere applied to IC itself only (excluding packaging materials). RECOMMENDED OPERATING CONDITIONS VSS = 0V unless otherwise noted. Rating Parameter Supply voltage Input voltage Symbol Max 5041A×B 2.25 – 3.63 V 5041B×B 1.60 – 2.25 V VSS – VDD V −40 – +85 °C 5041A×B 20 – 55 MHz 5041B×B 20 – 55 MHz 5041A×B 1.25 – 55 MHz 5041B×B 1.25 – 55 MHz – – 15 pF VIN Input pins (XT, INHN) Oscillation frequency*1 fOSC Output load capacitance Typ Between VDD and VSS TOPR Unit Min VDD Operating temperature Output frequency*1 Conditions fOUT Q pin CLOUT Q pin *1. The recommended oscillation frequency is a yardstick value derived from the crystal used for NPC characteristics authentication. However, the oscillation frequency range is not guaranteed. Specifically, the characteristics can vary greatly due to crystal characteristics and mounting conditions, so the oscillation characteristics of components must be carefully evaluated. ■ Mount a ceramic chip capacitor that is larger than 0.01µF proximal to IC (within approximately 3mm) between VDD and VSS in order to obtain stable operation of 5041 series. In addition, the wiring pattern between IC and capacitor should be as wide as possible. ■ Since it may influence the reliability if it is used out of range of recommended operating conditions, this product should be used within this range. SEIKO NPC CORPORATION—4 5041 series ELECTRICAL CHARACTERISTICS DC Characteristics (5041A1B to A5B) VDD = 2.25V to 3.63V, VSS = 0V, TOPR = −40°C to +85°C, CLOUT = 15pF unless otherwise noted. Rating Parameter Symbol Conditions 5041A1B (fOUT = fOSC), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz 5041A2B (fOUT = fOSC/2), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz Operating-mode current consumption*1 IDD 5041A3B (fOUT = fOSC/4), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz 5041A4B (fOUT = fOSC/8), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz 5041A5B (fOUT = fOSC/16), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz Unit MIN TYP MAX VDD = 2.5V – 1.4 2.8 mA VDD = 3.3V – 1.7 3.4 mA VDD = 2.5V – 1.1 2.2 mA VDD = 3.3V – 1.4 2.7 mA VDD = 2.5V – 1.0 1.9 mA VDD = 3.3V – 1.2 2.4 mA VDD = 2.5V – 0.9 1.7 mA VDD = 3.3V – 1.0 2.1 mA VDD = 2.5V – 0.8 1.7 mA VDD = 3.3V – 1.0 2.0 mA – – 10 µA VDD−0.4 – – V – – 0.4 V Q = VDD – – 10 µA Q = VSS −10 – – µA 0.7VDD – – V – – 0.3VDD V INHN = VSS 0.4 1.5 10 MΩ INHN = 0.7VDD 50 100 200 kΩ Standby-mode current consumption IST Measurement circuit 1, INHN = LOW HIGH-level output voltage VOH Q pin, Measurement circuit 3, IOH = −4mA LOW-level output voltage VOL Q pin, Measurement circuit 3, IOL = 4mA Output leakage current HIGH-level input current LOW-level input current INHN pull-up resistance IZ VIH Measurement circuit 4, INHN = LOW INHN pin, Measurement circuit 5 VIL RPU1 RPU2 Measurement circuit 6 *1. The consumption current IDD (CLOUT) with a load capacitance (CLOUT) connected to the Q pin is given by the following equation, where IDD is the noload consumption current and fOUT is the output frequency. IDD (CLOUT) [mA] = IDD [mA] + CLOUT [pF] × VDD [V] × fOUT [MHz] × 10–3 SEIKO NPC CORPORATION—5 5041 series DC Characteristics (5041B1B to B5B) VDD = 1.60V to 2.25V, VSS = 0V, TOPR = −40°C to +85°C, CLOUT = 15pF unless otherwise noted. Rating Parameter Operating-mode current consumption*1 Symbol IDD Conditions Unit MIN TYP MAX 5041B1B (fOUT = fOSC), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz, VDD = 1.8V – 1.7 3.4 mA 5041B2B (fOUT = fOSC/2), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz, VDD = 1.8V – 1.5 3.3 mA 5041B3B (fOUT = fOSC/4), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz, VDD = 1.8V – 1.4 3.2 mA 5041B4B (fOUT = fOSC/8), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz, VDD = 1.8V – 1.4 3.1 mA 5041B5B (fOUT = fOSC/16), Measurement circuit 1, no load, INHN = HIGH, fOSC = 48MHz, VDD = 1.8V – 1.3 3.1 mA – – 10 µA VDD−0.4 – – V – – 0.4 V Q = VDD – – 10 µA Q = VSS −10 – – µA 0.7VDD – – V – – 0.3VDD V INHN = VSS 0.4 1.5 10 MΩ INHN = 0.7VDD 50 100 200 kΩ Standby-mode current consumption IST Measurement circuit 1, INHN = LOW HIGH-level output voltage VOH Q pin, Measurement circuit 3, IOH = −4mA LOW-level output voltage VOL Q pin, Measurement circuit 3, IOL = 4mA Output leakage current HIGH-level input current LOW-level input current INHN pull-up resistance IZ VIH Measurement circuit 4, INHN = LOW INHN pin, Measurement circuit 5 VIL RPU1 RPU2 Measurement circuit 6 *1. The consumption current IDD (CLOUT) with a load capacitance (CLOUT) connected to the Q pin is given by the following equation, where IDD is the noload consumption current and fOUT is the output frequency. IDD (CLOUT) [mA] = IDD [mA] + CLOUT [pF] × VDD [V] × fOUT [MHz] × 10–3 SEIKO NPC CORPORATION—6 5041 series AC Characteristics Clock output characteristics (5041A1B to A5B, Q pin) VDD = 2.25V to 3.63V, VSS = 0V, TOPR = −40°C to +85°C, CLOUT = 15pF unless otherwise noted. Parameter Symbol Rating Conditions MIN TYP MAX Unit tr Measurement circuit 1, 0.1VDD → 0.9VDD – – 4.5 ns tf Measurement circuit 1, 0.9VDD → 0.1VDD – – 4.5 ns Duty Measurement circuit 1, threshold voltage 0.5VDD, Duty = Tw/T × 100 45 50 55 % Output enable delay time*2 tOE Measurement circuit 2*3, INHN = LOW → HIGH – – 10 µs Output disable delay time tOD Measurement circuit 2*3, INHN = HIGH → LOW – – 100 ns Output rise time Output fall time Output duty cycle *1 Clock output characteristics (5041B1B to B5B, Q pin) VDD = 1.60V to 2.25V, VSS = 0V, TOPR = −40°C to +85°C, CLOUT = 15pF unless otherwise noted. Parameter Symbol Rating Conditions MIN TYP MAX Unit Output rise time tr Measurement circuit 1, 0.1VDD → 0.9VDD – – 5 ns Output fall time tf Measurement circuit 1, 0.9VDD → 0.1VDD – – 5 ns 45 50 55 % Output duty cycle*1 Duty Measurement circuit 1, threshold voltage 0.5VDD, Duty = Tw/T × 100 Output enable delay time*2 tOE Measurement circuit 2*3, INHN = LOW → HIGH – – 10 µs tOD Measurement circuit 2*3, INHN = HIGH → LOW – – 100 ns Output disable delay time *1. This parameter is measured using the NPC’s standard crystal. Note that the values will vary with the crystal characteristics used or mounting conditions. *2. Oscillator stop function is built-in. When INHN goes LOW, normal output stops. When INHN goes HIGH, normal output is not resumed until after the oscillator start-up time has elapsed. *3. Measurement circuit 2 takes an external input on the XT pin, without using a crystal. 0.9VDD TW 0.1VDD Q 0.9VDD DUTY measurement voltage (0.5VDD) 0.1VDD DUTY= TW/ T T tr 100 [%] tf Figure 1. Output switching waveform 0.7VDD INHN 0.3VDD tr = tf = 2ns (10% to 90%) tOD tOE 0.1V 0.5VDD Q 0.1V fOUT Hi-Z Low fOUT Figure 2. Output disable timing chart SEIKO NPC CORPORATION—7 5041 series MEASUREMENT CIRCUITS Measurement Circuit 1 Measurement Circuit 4 Parameters: IDD, IST, Duty, tr, tf Parameters: IZ IDD IST A VDD IDD: Open DUTY, tr, tf: Short IST: Open or Short VDD XT VDD A Q or VSS Q Crystal IZ INHN VSS XTN INHN VSS CLOUT = 15pF (Including probe capacitance) IDD, DUTY, tr, tf: Open IST: Short Note: The AC characteristics are observed using an oscilloscope on pin Q. Measurement Circuit 5 Parameters: VIH, VIL Measurement Circuit 2 Parameters: tOD, tOE VDD RL1 =1kΩ VDD Signal Generator INHN VSS VIH V VIL Q 0.001µF XT INHN VSS RL2 =1kΩ 50Ω VDD or Measurement Circuit 6 VSS Parameters: RPU1, RPU2 XT input signal: 1Vp-p, sine wave Measurement Circuit 3 VDD Parameters: VOH, VOL INHN VSS VDD 50Ω Signal Generator Q 0.001µF XT VSS 50Ω ∆V VIN V VOH VS VS adjusted such that ∆V = 50 × IOH. VS VOL VOH V VOL A IPU RPU1 = VDD IPU (VIN = 0V) RPU2 = VDD 0.7V DD (VIN = 0.7V DD) IPU 0.1µF VS ∆V VS adjusted such that ∆V = 50 × IOL. XT input signal: 1Vp-p, sine wave SEIKO NPC CORPORATION—8 5041 series FUNCTIONAL DESCRIPTION Frequency Adjustment Function The 5041 series ICs have a built-in oscillator frequency adjustment function. The frequency adjustment settings are written to and stored in internal EEPROM, making the devices easy to setup. A typical compensation sequence is shown below. 50 40 Before adjustment 30 20 10 0 −10 −20 Before compensation 20 10 ∆f/f [ppm] ∆f/f [ppm] 50 40 30 0 −10 −20 −30 −30 After adjustment −40 −50 −40 −20 0 20 40 60 After compensation −40 −50 −40 −20 0 20 40 80 100 Ta [°C] Figure 3. Center frequency adjustment After compensation ∆f/f [ppm] ∆f/f [ppm] 50 40 30 0 −10 −20 −30 −40 −50 −40 −20 20 40 60 Before compensation 20 10 0 −10 −20 After compensation −30 Before compensation 0 80 100 Figure 4. Temperature rotation compensation 50 40 30 20 10 60 Ta [°C] 80 100 Ta [°C] Figure 5. Low-temperature characteristics compensation −40 −50 −40 −20 0 20 40 60 80 100 Ta [°C] Figure 6. High-temperature characteristics compensation SEIKO NPC CORPORATION—9 5041 series Power-saving Pull-up Resistor The INHN pin pull-up resistance RPU1 or RPU2 changes in response to the input level (open, HIGH, or LOW). When INHN is tied LOW level, the pull-up resistance is large (RPU1), reducing the current consumed by the resistance. When INHN is left open circuit (HIGH), the pull-up resistance is small (RPU2), which decreases the input susceptibility to external noise. The pull-up resistance ties the INHN pin HIGH level, helping to avoid problems such as the output stopping unexpectedly. Oscillation Detector Function The 5041 series also feature an oscillation detector circuit. This circuit functions to disable the outputs until the oscillator circuit starts and oscillation becomes stable. This alleviates the danger of abnormal oscillator output at oscillator start-up when power is applied or when INHN is switched. USAGE NOTES Consideration for Mounting IC A ceramic chip capacitor that is larger than 0.01µF should be mounted proximal to IC (within approximately 3mm) between VDD and VSS in order to obtain stable operation of 5041 series. In addition, the wiring pattern between IC and capacitor should be as wide as possible. SEIKO NPC CORPORATION—10 5041 series Please pay your attention to the following points at time of using the products shown in this document. 1. The products shown in this document (hereinafter “Products”) are designed and manufactured to the generally accepted standards of reliability as expected for use in general electronic and electrical equipment, such as personal equipment, machine tools and measurement equipment. The Products are not designed and manufactured to be used in any other special equipment requiring extremely high level of reliability and safety, such as aerospace equipment, nuclear power control equipment, medical equipment, transportation equipment, disaster prevention equipment, security equipment. The Products are not designed and manufactured to be used for the apparatus that exerts harmful influence on the human lives due to the defects, failure or malfunction of the Products. If you wish to use the Products in that apparatus, please contact our sales section in advance. In the event that the Products are used in such apparatus without our prior approval, we assume no responsibility whatsoever for any damages resulting from the use of that apparatus. 2. NPC reserves the right to change the specifications of the Products in order to improve the characteristics or reliability thereof. 3. The information described in this document is presented only as a guide for using the Products. No responsibility is assumed by us for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of the third parties. Then, we assume no responsibility whatsoever for any damages resulting from that infringements. 4. The constant of each circuit shown in this document is described as an example, and it is not guaranteed about its value of the massproduction products. 5. In the case of that the Products in this document falls under the foreign exchange and foreign trade control law or other applicable laws and regulations, approval of the export to be based on those laws and regulations are necessary. Customers are requested appropriately take steps to obtain required permissions or approvals form appropriate government agencies. SEIKO NPC CORPORATION 1-9-9, Hatchobori, Chuo-ku, Tokyo 104-0032, Japan Telephone: +81-3-5541-6501 Facsimile: +81-3-5541-6510 http://www.npc.co.jp/ Email: [email protected] 1'( SEIKO NPC CORPORATION—11