NTE74HC240 & NTE74HC244 Integrated Circuit TTL − High Speed CMOS, Octal Buffer/Line Driver with 3−State Outputs Description: The NTE74HC240 (Inverting) and NTE74HC244 (Non−Inverting) are 3−state buffers in a 20−Lead DIP type package that utilizes advanced silicon−gate CMOS technology to achieve the high noise immunity and low power consumption of standard CMOS integrated circuits. Both devices have active−low output enables. Features: D Typical Propagation Delay: 8ns D Wide Power Supply Range: 2V to 6V D High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V D 3−State Outputs D Buffered Inputs D High−Current Bus Driver Outputs D Fanout (Over Temperature Range): Standard Outputs . . . 10 LS−TTL Loads Bus Driver Outputs . . 15 LS−TTL Loads D Balanced Propagation Delay and Transition Times D Significant Power Reduction Compared to LS−TTL Logic ICs Absolute Maximum Ratings: (Note 1, Note 2) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to +7.0V Clamp Diode Current, IIK, IOK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA DC Drain Current (Per Output), IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35mA DC Output Source or Sink Current (Per Output), IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA DC VCC or GND Current (Per Pin), ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70mA Maximum Junction, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65C to +150C Typical Thermal Resistance, Junction−to−Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69C/W Lead Temperature (During Soldering, 10sec), TL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300C Note 1. Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2. Unless otherwise specified, all voltages are referenced to GND. Recommended Operating Conditions: Parameter Symbol Min Typ Max Unit VCC 2.0 − 6.0 V VIN, VOUT 0 − VCC V Operating Temperature Range TA −40 − +85 C Input Rise or Fall Times VCC = 2.0V tr, tf − − 1000 ns VCC = 4.5V − − 500 ns VCC = 6.0V − − 400 ns Supply Voltage DC Input or Output Voltage DC Electrical Characteristics: TA = +25C Parameter Minimum HIGH Level Input Voltage Maximum LOW Level Input Voltage Minimum HIGH Level Output Voltage Minimum LOW Level Output Voltage Symbol VIH Test Conditions VIL VOH VOL VIN = VIH or VIL VIN = VIH or VIL TA = −40 to +85C VCC Typ Guaranteed Limits 2.0 − 1.5 1.5 Unit V 4.5 − 3.15 3.15 V 6.0 − 4.2 4.2 V 2.0 − 0.5 0.5 V 4.5 − 1.35 1.35 V 6.0 − 1.8 1.8 V VCC VCC −0.1 VCC −0.1 IOUT = −20A − IOUT = −6mA 4.5 4.2 3.98 3.84 V V IOUT = −7.8mA 6.0 5.7 5.48 5.34 V IOUT = 20A − 0 0.1 0.1 V IOUT = 6mA 4.5 0.2 0.26 0.33 V IOUT = 7.8mA 6.0 0.2 0.26 0.33 V Maximum Input Current IIN VIN = VCC or GND 6.0 − 0.1 1.0 A Maximum Quiescent Supply Current ICC VIN = VCC or GND, IOUT = 0A 6.0 − 8.0 80 A 3−State Leakage Current IOZ VIN = VIH or VIL 6.0 − 0.5 0.5 A AC Electrical Characteristics: (tr = tf = 6ns, CL = 50pF unless otherwise specified) TA = +25C Parameter Propagation Delay (Data to Outputs) NTE74HC240 Symbol tPHL, tPLH Test Conditions CL = 15pF NTE74HC240 CL = 15pF Output Enable and Disable Times tTHL, tTLH TA = −40 to +85C VCC Typ 2.0 − 150 Guaranteed Limits 125 Unit ns 4.5 − 20 25 ns 5.0 8 − − ns 6.0 − 17 21 ns 2.0 − 110 140 ns 4.5 − 22 28 ns 5.0 9 − − ns 6.0 − 19 24 ns 2.0 − 150 190 ns 4.5 − 30 38 ns 5.0 12 − − ns 6.0 − 26 33 ns AC Electrical Characteristics (Cont’d): (tr = tf = 6ns, CL = 50pF unless otherwise specified) TA = +25C Parameter Output Transition Time Symbol tTHL, tTLH Maximum Input Capacitance Test Conditions CIN Maximum 3−State Output Capacitance COUT Power Dissipation Capacitance NTE74HC240 NTE74HC244 CPD Note 3 TA = −40 to +85C VCC Typ Guaranteed Limits 2.0 − 60 75 Unit ns 4.5 − 12 15 ns 6.0 − 10 13 ns − − 10 10 pF − − 20 20 pF 5 5 − − 38 46 − − PF pF Note 3. CPD is used to determine the dynamic power consumption, per channel. PD = VCC2 fi (CPD + CL) where fi = Input Frequency, fO = Output Frequency, CL = Output Load Capacitance, VCC = Supply Voltage. Pin Connection Diagram NTE74HC240 NTE74HC244 1OE 1 20 VCC 1OE 1 20 VCC 1 A0 2 2Y3 3 19 2OE 18 1Y0 1 A0 2 2Y3 3 19 2OE 18 1Y0 1 A1 4 17 2 A3 1 A1 4 17 2 A3 2Y2 5 16 1Y1 2Y2 5 16 1Y1 1 A2 6 2Y1 7 15 2 A2 14 1Y2 1 A2 6 15 2 A2 2Y1 7 14 1Y2 1 A3 8 13 2 A1 1 A3 8 13 2 A1 2Y0 9 12 1Y3 2Y0 9 12 1Y3 GND 10 11 2 A0 GND 10 11 2 A0 20 11 1 10 .300 (7.62) .260 (6.6) Max 1.200 (30.5) Max .200 (5.08) Max .012 (0.30) .100 (2.54) Typ .100 (2.54) Min .350 (8.89)