NJU26901
Digital Audio Delay
Package
General Description
The NJU26901 is a digital audio delay. The NJU26901 provides delay-time
adjustment function and digital audio interface.
NJU26901M
FEATURES
• 2-Channel Audio Delay (24 bits data width).
Delay Time 85msec at fs = 48kHz ( 128msec at fs = 32kHz , 43msec at fs = 96kHz)
• 4 delay time modes( ¼, ½, ¾, 1 max. delay ) are selectable without a micro-computer.
• To make long delay time, the NJU26901 can be connected serially.
• Non-audio-signal data can be delayed by the NJU26901.
Hardware Specification
•
•
•
•
•
Digital Audio Interface
Digital Audio Format
Audio Bit Clock (BCK) Frequency
Package
Power Supply
:
:
:
:
:
1 Input port / 1 Output port
I2S 24bit BCK : 64fs, Slave Mode
13MHz Max ( approximate fs=200KHz)
DMP8 ( Pb-Free )
2.5V ( +3.3V input tolerant )
Function Block Diagram
NJU26901
BCKI
LRI
SERIAL
LRI
BCKI
SDI
AUDIO
INTERFACE
Delay
RAM
L/R in
SERIAL
AUDIO
INTERFACE
L/R out
SDO
Control
Logic
COUNT[1:0]
Fig. 1 Function Block Diagram
Ver.2008-12-01
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NJU26901
Pin Assignment
SDI
1
LRI
2
8
VDD
7
SDO
NJU26901
BCKI
3
6
COUNT[1]
VSS
4
5
COUNT[0]
Fig. 2 Pin Assignment
Pin Description
Table 1 Pin Description
Pin No. Symbol
1
SDI
2
LRI
3
BCKI
4
VSS
5
COUNT[0]
6
COUNT[1]
7
SDO
8
VDD
I : Input
Ipu : Input(internal pull-up)
O : Output
I/O
I
I
I
Ipu
Ipu
O
-
Description
Audio Data Input
LR Clock Input
Bit Clock Input
GND
Delay Time Control 0
Delay Time Control 1
Audio Data Output
Power Supply +2.5V
Absolute Maximum Ratings
Table 2 Absolute Maximum Ratings
Parameter
Symbol
Rating
Units
Power Supply Voltage
VDD
V
Input Pin Voltage
VTMI
Power Dissipation
Operating Temperature
Storage Temperature
PD
TOPR
TSTR
-0.3 to +3.05
-0.3 to +3.6 (VDD ≥ 2.25V)
-0.3 to +3.05 (VDD < 2.25V)
100
-40 to +85
-40 to +125
-2-
V
mW
°C
°C
Ver.2008-12-01
NJU26901
Electric Characteristics
(VDD=2.5V,Ta=25°C)
Table 3 Electric Characteristics
Parameter
Symbol
Operating VDD Voltage
VDD
Operating Current
IDD
Test Condition
BCKI:13MHz
SDO:CL=25pF
Min.
Typ.
Max.
Units
2.25
2.5
2.75
V
-
1.0
-
mA
Operating Temperature
TOPR
-40
25
85
°C
High Level Input Voltage
VIH
2.0
-
3.3
V
Low Level Input Voltage
VIL
VOH
Low Level Output Voltage
VOL
Input Current
IIN
IOH= -2mA
IOH= -100µA
IOL= 2mA
IOL= 100µA
VIN= VSS to 3.6V
-
0.5
0.4
0.1
+15
V
High Level Output Voltage
VDD-0.4
VDD-0.1
-15
µA
Input Current
IIN(PU)
VIN= VSS to 3.6V
-100
-
+15
µA
V
V
Input Capacitance
CIN
-
10
-
pF
Input Rise/Fall transition Time
tr / tf
-
-
100
ns
Equivalent Circuit
VDD
Input
terminal
VDD
Output
terminal
Input
terminal
VSS
Input Pin #1,2,3
VDD
VSS
VSS
Input Pin #5,6
Output Pin #7
Fig. 3 Input Terminal Equivalent Circuit
Ver.2008-12-01
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NJU26901
Serial Audio Timing
Table 4 Serial Audio Input Timing Parameters
Parameter
Symbol
Test Condition
Min
Typ.
Max
Units
BCKI Frequency
BCKI Period
L Pulse Width
H Pulse Width
BCKI to LRI Time
fBCK
-
-
13
MHz
tSIL
tSIH
TSLI
35
35
15
-
-
ns
-
-
ns
LRI to BCKI Time
tLSI
15
-
-
ns
Data Setup Time
tDS
15
-
-
ns
Data Hold Time
tDH
15
-
-
ns
Data Output Delay
tDOD
-
15
ns
SDO=25pF
LRI
tSIH
tSIL
tSLI
tLSI
BCKI
tDS
tDH
SDI
SDO
tDOD
Fig. 4 Serial Audio Input / Output Timing
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Ver.2008-12-01
NJU26901
Serial Audio Interface
Digital Audio format is I2S 24bit 64fs in fig. 5. The input and output format are the same I2S 24bit 64fs.
Left Channel
LRI
Right Channel
BCKI
MSB
SDI, SDO
LSB
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MSB
LSB
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
32 Clocks
32 Clocks
Fig 5 Digital Audio Format (I2S 24bits 64fs)
Function Description
• SDI(#1) is serial audio input pin. The input audio data should be connected to this pin. The NJU26901 fetches
in the input audio data every LRI edge.
• LRI(#2) is LR clock input pin. This LR clock frequency is the same frequency of the input audio signal.
LRI=”Low” shows SDI and SDO data are left channel data. LRI=”High” shows SDI and SDO data are right
channel data.
• BCKI(#3) is bit clock input pin. This BCKI clock frequency is 64 times as large as the input audio signal.
• SDO(#7) is serial audio output pin. The delayed audio data come out through this pin.
• VDD(#8) is 2.5V power supply pin. VSS(#4) is GND pin. The decoupling capacitor is necessary between VDD
and VSS.
• The input pins can interface to 3.3V ICs. The output pins can interface to 2.5V ICs. Refer to table3 “Electric
Characteristics”.
• After Power-on RESET, there is possibility the NJU26901 generates random data for the delay time period set
by COUNT[0],[1] pins. If necessary, the mute circuit should be added.
Delay Time
• The NJU26901 provides maximum 4097 samples delay and slave-mode audio interface. The delay time
depends on sampling frequency.
• Delay time is controlled by COUNT[0], COUNT[1]. Table 5 shows Delay Time vs Sampling Frequency.
• Detail delay time is evaluated by the following formula.
Delay time = {1/(fs)} × (sampling number + 1)
[sec]
• The sampling number is incremented every LRI clock.
Table 5 Delay Time vs Sampling Frequency
Sampling Frequency
4/4
3/4
(fs)
(COUNT[1:0]=11)
(COUNT[1:0]=01)
192KHz
21ms
16ms
96KHz
43ms
32ms
88.2KHz
47ms
35ms
48KHz
85ms
64ms
44.1KHz
93ms
69ms
32KHz
128ms
96ms
Sampling number
(4097)
(3073)
Ver.2008-12-01
1/2
(COUNT[1:0]= 10)
11ms
21ms
23ms
43ms
46ms
64ms
(2049)
1/4
(COUNT[1:0]= 00)
5ms
11ms
12ms
21ms
23ms
32ms
(1025)
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NJU26901
Change Delay Time Setting
The delay-time is set by COUNT[0],[1]. The delay-time can be changed during the NJU26901 operation.
In case the delay-time setting is changed, the NJU26901 sets up the new delay-time and initializes itself again
within 2 BCKI rising edge.
After setting the new delay-time, the NJU26901 holds SDO low-level, mute, during the new delay-time period.
After mute, the audio data come out through SDO.
The NJU26901 discards the input data which come during new delay-time setting period.
Application block diagram
2.5V
ANALOG LIN
DATA OUT
ANALOG RIN
1
2
LR CLK OUT
ADC
BIT CLK OUT
MASTER CLK OUT
3
4
SDI
VDD
LRI
SDO
ANALOG LOUT
8
DATA IN
ANALOG ROUT
7
NJU26901
BCKI
COUNT[1]
VSS
COUNT[0]
BIT CLK IN
6
DAC
0.1uF
10uF
LR CLK IN
5
MASTER CLK IN
Delay Time = 85msec @ fs=48KHz
(COUNT[0:1]=11)
Fig. 6 Application Block Diagram
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Ver.2008-12-01
NJU26901
Package Dimensions ( EMP8, Pb-Free )
UNIT : mm
Fig. 7 Package Dimensions
Ver.2008-12-01
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
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