Errata

EM78P210N
8-Bit Microprocessor with OTP ROM
EM78P210N Errata Document
Specification Revision History
Doc. Version
Revision Description
Date
0.9
Preliminary version
2007/03/20
1.0
Initial released version
2007/10/19
1.1
Renamed the Product as EM78P220N from EM78P221N,
EM78P222N
2008/01/24
1. Retrieved ICE220N, Updated with ICE210N.
1.2
2. For ICE210N and EM78P210N, added Green mode
and Idle mode.
2008/04/22
1.3
Added LVR specifications
2013/04/22
Version 1.2 to Version 1.3
A. Attached Items
N.A.
Errata Document (V1.3) 04.22.2013
•1
EM78P210N
8-Bit Microprocessor with OTP ROM
B. Modified Items
1
Page 54
8
DC Electrical
Characteristics
8 DC Electrical Characteristics
Ta= 25°C, VDD= 5.0V, VSS= 0V
Symbol
FXT
VIHRC
VILRC
IIL
VIH1
VIL1
VIHT1
VILT1
VIHT2
VILT2
Parameter
Min.
Typ.
DC
−
F±30%
850
OSCI in RC mode
−
3.75
−
V
OSCI in RC mode
−
1.25
−
V
VIN = VDD, VSS
–1.0
0
1.0
μA
Ports 5, 6, 7, 8
−
3.75
−
V
Ports 5, 6, 7, 8
−
1.5
−
V
/RESET
−
1.9
−
V
/RESET
−
1.2
−
V
TCC, INT
−
3.75
−
V
TCC, INT
−
1.25
−
V
Crystal: VDD to 5V
Two cycles with two clocks
ERC: VDD to 5V
R: 5.1KΩ, C: 100 pF
Input High Threshold Voltage
(Schmitt Trigger)
Input Low Threshold Voltage
(Schmitt Trigger)
Input Leakage Current
for input pins
Input High Voltage
(Schmitt Trigger)
Input Low Voltage
(Schmitt Trigger)
Input High Threshold Voltage
(Schmitt Trigger)
Input Low Threshold Voltage
(Schmitt Trigger)
Input High Threshold Voltage
(Schmitt Trigger)
Input Low Threshold Voltage
(Schmitt Trigger)
Max. Unit
16
MHz
F±30% kHz
VIHX1
Clock Input High Voltage
OSCI in crystal mode
−
3.75
−
V
VILX1
Clock Input Low Voltage
OSCI in crystal mode
−
1.25
−
V
VOH = 0.9VDD
−
-9
−
mA
VOH = 0.7VDD
−
-27
−
mA
VOL = 0.1VDD
−
16.8
−
mA
VOL = 0.3VDD
−
67.2
−
mA
Ta = 25°C
2.21
2.5
2.79
V
Ta = -40 ~ 85°C
1.94
2.5
3.05
V
Ta = 25°C
2.6
3.0
3.42
V
Ta = -40 ~ 85°C
2.23
3.0
3.75
V
Ta = 25°C
3.56
4.0
4.43
V
Ta = -40 ~ 85°C
3.16
4.0
4.81
V
Pull-high active, input pin at VSS
50
−
90
μA
Pull-low active, input pin at Vdd
20
−
60
μA
IOH1
IOH2
IOL1
IOL2
Output High Voltage
(Ports 5, 6, 7, 8)
Output High Voltage
(Ports 6)
Output Low Voltage
(Ports 5, 6, 7, 8 )
Output Low Voltage
(Ports 5, 6)
LVR1
LVR2
Low voltage reset level
LVR3
IPH
IPL
2•
Condition
Pull-high current
(Ports 50~53, 64~67)
Pull-low current
(Ports 60~67)
Errata Document (V1.3) 04.22.2013
EM78P210N
8-Bit Microprocessor with OTP ROM
Symbol
ISB1
Parameter
Condition
Min.
Typ.
Power down current
All input and I/O pins at VDD,
Output pin floating, WDT disabled,
Max. Unit
−
2
−
μA
−
10
−
μA
−
4.0
−
μA
LVR disabled
ISB2
Power down current
All input and I/O pins at VDD,
Output pin floating, WDT enabled,
LVR disabled
ISB3
Power down current
All input and I/O pins at VDD,
Output pin floating, WDT disabled
LVR enabled
ICC1
Operating supply current at
two clocks (VDD=3V)
/RESET= 'High', Fosc=32kHz
(Crystal type, CLKS="0"),
Output pin floating,
WDT disabled, LVR disabled
−
15
20
μA
ICC2
Operating supply current at
two clocks (VDD=3V)
/RESET= 'High', Fosc=32kHz
(Crystal type, CLKS="0"),
Output pin floating,
WDT enabled, LVR disabled
−
15
25
μA
ICC3
Operating supply current
at two clocks (VDD=5V)
/RESET= 'High', Fosc = 4 MHz
(Crystal type, CLKS="0"),
Output pin floating,
WDT enabled, LVR disabled
−
1.5
1.7
mA
ICC4
Operating supply current at
two clocks (VDD=5V)
/RESET= 'High', Fosc = 10 MHz
(Crystal type, CLKS="0"),
Output pin floating,
WDT enabled, LVR disabled
−
2.8
3.0
mA
Errata Document (V1.3) 04.22.2013
•3
EM78P210N
8-Bit Microprocessor with OTP ROM
C. Deleted Items
N.A.
4•
Errata Document (V1.3) 04.22.2013