RS6563 High Performance PFC Controller DESCRIPTION RS6563 is an active power factor correction (PFC) controller for AC/ DC switching mode power supply applications. It is designed for operating in critical conduction mode (CRM). RS6563 features a quadrant multiplier. It includes a special circuit, able to reduce AC input current distortion that allows wide‐rangemains operation with an extremely low THD, even a large load range. RS6563 also features an internal start‐up time for stand‐alone applications, Zero Current Detector (ZCD), peak current sense comparator, and a totem pole output. RS6563 ensures safe operation with complete protections against all the fault conditions. Built ‐ in protection circuitry includes system over voltage protection (OVP), VCC under voltage lockout (UVLO), cycle ‐ by ‐ cycle current limiting, multiplier output clamping for limiting maximum peak switch current, system open loop protection, and gate drive output clamping for external power MOSFET protection. In RS6563, a two‐step OVP which contains dynamic OVP and static OVP enables to safely handle over voltage either occurring at start‐up or resulting from load disconnection. FEATURES Active transition‐mode(TM) optimizer One quadrant multiplier with THD optimizer Low dynamic OVP sensing current setting Low start‐up current and operating current Cycle‐by‐Cycle current limiting Internal RC filter Trimmed 1.5% internal band‐gap reference Under Voltage Lockout (UVLO) with Hysteretic Dynamic and static output over‐voltage protection Internal start‐up timer for stand‐alone clamping Disable function Totem pole output with high state clamping System open loop protection Proprietary Audio Noise Free Operation 9.5V to 30V wide range of VCC voltage DIP‐8 & SOP‐8 package RoHS Compliant and 100% Lead (Pb)‐Free and Green (Halogen Free with Commercial Standard) APPLICATIONS Electronic Ballast AC/DC SMPS power supply BLOCK DIAGRAM Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, No. 233-1, Baociao Rd., Sindian Dist., New Taipei City 23145, Taiwan RS6563 APPLICATION CIRCUIT ORDER INFORMATION Device RS6563 Y Z V1.1 Device Code Y is package & Pin Assignments designator : S : SOP‐8 P : DIP‐8 Z is Lead Free designator : P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) 2 April 2015 RS6563 PIN CONFIGURATION PIN DESCRIPTION Symbol INV COMP MULT CS ZCD GND GD VCC V1.1 Description Inverting Input of Error Amplifier. Connected to Resistor Divider from system Output. This is also used for system open loop protection. Out of Error Amplifier. A feedback compensation network is placed between COMP and the INV pin. Input of Multiplier. Connected to Line Voltage after Bridge Diodes via A Resistor Divider to provide Sinusoidal Reference Voltage to the Current loop. Current Sense Input pin. Connected to MOSFET Current Sensing Node. Zero Current Detection Input. When Activated, A New Switching Cycle Starts. If it is connected to GND, the device is disabled. Ground Pin Gate driver output. Drive power MOSFET. DC Power Supply Voltage. 3 Pin SOP/DIP 1 2 3 4 5 6 7 8 April 2015 RS6563 OPERATION DESCRIPTION RS6563 is a highly integrated power factor correction (PFC) controller IC that operates in critical conduction mode (CRM). It turns on MOSFET when the inductor current reaches zero and turns off MOSFET when the inductor current meets the desired input current reference voltage as shown below. Inductor Current Waveform In this way, the input current waveform follows that the input voltage, therefore a good factor is obtained. STARTUP OPERATION VDD is the power supply terminal for the RS6563. The startup resistor from the rectified high voltage DC rail supplies current to the VDD bypass capacitor. During startup, the RS6563 typically draws only lower than 70μA, so that VDD could be quickly charged up above UVLO threshold. A large value startup resistor can be used to minimize the power loss in standby mode. As soon as VDD is beyond the UVLO(OFF), the chip will begin to start. Operation current The Operation current of RS2253 is low at 2mA. Good efficient is achieved with RS2253 low operating current together with the ‘Extended burst mode’ control features. ERROR AMPLIFIER The sensed and divided output voltage is feedback to the error amplifier inverting input (INV). This voltage is compared to an internal reference voltage (2.5V) to set the regulation on output voltage. The EA output is internally connected to the multiplier input and externally connected for loop compensation. Generally, the system loop bandwidth is set below 20 Hz to suppress the AC ripple of the line voltage and get a good power factor. It is usually realized with a capacitor which connected between the inverting input and EA output. MULTIPLIER The one quadrant multiplier output limits the MOSFET peak current with respect of the system output voltage and the AC half wave rectified input voltage. Through controlling the CS comparator threshold as the AC line voltage traverses sinusoidally from zero to peak line voltage, the PFC pre‐regulator’s load appears to be resistive to the AC line. In RS6563, the two inputs for the multiplier are designed to achieve good linearity over a wide dynamic range to represent an AC line free from distortion. One is connected to an external resistor divider which monitors the rectified AC line voltage, the other one is internal driven by a DC voltage which is the difference between error amplifier output COMP and reference voltage, VREF. The equation (1) below describes the relationship between multiplier output and its inputs. Vm = K x VMULT x (VCOMP –Vref)……………….(1) K : Multiplier Gain V MULT : Voltage at Pin 3(MULT) V COMP : Error Amplifier Output Voltage (COMP) Vref : Internal 2.5V Reference Voltage V1.1 4 April 2015 RS6563 ZERO CURRENT DETECTION RS6563 operates as a critical conduction mode controller. It can perform zero current detection by using an auxiliary winding of the inductor. When the stored energy is fully released to the output, the voltage at ZCD will decrease. Once the inductor current reaches ground level, the polarity of the voltage across the winding is reversed. When the ZCD input falls below 1.4V, the zero current detector will be triggered to turn on the power MOSFET and start a new switching cycle. To prevent false tripping, 0.5V hysteresis is provided. The zero current detector input is protected internal by two clamps. The upper 5.7V clamp prevents input over voltage breakdown while the lower 0.65V clamp prevents substrate injection. CURRENT SENSING RS6563 detects primary MOSFET current from the CS pin, which is not only for the peak current mode control but also for the cycle‐bycycle current limit. The multiplier output voltage is compared with this sense voltage through an internal comparator to limit the inductor current. The maximum voltage threshold of the current sensing pin is set as 1.7V. Thus the MOSFET peak current can be calculated as: 1.7V Ipeak(max) = ……….(2) RS An internal RC filter is connected to the CS pin which smoothes the switch‐on current spike. The remaining switch‐on spike is blanked out via an internal leading edge blanking (LEB) circuit. Another extra function of LEB is that it limits the system minimum on time, thus the THD of system at light load will be decreased. PROTECTION CONTROLS A lot of good protections features have been implemented in RS6563 to prevent the power supply from being damaged caused by fault conditions. These protection features contains VCC under voltage lockout (UVLO), cycle‐by‐cycle current limiting, peak current limiting, output dynamic and static over‐voltage protection (OVP), and output gate clamp. OVER VOLTAGE PROTECTION Limited by low loop bandwidth setting, detection of output OVP could become very slow in regular approach. RS6563 offers two level OVP protection including dynamic OVP for output fast transient protection and static OVP for output stead‐state protection. In an output transient OVP event, currents in proportion to △V flows into Error Amplifier output COMP through compensation network. When this current reaches 32μA, the output of multiplier is forced to decrease and on‐time of MOSFET is reduced. When current continues to exceed 40μA, the power MOSFET is turned off until the current falls below 10μA. In this way, the system output cannot reach to a very high value. When OVP event lasts long enough, the Error Amplifier output, COMP, will saturate and stay low. Static OVP comparator is activated and power MOSFET Gate is off when COMP voltage is dropped below 2.30V. Normal operation is resumed when Error Amplifier goes back to its linear region after output voltage drops. V1.1 5 April 2015 RS6563 SYSTEM OPEN LOOP PROTECTION RS6563 offers a function of system open loop protection. If INV pin is below 0.25V with 50mV hysteresis, the switching will turn off. In this way, the system output voltage cannot increase too high (only the rectified line voltage), and the pre ‐regulator will be protected from damage. DISABLE FUNCTION A disable function is provided in RS6563. When the ZCD pin is below 0.25V，RS6563 is disabled and some internal functional blocks are tuned off. The operation current is very small under this condition until the ZCD pin is released. GATE DRIVE OUTPUT RS6563 contains a singe totem‐pole output stage designed specifically for a direct drive of power MOSFET. With a 1nF load, the rise time of the drive output is 80ns and the fall time is 30ns. The built‐in 16V clamp at the gate output protects the MOSFET gate from high voltage stress. V1.1 6 April 2015 RS6563 TYPICAL PERFORMANCE CHARACTERISTICS V1.1 7 April 2015 RS6563 ABSOLUTE MAXIMUM RATINGS Parameter DC Supply Voltage Zero Current Detector Max. Current Analog Inputs & Outputs Min/Max Operating Junction Temperature Min/Max Storage Temperature (Soldering, 10secs) Symbol VCC IZCD CS INV COMP MULT TJ TSTG Lead Temperature Ratings 30 50mA (source), ‐10mA (sink) ‐0.3 to 7.0 ‐20 to 150 ‐40 to +150 260 Unit V mA V o C o C o C ELECTRICAL CHARACTERISTICS TA=25°C, VDD=16V, unless otherwise specified Parameter Symbol Supply Voltage Section Operating Range VCC Turn‐on threshold UVLO Turn‐off threshold Hysterics Hys Zener Voltage VZ Supply Current Section Start‐up Current ICC‐START Quiescent Current, No switching IQ Operating Supply Current ICC Quiescent Current IQ Error Amplifier Section Voltage Feed‐ back input threshold Line Regulation Input Bias Current Voltage Gain Gain Bandwidth Source Current Sin Current Upper Clamp Voltage Lower Clamp Voltage Multiplier Section Linear Operating Range Output Max. Slope Gain Current Sense Comparator Current Sense Reference Clamp Input Bias Current Delay to Output Zero Current Detector Input Threshold Voltage Rising Edge Hysteretic Upper Clamp voltage Lower Clamp voltage Input Bias Current Source Current Capability Sink Current After Disable V1.1 VINV VINV IINV GV Gd Icomp Vcomp Vmult ΔVCS/ ΔVmult K VCS ICS TD(H‐L) Vzcd Vzcd Vzcd Izcd Izcd Izcd Test Conditions After Turn On Icc=5mA VCC=11V VCC=14.5V CL=1nF@70KHz In OVP condition Vpin1=2.7V Vpin5≤150mV, VCC=14.5V Vpin5≤150mV, VCC<VCC off VCC=14.5V 12V<VCC<28V IDD=10mA Open loop VCOMP=3.6V, VINV=2.4V VCOMP=3.6V, VINV=2.6V ISOURCE=0.5mA ISINK=0.2mA VCOMP=3.0V Vmult=from 0 to 0.5V VCOMP=Upper clamp Voltage Vmult=1V, VCOMP=3.5V Vmult=2.5V VCOMP=Upper Clamp Voltage VCS=0 Izcd=2.5mA Izcd=2.5mA 1.0V≤Vzcd≤4.5V - 8 Min Typ. Max Unit Pin 11 11 8.5 30 12 9.5 2.5 33 30 13 10.5 36 V V V V V 8 8 8 8 8 - 35 3 4 1.4 1.1 35 70 4 5.5 2.1 2.1 70 μA mA mA mA mA μA 8 8 2.45 60 -2 2 - 2.50 2 -0.1 80 1.2 -6 6 5.2 2.25 2.55 5 -1 10 10 - V mV μA dB MHz mA mA V V 1 1 1 - 0 - 3.5 V 3 1.65 1.9 - V/V - 0.5 0.65 0.8 1/V 1.6 1.7 1.8 V 4 - 200 0.1 450 μA ns 4 4 0.3 5.1 0.4 -3 3 1.9 0.5 5.7 0.65 2 - 0.7 6.3 0.8 -10 10 V V V V μA mA mA 5 8 8 2 2 5 5 5 5 5 April 2015 RS6563 Parameter Symbol Disable Threshold Vdis Restart Current after Disable Izcd Gate Drive Section Low Output Voltage VOL High Output Voltage VOH Rising Time TR Falling Time TF Output Clamp Voltage VOCLAMP Output Over Voltage Section Dynamic OVP Triggering Current IOVP Static OVP Threshold Startup Timer Re‐Start Timer Period TSTART System Open Loop Protection Comparator System Open Loop Protection VTH‐OL Comparator Threshold V1.1 Test Conditions Vzcd<Vides, Vcc>Vccoff Min 150 -100 Typ. 250 -200 Max 350 -400 Unit mV μA Pin 5 5 VCC=14.5V, IO=100mA VCC=14.5V, IO=100mA C1=1000pf,10 to 90% C1=1000pf,10 to 90% VCC=28V 8 - 80 30 16 1.5 150 70 18 V V ns ns V 7 7 7 7 7 - - 40 2.3 - μA V 2 - - 70 150 300 μS - - - 250 - mV - 9 April 2015 RS6563 PACKAGE INFORMATION 8-PIN, SOP Notes: 1. All units are in millimeter 2. Refer to JEDEC MS‐012 variation AA. V1.1 10 April 2015 RS6563 8 PINS, DIP Notes:. 1. All dimensions are in millimeters. 2. Refer to JEDEC MS‐001 V1.1 11 April 2015 RS6563 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.1 12 April 2015