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Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics. DATA SHEET MOS FIELD EFFECT TRANSISTOR NP82N04PDG SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION The NP82N04PDG is N-channel MOS Field Effect Transistor designed for high current switching applications. ORDERING INFORMATION PART NUMBER LEAD PLATING NP82N04PDG-E1-AY Pure Sn (Tin) NP82N04PDG-E2-AY PACKING PACKAGE Tape TO-263 (MP-25ZP) 800 p/reel typ. 1.5 g FEATURES (TO-263) • Super low on-state resistance RDS(on)1 = 3.5 mΩ MAX. (VGS = 10 V, ID = 41 A) RDS(on)2 = 8.0 mΩ MAX. (VGS = 4.5 V, ID = 41 A) • Low Ciss Ciss = 6000 pF TYP. ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) VDSS 40 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) (TC = 25°C) ID(DC) ±82 A ID(pulse) ±328 A Total Power Dissipation (TC = 25°C) PT1 143 W Total Power Dissipation (TA = 25°C) PT2 1.8 W Channel Temperature Tch 175 °C Tstg −55 to +175 °C IAR 43 A Drain Current (pulse) Note1 Storage Temperature Repetitive Avalanche Current Note2 Note2 Repetitive Avalanche Energy 185 EAR Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Tch ≤ 150°C, VDD = 20 V, RG = 25 Ω, VGS = 20 → 0 V mJ THERMAL RESISTANCE Channel to Case Thermal Resistance Rth(ch-C) 1.05 °C/W Channel to Ambient Thermal Resistance Rth(ch-A) 83.3 °C/W The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. D18396EJ1V0DS00 (1st edition) Date Published September 2006 NS CP(K) Printed in Japan 2006 NP82N04PDG ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 40 V, VGS = 0 V 1 μA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±100 nA Gate to Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 1.4 1.8 2.5 V Forward Transfer Admittance | yfs | VDS = 10 V, ID = 41 A 20 47 RDS(on)1 VGS = 10 V, ID = 41 A 2.9 3.5 mΩ RDS(on)2 VGS = 4.5 V, ID = 41 A 4.1 8.0 mΩ Drain to Source On-state Resistance S Input Capacitance Ciss VDS = 25 V 6000 9000 pF Output Capacitance Coss VGS = 0 V 580 870 pF Reverse Transfer Capacitance Crss f = 1 MHz 370 670 pF Turn-on Delay Time td(on) VDD = 20 V, ID = 41 A 26 60 ns VGS = 10 V 68 170 ns RG = 0 Ω 73 150 ns 11 30 ns 150 nC Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = 32 V 100 Gate to Source Charge QGS VGS = 10 V 19 nC Gate to Drain Charge QGD ID = 82 A 32 nC VF(S-D) IF = 82 A, VGS = 0 V 0.9 Reverse Recovery Time trr IF = 82 A, VGS = 0 V 43 ns Reverse Recovery Charge Qrr di/dt = 100 A/μs 47 nC Body Diode Forward Voltage TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω PG. VGS = 20 → 0 V 1.5 RL RG PG. VDD VGS VGS Wave Form 0 VGS 10% 90% VDD VDS 90% IAS VDS ID VDS τ τ = 1 μs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 2 50 Ω 0 10% 10% tr td(off) Wave Form VDD Starting Tch 90% VDS VGS 0 BVDSS RL VDD Data Sheet D18396EJ1V0DS td(on) ton tf toff NP82N04PDG TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 160 100 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 80 60 40 20 140 120 100 80 60 40 20 0 0 0 25 50 75 100 125 150 0 175 25 50 75 100 125 150 175 TC - Case Temperature - °C TC - Case Temperature - °C FORWARD BIAS SAFE OPERATING AREA 1000 ID(Pulse) 100 μs 100 ID(DC) 1 ms 10 ms 10 DC 1 Power Dissipation Limited TC = 25°C Single pulse 0.1 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 100 rth(t) - Transient Thermal Resistance - °C/W ID - Drain Current - A RDS(on) Limited (at VGS = 10 V) Rth(ch-A) = 83.3 °C/W 10 1 Rth(ch-C) = 1.05 °C/W 0.1 Single pulse 0.01 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet D18396EJ1V0DS 3 NP82N04PDG DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 400 1000 VDS = 10 V Pulsed 300 ID - Drain Current - A ID - Drain Current - A 100 VGS = 10 V 200 4.5 V 100 TA = 85°C 125°C 150°C 10 1 175°C −55°C −25°C 25°C 0.1 0.01 Pulsed 0.001 0 0 0.5 1 1.5 0 2 GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE 2.0 1.5 1.0 VDS = VGS ID = 250 μA 0.0 0 100 TA = −55°C −25°C 25°C 85°C 1 0.1 1 6 5 VGS = 4.5 V 3 10 V 1 0 1 10 100 ID - Drain Current - A 10 100 1000 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ 4 125°C 150°C 175°C 10 ID - Drain Current - A Pulsed 2 5 VDS = 10 V Pulsed 0.1 200 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 4 4 100 Tch - Channel Temperature - °C 7 3 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT | yfs | - Forward Transfer Admittance - S VGS(th) - Gate to Source Threshold Voltage - V 2.5 -100 2 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V 0.5 1 Data Sheet D18396EJ1V0DS 7 ID = 82 A 6 41 A 5 4 3 2 16.4 A 1 Pulsed 0 0 5 10 15 VGS - Gate to Source Voltage - V 20 NP82N04PDG CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 8 ID = 41 A Pulsed 6 VGS = 4.5 V 5 4 10 V 3 2 1 0 -100 Ciss 1000 0 50 100 150 0.1 200 Tch - Channel Temperature - °C 1 10 100 VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS 40 VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns Crss VGS = 0 V f = 1 MHz 100 -50 1000 td(off) 100 td(on) tr 10 tf VDD = 20 V VGS = 10 V RG = 0 Ω 1 12 VDD = 32 V 20 V 8V 30 10 8 20 6 VGS 4 10 2 VDS ID = 82 A 0 0.1 1 10 100 0 20 40 60 80 100 0 120 QG - Gate Charge - nC ID - Drain Current - A SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 100 1000 100 trr - Reverse Recovery Time - ns VGS = 10 V IF - Diode Forward Current - A Coss 4.5 V 10 0V 1 0.1 di/dt = 100 A/μs VGS = 0 V Pulsed 0.01 10 0 0.5 1 1.5 VF(S-D) - Source to Drain Voltage - V 0.1 1 10 100 IF - Diode Forward Current - A Data Sheet D18396EJ1V0DS 5 VGS - Gate to Source Voltage - V 7 Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE NP82N04PDG PACKAGE DRAWING (Unit: mm) 10.0 ±0.3 7.88 MIN. 4.45 ±0.2 1.3 ±0.2 0.5 9.15 ±0.3 8.0 TYP. 4 15.25 ±0.5 No plating 1.35 ±0.3 TO-263 (MP-25ZP) 0.025 to 0.25 .2 0 to 8 ˚ 0.25 1 2 3 2.5 2.54 1. Gate 2. Drain 3. Source 4. Fin (Drain) 2.54 ±0.25 0.6 ±0 0.75 ±0.2 EQUIVALENT CIRCUIT Drain Body Diode Gate Source Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. 6 Data Sheet D18396EJ1V0DS NP82N04PDG TAPE INFORMATION There are two types (-E1, -E2) of taping depending on the direction of the device. Draw-out side Reel side MARKING INFORMATION NEC 82N04 DG Pb-free plating marking Abbreviation of part number Lot code RECOMMENDED SOLDERING CONDITIONS The NP82N04PDG should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, please contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Soldering Method Infrared reflow Soldering Conditions Maximum temperature (Package's surface temperature): 260°C or below Recommended Condition Symbol IR60-00-3 Time at maximum temperature: 10 seconds or less Time of temperature higher than 220°C: 60 seconds or less Preheating time at 160 to 180°C: 60 to 120 seconds Maximum number of reflow processes: 3 times Maximum chlorine content of rosin flux (percentage mass): 0.2% or less Partial heating Maximum temperature (Pin temperature): 350°C or below P350 Time (per side of the device): 3 seconds or less Maximum chlorine content of rosin flux: 0.2% (wt.) or less Caution Do not use different soldering methods together (except for partial heating). Data Sheet D18396EJ1V0DS 7 NP82N04PDG • The information in this document is current as of September, 2006. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. • NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. • While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. 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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1