Application Note - Renesas Electronics

To our customers,
Old Company Name in Catalogs and Other Documents
On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
Renesas Electronics website: http://www.renesas.com
April 1st, 2010
Renesas Electronics Corporation
Issued by: Renesas Electronics Corporation (http://www.renesas.com)
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Notice
1.
2.
3.
4.
5.
6.
7.
All information included in this document is current as of the date this document is issued. Such information, however, is
subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please
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“Standard”:
8.
9.
10.
11.
12.
Computers; office equipment; communications equipment; test and measurement equipment; audio and visual
equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots.
“High Quality”: Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anticrime systems; safety equipment; and medical equipment not specifically designed for life support.
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Application Note
Triplex LCD Driver
Using General Purpose Ports
of µPD7801x
Document No. U17107EE1V0AN00
Date Published April 2004
 NEC Corporation 2004
Printed in Germany
NOTES FOR CMOS DEVICES
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2
HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
2
Application Note U17107EE1V0AN00
•
The information in this document is current as of 07.04, 2004. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
•
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that
may appear in this document.
•
NEC Electronics does not assume any liability for infringement of patents, copyrights or other
intellectual property rights of third parties by or arising from the use of NEC Electronics products
listed in this document or any other liability arising from the use of such NEC Electronics products.
No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual
property rights of NEC Electronics or others.
•
Descriptions of circuits, software and other related information in this document are provided for
illustrative purposes in semiconductor product operation and application examples. The incorporation
of these circuits, software and information in the design of customer's equipment shall be done
under the full responsibility of customer. NEC Electronics no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
•
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics
products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated
entirely. To minimize risks of damage to property or injury (including death) to persons arising from
defects in NEC Electronics products, customers must incorporate sufficient safety measures in their
design, such as redundancy, fire-containment and anti-failure features.
•
NEC Electronics products are classified into the following three quality grades: “Standard”, “Special”
and “Specific”.
The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated “quality assurance program” for a specific application. The recommended applications of
NEC Electronics product depend on its quality grade, as indicated below. Customers must check the
quality grade of each NEC Electronics product before using it in a particular application.
"Standard":
Computers, office equipment, communications equipment, test and measurement
equipment, audio and visual equipment, home electronic appliances, machine tools,
personal electronic equipment and industrial robots.
"Special":
Transportation equipment (automobiles, trains, ships, etc.), traffic control systems,
anti-disaster systems, anti-crime systems, safety equipment and medical equipment
(not specifically designed for life support).
"Specific":
Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems,
life support systems and medical equipment for life support, etc.
The quality grade of NEC Electronics products is “Standard” unless otherwise expressly specified in
NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in
applications not intended by NEC Electronics, they must contact NEC Electronics sales representative
in advance to determine NEC Electronics 's willingness to support a given application.
Notes:
1.
" NEC Electronics" as used in this statement means NEC Electronics Corporation and
also includes its majority-owned subsidiaries.
2.
" NEC Electronics products" means any product developed or manufactured by or for
NEC Electronics (as defined above).
M8E 02.10
Application Note U17107EE1V0AN00
3
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
product in your application, please contact the NEC office in your country to obtain a list of authorized
representatives and distributors. They will verify:
•
Device availability
•
Ordering information
•
Product release schedule
•
Availability of related technical literature
•
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
NEC Electronics America Inc.
Santa Clara, California
Tel: 408-588-6000
800-366-9782
Fax: 408-588-6130
800-729-9288
NEC Electronics (Europe) GmbH
Duesseldorf, Germany
Tel: 0211-65 03 1101
Fax: 0211-65 03 1327
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Succursale Française
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Tel: 01-30-67 58 00
Fax: 01-30-67 58 99
4
Filiale Italiana
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Tel: 02-66 75 41
Fax: 02-66 75 42 99
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Hong Kong
Tel: 2886-9318
Fax: 2886-9022/9044
Branch The Netherlands
Eindhoven, The Netherlands
Tel: 040-244 58 45
Fax: 040-244 45 80
NEC Electronics Hong Kong Ltd.
Seoul Branch
Seoul, Korea
Tel: 02-528-0303
Fax: 02-528-4411
Branch Sweden
Taeby, Sweden
Tel: 08-63 80 820
Fax: 08-63 80 388
United Kingdom Branch
Milton Keynes, UK
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Fax: 01908-670-290
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Singapore
Tel: 65-6253-8311
Fax: 65-6250-3583
NEC Electronics Taiwan Ltd.
Taipei, Taiwan
Tel: 02-2719-2377
Fax: 02-2719-5951
Application Note U17107EE1V0AN00
Table of Contents
Chapter 1
1.1
1.2
Chapter 2
2.1
Program Flowcharts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Initialisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Interrupt-Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2.1
Dispatcher. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2.2
Phase 1 (COM11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2.3
Phase 2 (COM12). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2.4
Phase 3 (COM21). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2.5
Phase 4 (COM22). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.6
Phase 5 (COM31). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.7
Phase 6 (COM32). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chapter 4
4.1
4.2
Hardware Realisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Pin/Segment Organisation for a 9 × 3 Segment Triplex LCD-Display . . . . . . . . . . . . 11
2.1.1
Relation LCD-Segments and Display-RAM of CPU . . . . . . . . . . . . . . . . . . . . . . 11
2.1.2
Segment example for an LCD-Glass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Chapter 3
3.1
3.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Differences to a common LCD Controller/Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Example Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Listing 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Circuit Diagram for the Example Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Application Note U17107EE1V0AN00
5
List of Figures
Figure 2-1:
Figure 2-2:
Figure 3-1:
Figure 3-2:
Figure 3-3:
Figure 3-4:
Figure 3-5:
Figure 3-6:
Figure 3-7:
Figure 3-8:
Figure 4-1:
6
Principle Circuit Diagram ............................................................................................. 13
Timing Example........................................................................................................... 14
Initialisation Flow ......................................................................................................... 15
Dispatcher Flow........................................................................................................... 16
Phase 1 (COM11) Flow ............................................................................................... 16
Phase 2 (COM12) Flow ............................................................................................... 17
Phase 3 (COM21) Flow ............................................................................................... 17
Phase 4 (COM22) Flow ............................................................................................... 18
Phase 5 (COM31) Flow ............................................................................................... 18
Phase 6 (COM32) Flow ............................................................................................... 19
Circuit Diagram............................................................................................................ 27
Application Note U17107EE1V0AN00
List of Tables
Table 2-1:
Table 2-2:
Table 2-3:
Pin/Segment Organisation.............................................................................................. 11
Relation LCD-Segments and Display-RAM of CPU ....................................................... 11
Segment Example for an LCD-Glass ............................................................................. 12
Application Note U17107EE1V0AN00
7
8
Application Note U17107EE1V0AN00
Chapter 1 Features
1.1 Introduction
There are a lot of applications existing, only a small display is necessary.
The connection of a “Static” display type is very easy, because there are only two voltage levels (VDD &
VSS) to control as well on common as on segments lines.
But for a multiplexed display type (“Duplex” or “Triplex”) several intermediate voltage levels have to be
controlled.
Hereafter the control of a “Triplex” LCD module is described using the µPD78P014. This application
note is adaptable to all devices out of the µCOM 78K0 family.
1.2 Differences to a common LCD Controller/Driver
1.
The different LCD-Voltage levels, needed for the common lines of an Triplex-LCD Display are generated using external resistor networks and the tri-state function of the µPD78P014 port structure.
This gives a disadvantage of 4 resistors against a similar solution using a common LCD controller/
driver product like the NEC µPD7225.
2.
Using a common LCD Controller/Driver the LCD voltage can be vary over a wide range and can
be adopted easy to the LCD display. In the solution described hereafter the LCD-Voltage is fixed to
the VDD level of the general purpose CPU.
Application Note U17107EE1V0AN00
9
[MEMO]
10
Application Note U17107EE1V0AN00
Chapter 2 Hardware Realisation
2.1 Pin/Segment Organisation for a 9 × 3 Segment Triplex LCD-Display
In the table below the connection of an 9 × 3 Triplex-Mode LCD display to port pins of the µPD78P014
are listed:
Table 2-1:
Pin/Segment Organisation
PORT / PIN
SEGMENT
Description
P5.0 / Pin 26
S0
Segment Line 0
P5.1 / Pin 27
S1
Segment Line 1
P5.2 / Pin 28
S2
Segment Line 2
P5.3 / Pin 29
S3
Segment Line 3
P5.4 / Pin 30
S4
Segment Line 4
P5.5 / Pin 31
S5
Segment Line 5
P5.6 / Pin 33
S6
Segment Line 6
P5.7 / Pin 34
S7
Segment Line 7
P6.7 / Pin 42
S8
Segment Line 8
P6.4 / Pin 39
COM1 (C1)
COMMON Line 1
P6.5 / Pin 40
COM2 (C2)
COMMON Line 2
P6.6 / Pin 41
COM3 (C3)
COMMON Line 3
2.1.1 Relation LCD-Segments and Display-RAM of CPU
Table 2-2:
Relation LCD-Segments and Display-RAM of CPU
SEGMENT
COM1 (C1)
COM2 (C2)
COM3 (C3)
S0
FADA.0
FADC.0
FADE.0
S1
FADA.1
FADC.1
FADE.1
S2
FADA.2
FADC.2
FADE.2
S3
FADA.3
FADC.3
FADE.3
S4
FADA.4
FADC.4
FADE.4
S5
FADA.5
FADC.5
FADE.5
S6
FADA.6
FADC.6
FADE.6
S7
FADA.7
FADC.7
FADE.7
S8
FADB.0
FADD.0
FADF.0
Application Note U17107EE1V0AN00
11
Chapter 2
Hardware Realisation
2.1.2 Segment example for an LCD-Glass
Table 2-3:
12
Segment Example for an LCD-Glass
Address
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
FADA
S0-C1
(2A)
S1-C1
(1B)
S2-C1
(2B)
S3-C1
(unused)
S4-C1
(3A)
S5-C1
(4A)
S6-C1
(4F)
S7-C1
(unused)
FADB
S8-C1
(3B)
FADC
S0-C2
(2F)
S1-C2
(1ADEG)
S2-C2
(2G)
S3-C2
(2C)
S4-C2
(3F)
S5-C2
(4B)
S6-C2
(4G)
S7-C2
(3C)
FADD
S8-C2
(3G)
FADE
S0-C3
(2E)
S1-C3
(1C)
S2-C3
(2D)
S3-C3
(P1)
S4-C3
(3E)
S5-C3
(4C)
S6-C3
(4D)
S7-C3
(4E)
FADF
S8-C3
(3D)
Application Note U17107EE1V0AN00
Chapter 2
Figure 2-1:
Hardware Realisation
Principle Circuit Diagram
VDD
Px. a
R
R
R
Px.b
VDD
Px.c
COM3
VDD
COM2
R
R
COM1
R
General
Purpose
Microcontroller
Pin 1 Pin 6 Pin 12
Py.i
Py.h
Py.g
Py.f
Py.e
Py.d
Py.c
Py.b
Py.a
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
Application Note U17107EE1V0AN00
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
11
10
9
8
7
5
4
3
2
LCD
GLASS
13
Chapter 2
Hardware Realisation
Figure 2-2:
Timing Example
T-Frame
INT(timer)
COM1
T-Phase
VDD
VDD/2
VSS
COM2
VDD
VDD/2
VSS
COM3
VDD
VDD/2
VSS
Sn
VDD
VDD/2
VSS
COM1-Sn
COM2-Sn
COM3-Sn
VDD
VDD/2
VSS
-VDD/2
-VDD
VDD
VDD/2
VSS
-VDD/2
-VDD
VDD
VDD/2
VSS
-VDD/2
-VDD
Setup
Disp.
14
Phase 0 Phase 1 Phase 2 Phase 3 Phase 4 Phase 5 Phase 0 Phase 1 Phase 2 Phase 3 Phase 4 Phase 5
Sn(1) = 0
Sn(2) = 1
Sn(3) = 1
Sn(1) = 0
Application Note U17107EE1V0AN00
Sn(2) = 1
Sn(3) = 1
Chapter 3 Program Flowcharts
3.1 Initialisation
Figure 3-1:
Initialisation Flow
Initialize LCD
init_LCD
Clear Display Memory
Clear Timer INT-Flag
Set Timer Mask-Flag
Setup Timer (t = 8ms)
Initialize ports for LCD
Port 5.x outputs low
Port 6.7 output low
Port 6.4 to 6.5 input
Initialize Branch Register
(AX, Bank 3) for LCD control
Enable Master Interrupt
RET
Application Note U17107EE1V0AN00
15
Chapter 3
Program Flowcharts
3.2 Interrupt-Handler
3.2.1 Dispatcher
Figure 3-2:
Dispatcher Flow
Timer-Int
(LCD_isr)
Called every 8 ms by
timer
Jump (AX) to
next Phase
COM11
COM12
COM21
COM22
COM31
COM32
3.2.2 Phase 1 (COM11)
Figure 3-3:
Phase 1 (COM11) Flow
COM11
Phase 1 of LCD
Interrupt Routine
COM3 = VDD/2
(P6.6 Input -> PM6.6 = 1)
COM1 Data to Ports
(S0[1]...S7[1] to P5, S8[1] to P6.7)
COM1 = VSS
(P6.4 Output, Low -> PM6.4 = 0)
Prepare Branch Register for next
Phase
(AX = #COM12)
End of Interrupt
16
Application Note U17107EE1V0AN00
Chapter 3 Program Flowcharts
3.2.3 Phase 2 (COM12)
Figure 3-4:
Phase 2 (COM12) Flow
COM12
Phase 2 of LCD
Interrupt Routine
Invert COM1 Data at Ports
(S0[1]...S7[1] at P5, S8[1] at P6.7)
COM1 = VDD
(P6.4 Output, High)
Prepare Branch Register for next
Phase
(AX = #COM21)
End of Interrupt
3.2.4 Phase 3 (COM21)
Figure 3-5:
Phase 3 (COM21) Flow
COM21
Phase 3 of LCD
Interrupt Routine
COM1 = VDD/2
(P6.4 Input -> PM6.4 = 1)
COM2 Data to Ports
(S0[2]...S7[2] to P5, S8[2] to P6.7)
COM2 = VSS
(P6.5 Output, Low -> PM6.5 = 0)
Prepare Branch Register for next
Phase
(AX = #COM22)
End of Interrupt
Application Note U17107EE1V0AN00
17
Chapter 3
Program Flowcharts
3.2.5 Phase 4 (COM22)
Figure 3-6:
Phase 4 (COM22) Flow
COM22
Phase 4 of LCD
Interrupt Routine
Invert COM2 Data at Ports
(S0[2]...S7[2] at P5, S8[2] at P6.7)
COM2 = VDD
(P6.5 Output, High)
Prepare Branch Register for next
Phase
(AX = #COM31)
End of Interrupt
3.2.6 Phase 5 (COM31)
Figure 3-7:
Phase 5 (COM31) Flow
COM31
Phase 5 of LCD
Interrupt Routine
COM2 = VDD/2
(P6.5 Input -> PM6.5 = 1)
COM3 Data to Ports
(S0[3]...S7[3] to P5, S8[3] to P6.7)
COM3 = VSS
(P6.6 Output, Low -> PM6.6 = 0)
Prepare Branch Register for next
Phase
(AX = #COM32)
End of Interrupt
18
Application Note U17107EE1V0AN00
Chapter 3 Program Flowcharts
3.2.7 Phase 6 (COM32)
Figure 3-8:
Phase 6 (COM32) Flow
COM32
Phase 6 of LCD
Interrupt Routine
Invert COM3 Data at Ports
(S0[3]...S7[3] at P5, S8[3] at P6.7)
COM3 = VDD
(P6.6 Output, High)
Prepare Branch Register for next
Phase
(AX = #COM11)
End of Interrupt
Application Note U17107EE1V0AN00
19
[MEMO]
20
Application Note U17107EE1V0AN00
Chapter 4 Example Program
4.1 Listing 1
name
TriplexLCD;TRIPLLCD.ASM
L. Lenzen, December 1995.
;
L. Lenzen, January 1995.
;* Program to control the uPD78014 in a demo system which realizes an
;* triplex LCD driver/controller by standard tri-sate ports.
;* The timing of the LCD C/D service routine is critical.
;* The trigger signal is generated by TIMER3 every 15ms (@8.38MHz), which
;* is out experience of LCD C/D specialists the best compromise between CPU
;* load and LCD display contrast.
;*
;* N O T E:
;* all timings are based on a 8.38 MHz crystal (default type of IE-78000-R)
;* if a other oscillator frequency is used, the settings must be adopted.
;* As an example the alternative values for a 10 MHz oscillator frequency
;* are added as comment.
;*
;* To realize the three voltage levels, an external resistor circuitry is
;* connected to each COM line (value R depends on LCD glass current)
;*
COMn
;*
o
;*
|
;*
VDD o---[R]---o---[R]---o VSS
;*
|
;*
to LCD
;*
;* The purpose of the program is to show that a triplex LCD glass can be
;* controlled by a standard general purpose CPU.
;* The realized LCD Controller/Driver is a so called Dot-Matrix Driver,
;* means each segment-common line combination (a dot) can be separately
;* controlled. It also means that a character generator must be realized by
;* the user software.
;*
;* In this program a 3x9 LCD glass is assumed (thus 3 * 9 = 27 dots).
;* The Common/Segment Lines are organized related to display memory as
;* follows:
;*
;*
| SEG0 | SEG1 | SEG2 | SEG3 | SEG4 | SEG5 | SEG6 | SEG7 | SEG8 |
;*
| P5.0 | P5.1 | P5.2 | P5.3 | P5.4 | P5.5 | P5.6 | P5.7 | P6.7 |
;* -----+-------+-------+-------+-------+-------+-------+-------+-------+-------+
;* COM1 |
FADA
| FADB |
;* P6.4 | Bit 0 | Bit 1 | Bit 2 | Bit 3 | Bit 4 | Bit 5 | Bit 6 | Bit 7 | Bit 0 |
;* -----+-------+-------+-------+-------+-------+-------+-------+-------+-------+
;* COM2 |
FADC
| FADD |
;* P6.5 | Bit 0 | Bit 1 | Bit 2 | Bit 3 | Bit 4 | Bit 5 | Bit 6 | Bit 7 | Bit 0 |
;* -----+-------+-------+-------+-------+-------+-------+-------+-------+-------+
;* COM3 |
FADE
| FADF |
;* P6.6 | Bit 0 | Bit 1 | Bit 2 | Bit 3 | Bit 4 | Bit 5 | Bit 6 | Bit 7 | Bit 0 |
;* -----+-------+-------+-------+-------+-------+-------+-------+-------+-------+
;*
;* The Interrupt Service Routine occupies register pair xa of Register Bank 3.
;* This register pair may not be used for other purposes than to control
;* the LCD routine.
Application Note U17107EE1V0AN00
21
Chapter 4
Example Program
Listing 1 (cont.)
p78P014
;Processor type
PUBLIC V_TABLE
RSEG
INTVEC
; absolute definition of vectors
; Vector Area Start
V_TABLE:
DW
start; at 0000h Reset vector
DW dummy
DW dummy
DW dummy
DW dummy
DW dummy
DW dummy
DW dummy
DW dummy
DW LCD_isr ; at 0012h INTTM3 vector (LCD Frame timing)
dummy:
reti
Display EQU
0FADAh
; memory buffer for LCD display data
public start
public init_LCD, LCD_clr
;-----------------------------------------------------------------------;
Basic Initialization (must be done before program start)
;-----------------------------------------------------------------------rseg
RCODE
start:
movw
sp,#0fee0h
;set stack pointer
sel
rb0
;register bank 0 for main program
mov
PCC,#00h
; -----0-CPU clock at full speed
;-----------------------------------------------------------------------;
Clear CPU RAM area (just an option, only for security)
;-----------------------------------------------------------------------ram_clr:
mov
a,#0
;clear ram from FB00 to FEDF
movw
hl,#0FE00h
mov
b,#0DFh
clr1:
mov
[hl+b],a
dbnz
b,clr1
mov
[hl+b],a
mov
c,#3
clr2:
dec
h
clr3:
mov
[hl+b],a
dbnz
b,clr3
dbnz
c,clr2
22
Application Note U17107EE1V0AN00
Chapter 4
Example Program
Listing 1 (cont.)
;-----------------------------------------------------------------------;
Initialize System
;-----------------------------------------------------------------------mov MM,#01h
;--00---;-----001
;00--0---
;Memory expansion mode for normal port
; no wait
; single chip mode
; fixed to zero
call
init_LCD
;Initialize LCD C/D
;-----------------------------------------------------------------------;
start of MAIN Loop
publicloop
loop:
;
;
end of MAIN Loop
;-----------------------------------------------------------------------;-----------------------------------------------------------------------;
Initialization of LCD Controller / Driver
; Based on Interval-Timer TM3 (so can operate with main or subsystem
; oscillator to enable also operation in standby modes)
;-----------------------------------------------------------------------init_LCD:
;---------------------------------------------------------------;
Clear the LCD Display Memory
;---------------------------------------------------------------callLCD_clr ;clear display memory
;
;---------------------------------------------------------------;
Initialize the Timer TM3 for LCD Frame-Timing
;---------------------------------------------------------------clr1
MK0L.7
; enable interrupt
clr1
PR0L.7
; high priority
clr1
IF0L.7
; clear request bit
;
;setup timer mode register for ca. 15ms (< 20ms)
;for subsystem clock
32.768KHz -> TMC2 = 52h, TCL24 = 1 (15.6ms)
;for main system clock 8.38 MHz -> TMC2 = 52h, TCL24 = 0 (15.6ms)
;for main system clock 10.00 MHz -> TMC2 = 52h, TCL24 = 0 (13.1ms)
;for main system clock 4.19 MHz -> TMC2 = 42h, TCL24 = 0 (15.6ms)
mov TMC2,#12h
; Interval Timer
;-101.---; 512/fw (fw = 32.768KHz)
;----.-1-; start / enable
;0---.x-xx
; don¦t care
;
Application Note U17107EE1V0AN00
23
Chapter 4
Example Program
Listing 1 (cont.)
;---------------------------------------------------------------;
Initialize the Branch Vector Register (RB3.AX)
;---------------------------------------------------------------mov P5,#0
; clear all segment drivers
clr1P6.7
;
;
mov PM5,#0 ; all segment lines are output
clr1PM6.7 ;
;
set1PM6.4 ; all common lines to VDD/2
set1PM6.5 ;
set1PM6.6 ;
;
clr1P6.4
; prepare COM1 data
;
sel RB3
; prepare AX(3) for first LCD service process
movwax,#COM11;
sel RB0
;
;
;---------------------------------------------------------------;
Enable Interrupts
;---------------------------------------------------------------ei
; now we can enable interrupts
ret
; exit
;
;-----------------------------------------------------------------------;
;
Clear the LCD C/D Display memory (<=> LCD off)
;
;-----------------------------------------------------------------------LCD_clr:
mov
a,#0
;clear LCD RAM from FADA to FADF
movw
hl,#Display
;base address
mov
c,#05h
;number of bytes + 1
lcd_clr1:
mov
[hl+c],a;
dbnz
c,lcd_clr1;
mov
[hl+c],a;
ret
; exit
;
;-----------------------------------------------------------------------;
;
Frame-Interrupt Service (called every 15ms)
;
;-----------------------------------------------------------------------publicLCD_isr, COM11, COM12, COM21, COM22, COM31, COM32
LCD_isr:
sel RB3
EI
br ax
24
;select LCD Register Bank
;all interrupts except ADC interrupt
; jump to actual process
;
Application Note U17107EE1V0AN00
Chapter 4
Example Program
Listing 1 (cont.)
;---------------------------------------------------------------;
LCD Service Process for 1. frame
;---------------------------------------------------------------COM11:
set1PM6.6 ;COM3 to VDD/2
mov a,0FADAh;S0(0) - S7(0) to P5
mov P5,a
;
mov a,0FADBh;S8(0) to P6.7
rorca,1
;
mov1P6.7,cy ;
clr1P6.4
;prepare COM1 for VSS
clr1PM6.4 ;COM1 to VSS
;----------------------------------------------; prepare LCD Service Process for 2. frame
;----------------------------------------------movwax,#COM12;
reti
;
;---------------------------------------------------------------;
LCD Service Process for 2. frame
;---------------------------------------------------------------COM12:
mov a,P5
;invert S0(0) - S7(0)
xor a,#0FFh ;
mov P5,a
;
mov1cy,P6.7 ;invert S8(0)
not1cy
;
mov1P6.7,cy ;
set1P6.4
;COM1 to VDD
;----------------------------------------------; prepare LCD Service Process for 3. frame
;----------------------------------------------movwax,#COM21;
reti
;
;---------------------------------------------------------------;
LCD Service Process for 3. frame
;---------------------------------------------------------------COM21:
set1PM6.4 ;COM1 to VDD/2
mov a,0FADCh;S0(1) - S7(1) to P5
mov P5,a
;
mov a,0FADDh;S8(1) to P6.7
rorca,1
;
mov1P6.7,cy ;
clr1P6.5
;prepare COM2 for VSS
clr1PM6.5 ;COM2 to VSS
;----------------------------------------------; prepare LCD Service Process for 4. frame
;----------------------------------------------movwax,#COM22;
reti
;
Application Note U17107EE1V0AN00
25
Chapter 4
Example Program
Listing 1 (cont.)
;---------------------------------------------------------------;
LCD Service Process for 4. frame
;---------------------------------------------------------------COM22:
mov a,P5
;invert S0(1) - S7(1)
xor a,#0FFh ;
mov P5,a
;
mov1cy,P6.7 ;invert S8(1)
not1cy
;
mov1P6.7,cy ;
set1P6.5
;COM2 to VDD
;----------------------------------------------; prepare LCD Service Process for 5. frame
;----------------------------------------------movwax,#COM31;
reti
;
;---------------------------------------------------------------;
LCD Service Process for 5. frame
;---------------------------------------------------------------COM31:
set1PM6.5
;COM2 to VDD/2
mov a,0FADEh
;S0(2) - S7(2) to P5
mov P5,a
;
mov a,0FADFh
;S8(2) to P6.7
rorca,1
;
mov1P6.7,cy
;
clr1P6.6
;prepare COM3 for VSS
clr1PM6.6
;COM3 to VSS
;----------------------------------------------; prepare LCD Service Process for 6. frame
;----------------------------------------------movwax,#COM32;
reti
;
;---------------------------------------------------------------;
LCD Service Process for 6. frame
;---------------------------------------------------------------COM32:
mov a,P5
;invert S0(2) - S7(2)
xor a,#0FFh ;
mov P5,a
;
mov1cy,P6.7 ;invert S8(2)
not1cy
;
mov1P6.7,cy ;
set1P6.6
;COM3 to VDD
;----------------------------------------------; prepare LCD Service Process for 1. frame
;----------------------------------------------movwax,#COM11;
reti
;
end
26
Application Note U17107EE1V0AN00
Chapter 4
Example Program
4.2 Circuit Diagram for the Example Program
Figure 4-1:
Circuit Diagram
Application Note U17107EE1V0AN00
27
[MEMO]
28
Application Note U17107EE1V0AN00
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[MEMO]