MIC68220

MIC68220
Dual 2A LDO Regulator
General Description
Features
The MIC68220 is a dual high peak current LDO regulator
designed specifically for powering applications such as
FPGA core voltages that require high start up current with
lower nominal operating current. Capable of sourcing 2A of
current per channel for start-up, the MIC68220 provides
high power from a small MLF™ leadless package. The
MIC68220 can also implement a variety of power-up and
power-down protocols such as sequencing, tracking, and
ratiometric tracking.
The MIC68220 operates from a wide input range of 1.65V
to 5.5V, which includes all of the main supply voltages
commonly available today. It is designed to drive digital
circuits requiring low voltage at high currents (i.e. PLDs,
DSP, microcontroller, etc.). The MIC68220 incorporates a
delay pin (Delay) for control of power on reset output
(POR) at turn-on and power-down delay at turn-off. In
addition there is a ramp control pin (RC) for either tracking
applications or output voltage slew rate adjustment at turnon. This is important in applications where the load is
highly capacitive and in-rush currents can cause supply
voltages to fail and microprocessors or other complex logic
chips to hang up.
The MIC68220’s can be configured in two modes. In
tracking mode, the output voltage of Vout1 drives the RC2
pin so that the Vout2 tracks Vout1 during turn-on and turnoff. In sequencing mode, POR1 of Vout1 drives the enable
pin (EN2) of Vout2 so that it turns on after the Vout1 and
turns off before (or after) Vout1. This behavior is critical
for power-up and power-down control in multi-output
power supplies. The MIC68220 is fully protected offering
both thermal and current limit protection, and reverse
current protection.
The MIC68220 has a junction temperature range of
-40°C to +125°C and is available in an adjustable Vout1 &
Vout2 version. The MIC68220 is offered in a low profile
4mm x 5mm 20ld MLF® package.
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Stable with 4.7uF ceramic output capacitor
Input voltage range: 1.65V to 5.5V
0.5V reference
+1.0% initial output tolerance
2A maximum output current – peak start up
1A Continuous Operating Current
Tracking on turn-on and turn-off with pin strapping
Timing Controlled Sequencing On/Off
Programmable Ramp Control™ for in-rush current
limiting and slew rate control of the output voltage on
Turn-On
Power-on Reset (POR) supervisor with programmable
delay time
Single Master can control multiple Slave regulators
with tracking output voltages
Tiny 4mm x 5mm MLF® package
Maximum dropout (VIN – VOUT) of 400mV over
temperature at 1A output current
Adjustable Output Voltages
Excellent line and load regulation specifications
Logic controlled shutdown
Thermal shutdown and current limit protection
Applications
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FPGA/PLD Power Supply
Networking/Telecom Equipment
Microprocessor Core Voltage
High Efficiency Linear Post Regulator
Sequenced or Tracked Power Supply
MLF and MicroLeadFrame a registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
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MIC68220
Typical Application
Sequenced Dual Power Supply for I/O and Core Voltage of µProcessor
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MIC68220
Tracking Dual Power Supply for I/O and Core Voltage of µProcessor
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MIC68220
Block Diagram
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MIC68220
Ordering Information
Part Number
MIC68220YML
Output
Current
Voltage
Junction
Temperature Range
Package
2.0A
ADJ
–40°C to +125°C
PB-Free 20-Pin 4x5 MLF®
Notes
For additional voltage options, contact Micrel Marketing.
®
MLF is a GREEN RoHS compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free.
Pin Configuration
20-Pin 4mm x 5mm MLF® (ML)
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MIC68220
Pin Description (Pin Numbering may change depending on layout considerations)
1,2
VIN1
Input: Input voltage supply pin. Place a capacitor to ground to bypass the input
supply
3
Delay1
Delay. Capacitor to ground sets internal delay timer. Timer delays power-on reset
(POR) output at turn-on, and ramp down at turn-off.
4
RC1
Ramp Control. May be voltage driven for tracking applications, or a capacitor to
ground will set the slew rate of output voltage during start-up.
5
EN1
Enable (Input): CMOS compatible input. Logic high = enable, logic low = shutdown
6,7
VIN2
Input: Input voltage supply pin. Place a capacitor to ground to bypass the input
supply
8
Delay2
Delay. Capacitor to ground sets internal delay timer. Timer delays power-on reset
(POR) output at turn-on, and ramp down at turn-off.
9
RC2
Ramp Control. May be voltage driven for tracking applications, or a capacitor to
ground will set the slew rate of output voltage during start-up.
10
EN2
Enable (Input): CMOS compatible input. Logic high = enable, logic low = shutdown
11
GND
Ground
12
POR2
Power-on Reset: Open-drain output device indicates when the output is in regulation.
High (open) means device is regulating within 10%. POR onset can be delayed using
a single capacitor from Delay to ground.
13
ADJ2
Adjustable regulators: Feedback input. Connect to external resistor voltage divider.
13
SNS2
Fixed Output Voltage Regulators: Sense pin. Connect directly to VOUT2
14,15
VOUT2
Output Voltage: Output of voltage regulator. Place capacitor to ground to bypass the
output voltage. Minimum load current is 100uA. Nominal bypass capacitor is 4.7uf.
16
GND
Ground
17
POR1
Power-on Reset: Open-drain output device indicates when the output is in regulation.
High (open) means device is regulating within 10%. POR onset can be delayed using
a single capacitor from Delay-to-ground.
18
ADJ1
Adjustable regulators: Feedback input. Connect to external resistor voltage divider.
18
SNS1
Fixed Output Voltage Regulators: Sense pin. Connect directly to VOUT1
19,20
VOUT1
Output Voltage: Output of voltage regulator. Place capacitor to ground to bypass the
output voltage. Minimum load current is 100uA. Nominal bypass capacitor is 4.7uf.
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MIC68220
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VIN) .........................................................6V
Enable Input Voltage (VEN)............................. 0 to VIN + 0.3V
POR (VPOR)........................................................... VIN + 0.3V
RC ....................................................................... VIN + 0.3V
Power Dissipation .................................. Internally Limited(3)
Junction Temperature .........................–40°C ≤ TJ ≤ +125°C
Storage Temperature (TS)...................–65°C ≤ TJ ≤ +150°C
ESD Rating(4) ................................................................ 2KV
Supply voltage (VIN) ....................................... 1.65V to 5.5V
Enable Input Voltage (VEN)..................................... 0V to VIN
Ramp Control (VRC)............................................. 0V to 5.5V
Junction Temperature Range ............–40°C ≤ TJ ≤ +125°C
Package Thermal Resistance
4x5 MLF-20 (θJA) ..............................................44°C/W
Electrical Characteristics(5)
TA = 25°C with VIN = VOUT + 1V; VEN = VIN; IOUT = 10mA; bold values indicate –40°C ≤ TJ ≤ +125°C, unless noted.
Parameter
Conditions
Output Voltage Accuracy
10mA < IOUT < IL(max), VOUT + 1 ≤ VIN ≤ 5.5V
Feedback Voltage
Adjustable version only
Feedback Current
Adjustable version only
10
Output Voltage Line Regulation
VIN = VOUT + 1V to 5.0V
0.06
Output Voltage Load Regulation
IL = 10mA to 2A
0.3
1
%
VIN – VO; Dropout Voltage
IL = 500mA
140
250
mV
IL = 1.0A
200
400
mV
IL = 2.0A
300
600
mV
IL = 10mA
1.5
Ground Pin Current
Min
Typ
-2
0.49
0.50
Max
Units
+2
%
0.51
V
nA
0.5
V
mA
IL = 500mA
7
15
mA
IL = 1.0A
15
30
mA
IL = 2.0A
42
80
mA
0.01
10
µA
3.4
6.0
A
25
150
µs
Shutdown Current
VEN = 0V; VOUT = 0V
Current Limit
VOUT = 0V; VIN = 3.0V
Start-up Time
VEN = VIN; CRC = Open
2.0
Enable Input
Enable Input Threshold
Regulator enable
V
1
Regulator shutdown
Enable Hysteresis
Enable Input Current
50
VIL ≤ 0.2V (Regulator shutdown)
VIH ≥ 1V (Regulator enable)
100
0.2
V
250
mV
0.8
µA
2
µA
POR Output
IPOR(LEAK)
VPOR = 5.5V; POR = High
µA
2
µA
60
90
mV
7.5
10
12.5
%
Output Logic-Low Voltage (undervoltage condition),
IPOR = 1mA
VPOR(LO)
VPOR :
1
VOUT Ramping Up
VOUT Ramping Down
Threshold, % of VOUT below nominal
Delay Current
VDELAY = 0.75V
Delay Voltage (Note 6)
VPOR = High
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10
12.5
15
%
0.7
1
1.3
µA
1.185
1.235
1.285
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MIC68220
Parameter
Conditions
Min
Typ
Max
Units
IRC
Ramp Control Current; VRC = 0.75V
0.7
1
1.3
µA
IDISCHARGE(OUTPUT) (Note 7)
VOUT = 0.5VREF, VRAMP =0V
25
45
70
mA
200mV < VRC < VTARGET ; Measure (VOUT – VRC)
-50
25
100
mV
Measure (VOUT - VRC x (VTARGET / 500mV))
–10
15
50
mV
Ramp Control
Tracking Accuracy:
Fixed
(Note 8)
Tracking Accuracy:
Adjustable
(Note 8)
Notes:
1.
Exceeding the absolute maximum rating may damage the device.
2.
The device is not guaranteed to function outside its operating rating.
3.
The maximum allowable power dissipation of any TA (ambient temperature) is PD(max) = TJ(max) – TA) / θJA. Exceeding the maximum
allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.
4.
Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
5.
Specification for packaged product only.
6.
Timer High Voltage along with Delay pin current (1µA nom) determines the delay per uF of capacitance. Typical delay is 1.1sec/µf
7.
Discharge current is the current drawn from the output to ground to actively discharge the output capacitor during the shutdown process.
8.
VTARGET is the output voltage of an adjustable with customer resistor divider installed between VOUT and Adj/Sns pin, or the rated output
voltage of a fixed device.
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MIC68220
Typical Characteristics
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MIC68220
Typical Characteristics
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MIC68220
Functional Characteristics
Enable Turn-On
5V
VIN = VOUT + 1V
VOUT = 1.8V
COUT = 4.7µF
IOUT = 10mA
4V
Output Voltag e
(20mV/div)
Output Voltag e
(500mV/div)
Input Voltag e
(1V/div)
Enable Voltag e
(500mV/div)
Line Transient
CLOAD = 4.7µF
Time (10µs/div )
Time (100µs/div )
Output Voltag e
(100mV/div)
Load Transient
VIN = VOUT + 1V
VOUT = 1.8V
Output Current
(1A/div)
COUT = 4.7µF
2A
10mA
Time (40µs/div )
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MIC68220
Applications Information
Enable Input
The MIC68220 features a TTL/CMOS compatible
positive logic enable input for on/off control of the
device. High (>1V) enables the regulator while low
(<.2V) disables the regulator. In shutdown the
regulator consumes very little current (only a few
microamperes of leakage). For simple applications the
enable (EN) can be connected to VIN (IN). While
MIC68220 only requires a few µA’s of enable current
to turn on, actual enable pin current will depend on the
overdrive (voltage exceeding 1V) in each particular
application.
Enable Connections for Logic Driven input
Enable Connection for VIN-Driven and/or Slow
Risetime Inputs
September 2010
Input Capacitor
An input capacitor of 1µF or greater is recommended
when the device is more than 4 inches away from the
bulk supply capacitance, or when the supply is a
battery. Small surface mount chip capacitors can be
used for the bypassing. The capacitor should be place
within 1 inch of the device for optimal performance.
Larger values will help to improve ripple rejection by
bypassing the regulator input, further improving the
integrity of the output voltage.
Output Capacitor
The MIC68220 requires an output capacitor for stable
operation. As a µCap LDO, the MIC68220 can
operate with ceramic output capacitors of 4.7µF or
greater with ESR’s ranging from a 0mΩ to over
300mΩ. Values of greater than 4.7µF improve
transient response and noise reduction at high
frequency.
X7R/X5R
dielectric-type
ceramic
capacitors are recommended because of their
superior
temperature
performance.
X7R-type
capacitors change capacitance by 15% over their
operating temperature range and are the most stable
type of ceramic capacitors. Larger output
capacitances can be achieved by placing tantalum or
aluminum electrolytics in parallel with the ceramic
capacitor. For example, a 100µF electrolytic in parallel
with a 4.7µF ceramic can provide the transient and
high frequency noise performance of a 100µF ceramic
at
a
significantly
lower
cost.
Specific
undershoot/overshoot performance will depend on
both the values and ESR/ESL of the capacitors.
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MIC68220
Adjustable Regulator Design
Adjustable Regulator with Resistors
The adjustable MIC68220 output voltage can be
programmed from 0.5V to 5.5V using a resistor divider
from output to the SNS pin. Resistors can be quite
large, up to 1MΩ because of the very high input
impedance and low bias current of the sense
amplifier. Typical sense input currents are less than
30nA which causes less than 0.3% error with R1 and
R2 less than or equal to 100KΩ. For large value
resistors (>50K) R1 should be bypassed by a small
capacitor (CFF = 0.1µF bypass capacitor) to avoid
instability due to phase lag at the ADJ/SNS input.
The output resistor divider values are calculated by:
⎛ R1
⎞
VOUT = 0.5V ⎜
+ 1⎟
⎠
⎝ R2
Power on Reset (POR) and Delay (DLY)
The power-on reset output (POR) is an open-drain
N-Channel device requiring a pull-up resistor to either
the input voltage or output voltage for proper voltage
levels. POR is driven by the internal timer so that the
release of POR at turn-on can be delayed for as much
as 1 second. POR is always pulled low when enable
(EN) is pulled low or the output goes out of regulation
by more than 10% due to loading conditions.
The internal timer is controlled by the DLY pin which
has a bidirectional current source and two limiting
comparators. A capacitor connected from DLY-toGND sets the delay time for two functions. On start
up, DLY sets the time from power good to the release
of the POR. At shut down, the delay sets the time
from disable (EN pin driven low) to actual ramp down
of the output voltage. The current source is +/-1µA,
which charges the capacitor from ~150mV (nominal
disabled DLY voltage) to ~1.25V. At turn on, the DLY
cap begins to charge when the output voltage reaches
90% of the target value. When the capacitor reaches
1.25V, the output of the POR is released to go high.
At turn off, the DLY cap begins to discharge when the
EN is driven low. When the cap reaches ~150mV the
output is ramped down. Both delays are nominally the
same, and are calculated by the same formula:
⎛C
TDLY = (1.1)⎜⎜ DLY
⎝ 1μA
September 2010
Scale Factor is:
1.1 seconds/microfarad,
1.1 milliseconds/nanofarad, or
1.1 microseconds/picofarad.
TDLYOFF is the time from lowering of EN to the start of
ramp down on the off cycle. TPOR is the time from
raising of EN to the release (low to high edge) of the
POR. This behavior means that a µP or other
complex logic system guarantees that power has
been good for a known time before the POR is
released. They are further guaranteed that once POR
is pulled low, they have a known time to ‘tidy up’
memory or other registers for a well controlled
shutdown. In Master/Slave configurations the timers
can be used to assure that the Master is always
accurately regulating when the Slave is on.
Ramp Control
The ramp control (RC) has a bidirectional current
source and a sense amplifier, which together are used
to control the voltage at the output. When RC is below
the target voltage (nominal output voltage for fixed
voltage parts, 0.5V for adjustable parts) the RC pin
controls the output voltage. When RC is at or above
the target voltage, the output is controlled by the
internal regulator.
Tracking Applications: Driving RC from a Voltage
Source
Fixed Parts: If RC is driven from another (Master)
regulator the two outputs will track each other until the
Master exceeds the target voltage of the Slave
regulator. Typically the output of the MIC68220 will
track above the RC input by 30mV to 70mV. This
offset is designed to allow Master/Slave tracking of
same-voltage regulators. Without the offset, samevoltage Master/Slave configurations could suffer poor
regulation.
Adjustable Parts: The RC pin on adjustable versions
operates from 0V to 0.5V. To implement tracking on
an adjustable version, an external resistor divider
must be used. This divider is the nearly same ratio as
the voltage setting divider used to drive the Sense/Adj
pin. It is recommended that the ratio be adjusted to
track ~50mV (2% to 3%) above the target voltage if
the Master and Slave are operating at the same target
voltage.
⎞
⎟⎟
⎠
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MIC68220
Sequencing Connections
Ramp Up: Cap Controlled Slew Rate
If a capacitor is connected to RC, the bidirectional
current source will charge the cap during startup and
discharge the cap during shutdown. The size of the
capacitor and the RC current (1µA nom) control the
slew rate of the output voltage during startup. For
example, to ramp up a 1.8V regulator from zero to full
output in 10mSec requires a 5.6nF capacitor.
For Fixed Versions:
⎛C
TRC = VOUT ⎜⎜ RC
⎝ 1μA
⎞
⎟⎟
⎠
⎛ 1μA
SR ON = ⎜⎜
⎝ C RC
⎞
⎟
⎟
⎠
Similarly, to slew an adjustable (any output voltage)
from 0 to full output in 10mSec requires a 20nF cap.
For Adjustable Versions:
Delayed Sequencing
CDLY2 > CDLY1 [CDLY2=2nF; CDLY1=1nF]
⎛ 1μA ⎞
⎛C ⎞
⎟
TRC = 0.5V ⎜⎜ RC ⎟⎟ SRON = 2VOUT ⎜⎜
⎟
1
A
μ
⎝
⎠
⎝ CRC ⎠
Ramp Down: Turn Off Slew Rate
When EN is lowered and the DLY pin has discharged,
the RC pin and the OUT pin slew toward zero. For
fixed voltage devices, the RC pin slew rate is 2 to 3
times the SRON defined above. For adjustable voltage
devices the RC pin slew is much higher. In both
cases, turn off slew rate may be determined by the
RC pin for low values of output capacitor, or by the
maximum discharge current available at the output for
large values of output capacitor. Turn off slew rate is
not a specified characteristic of the MIC68220.
Sequencing Configurations
Sequencing refers to timing based Master/Slave
control between regulators. It allows a Master device
to control the start and stop timing of a single or
multiple Slave devices. In typical sequencing the
Master POR drives the Slave EN. The sequence
begins with the Master EN driven high. The Master
output ramps up and triggers the Master DLY when
the Master output reaches 90%. The Master DLY then
determines when the POR is released to enable the
Slave device. When the Master EN is driven low, the
Master POR is immediately pulled low causing the
Slave to ramp down. However, the Master output will
not ramp down until the Master DLY has fully
discharged. In this way, the Master power can remain
good after the Slave has been ramped down.
Windowed Sequencing
CDLY2 < CDLY1 [CDLY2=1nF; CDLY1=2nF]
In sequencing configurations the Master DLY controls
the turn-on time of the Slave and the Slave DLY
controls the turn-off time of the Slave.
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MIC68220
Tracking Configurations
Normal Tracking
In normal tracking the Slave RC pin is driven from the
Master output. Internal control buffering assures that
the output of the Slave is always slightly above the
Master to guarantee that the Slave properly regulates
(based on its own internal reference) if Master and
Slave are both fixed voltage devices of the same
output voltage. The schematic and plot below show a
1.2 volt device tracking a 1.8 volt device through the
entire turn-on / turn-off sequence. Note that since the
RC pin will overdrive the target voltage (to assure
proper regulation) the ramp down delay is longer than
the POR delay during turn-on.
Fixed voltage versions of MIC68220 have two internal
voltage dividers: one for setting the output voltage and
the other for driving the tracking circuitry. Adjustable
parts have up to two external dividers: one from
output to SNS (to set the output voltage) and one from
the output to the Slave RC pin (in tracking
configurations). Also, the RC pin in fixed parts
operates at the same voltage as the output, whereas
the RC pin in adjustable parts operates at the 0.5V
reference. To setup a normal tracking configuration,
the divider driving the Slave RC pin is the same ratio
(or nearly the same – if both Master and Slave are set
to the same output voltage, the Slave RC divider
should be adjusted 2% to 4% higher) as the divider
driving the Slave SNS pin. This is shown below.
Adjustable Voltage devices
Fixed Voltage Devices
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MIC68220
Ratiometric Tracking
Ratiometric tracking allows independent ramping
speeds for both regulators so that the regulation
voltage is reached at the same time. This is
accomplished by adding a resistor divider between the
Master output pin and the Slave RC pin. The divider
should be scaled such that the Slave RC pin reaches
or exceeds the target output voltage of the Slave as
the Master reaches its target voltage.
Ratiometric tracking may be used with adjustable
parts by simply connecting the RC pins of the Master
and Slave. Use a single RC capacitor of twice the
normal value (since twice the current is injected into
the single RC cap).
Alternatively, adjustable parts
may use ratiometric tracking in a manner similar to
standard tracking, with the tracking divider changed to
the same resistor ratio driving the Master Adj/Sns pin.
Fixed Voltage Devices
Adjustable Voltage Devices
Final Note on Tracking
The MIC68220 does not fully shutdown until the output load is discharged to near zero. If RC is driven from an
external source in a tracking configuration, and the external source does not go to zero on shutdown, then it may
prevent complete shutdown of the MIC68220. This will not cause damage, but some Q current will remain and may
cause concern in a battery operated portable equipment. Also, when RC is driven in tracking mode, pulling EN low
will not cause the output to drop. Maintaining low EN in tracking mode simply means that the MIC68220 will
shutdown when the tracking voltage gets near zero. In no case can the MIC68220 enter the tracking mode unless
EN is pulled high.
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MIC68220
Package Information
20-Pin 4mm x 5mm MLF (ML)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right
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can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
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© 2006 Micrel, Incorporated.
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