SY58038U

SY58038U
Ultra-Precision, 8:1 MUX with Internal
Termination and 1:2 LVPECL Fanout Buffer
Precision Edge®
General Description
The SY58038U is a low-jitter, low-skew, high-speed 8:1
multiplexer with a 1:2 differential fanout buffer optimized
for precision telecom and enterprise server distribution
applications. The SY58038U distributes clock frequencies
from DC to 3.5GHz, and data rates to 4.5Gpbs guaranteed
over temperature and voltage.
The SY58038U differential input includes Micrel’s unique,
3-pin input termination architecture that directly interfaces
to any differential signal (AC- or DC-coupled) as small as
100mV without any level shifting or termination resistor
networks in the signal path. The outputs are 800mV, 100K
compatible LVPECL with extremely fast rise/fall times
guaranteed to be less than 100ps.
The SY58038U features a patented isolation design that
significantly improves channel-to-channel crosstalk
performance.
The SY58038U operates from a 2.5V ±5% or 3.3V ±10%
supply and is guaranteed over the full industrial
temperature range of –40°C to +85°C. The SY58038U is
®
part of Micrel’s high-speed, Precision Edge product line.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Precision Edge®
Features
• Selects between 1 of 8 inputs, and provides two precise,
low-skew LVPECL output copies
• Ultra-low jitter design:
− 72fsrms phase jitter (typical)
• Guaranteed AC performance over temperature and
voltage:
− DC to 4.5Gbps throughput
− <500ps propagation delay IN-to-Q (VIN > 100mV)
− <100ps tr / tf time
− <15ps skew (output-to-output)
• Unique, patented, channel-to-channel isolation design
provides superior crosstalk performance
• Unique, patented, input termination and VT pin accepts
DC- and AC-coupled inputs
(CML, PECL, LVDS)
• 800mV LVPECL output swing
• Power supply 2.5V ±5% or 3.3V ±10%
• –40°C to +85°C temperature range
• Available in 44-pin (7mm × 7mm) QFN package
Applications
•
•
•
•
Data communication systems
All SONET/SDH data/clock applications
All Fibre Channel applications
All Gigabit Ethernet applications
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
March 26, 2015
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SY58038U
Functional Block Diagram
Truth Table
SEL2
SEL1
SEL0
Q
/Q
L
L
L
IN0
/IN0
L
L
H
IN1
/IN1
L
H
L
IN2
/IN2
L
H
H
IN3
/IN3
H
L
L
IN4
/IN4
H
L
H
IN5
/IN5
H
H
L
IN6
/IN6
H
H
H
IN7
/IN7
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SY58038U
Ordering Information(1)
Part Number
SY58038UMY
(2)
SY58038UMY TR
Marking
Operating Range
Package
SY58038U
–40°C to +85°C
44-pin (7mm × 7mm) QFN
SY58038U
–40°C to +85°C
44-pin (7mm × 7mm) QFN
Notes:
1. Contact factory for die availability. Die are guaranteed at TA = +25°C, DC electricals only.
2. Tape and reel.
Pin Configuration
44-Pin (7mm × 7mm) QFN (QFN-44)
(Top View)
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SY58038U
Pin Description
Pin
Number
Pin
Name
Pin Function
20, 18
16, 14
13, 11
9, 7
5, 3
1, 43
42, 40
38, 36
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
IN4, /IN4
IN5,/IN5
IN6, /IN6
IN7, /IN7
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept
AC or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin
through 50Ω. Note that these inputs will default to an indeterminate state if left open. Refer to the
Input Interface Applications section for more details.
19,15
12, 8
4, 44
41, 37
VT0, VT1
VT2, VT3
VT4, VT5
VT6, VT7
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The
VT pins provide a center-tap to a termination network for maximum interface flexibility. Refer to the
Input Interface Applications section for more details
17
10
2
39
VREF-AC0
VREF-AC1
VREF-AC2
VREF-AC3
Reference Voltage: This output biases to VCC – 1.2V. It is used when AC coupling the inputs (IN,
/IN). For AC-coupled applications, connect VREF-AC to the VT pin and bypass with a 0.01μF lowESR capacitor to VCC or GND, depending on input type. Refer to the Input Interface Applications
section for more details.
21
22
35
SEL0
SEL1
SEL2
The single-ended TTL/CMOS-compatible inputs select the inputs to the multiplexer. Note that this
input is internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left
open.
24, 27, 29, 32
VCC
Positive Power Supply. Bypass with 0.1μF//0.01μF low-ESR capacitors as close to each VCC pin.
25, 26
30, 31
Q0,/Q0
Q1,/Q1
Differential Outputs: These LVPECL output pairs are the outputs of the device. Unused output
pairs may be left open. Each output is designed to drive 800mV into 50Ω terminated to VCC – 2V
(or VCC – 1.2V, if AC-coupled).
23, 28, 33
GND, ePad
Ground. GND and exposed pad (ePad) must both be connected to the most negative potential of
chip ground.
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SY58038U
Absolute Maximum Ratings(3)
Operating Ratings(4)
Power Supply Voltage (VCC)......................... −0.5V to +4.0V
Input Voltage (VIN). ........................................... −0.5V to VCC
LVPECL Output Current (IOUT)
Continuous ............................................................ 50mA
Surge .................................................................. 100mA
(6)
Termination Current
Source or Sink Current (on VT pin) .................. ±100mA
Lead Temperature (soldering, 10s) .......................... +260°C
Storage Temperature Range (TS) ............. −65°C to +150°C
Power Supply
Voltage (VCC) ...... +2.375V to +2.625V or +3.0V to 3.6V
Ambient Temperature (TA) .......................... –40°C to +85°C
(5)
Package Thermal Resistance
QFN (θJA)
Still Air ......................................................... 24°C/W
QFN (ψJB)
Junction-to-Board ........................................ 12°C/W
DC Electrical Characteristics(7)
TA = –40°C to +85°C, unless otherwise noted.
Symbol
Parameter
VCC
Power Supply Voltage
ICC
Power Supply Current
RIN
Input Resistance (IN-to-VT)
RDIFF_IN
Differential Input Resistance (IN-to-/IN)
VIH
Input HIGH Voltage (IN-to-/IN)
VIL
Input LOW Voltage (IN-to-/IN)
VIN
Input Voltage Swing (IN-to-/IN)
VDIFF_IN
Differential Input Voltage Swing (IN-to-/IN)
VT_IN
IN-to-VT (IN-to-/IN)
VREF-AC
Output Reference Voltage
Condition
Min.
Typ.
Max.
VCC = 2.5V
2.375
2.5
2.625
VCC = 3.3V
3.0
3.3
3.6
120
170
mA
40
50
60
Ω
80
100
120
Ω
VCC − 1.6
VCC
V
0
VIN − 0.1
V
See Figure 1
0.1
1.7
V
See Figure 2
0.2
No load, maximum VCC
Note 8
Units
V
V
VCC − 1.3
VCC − 1.2
1.28
V
VCC − 1.1
V
Notes:
3. Permanent device damage may occur if ratings in the Absolute Maximum Ratings section are exceeded. This is a stress rating only and functional
operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum
ratings conditions for extended periods may affect device reliability.
4. The datasheet limits are not guaranteed if the device is operated beyond the operating ratings.
5. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB. ψJB uses 4-layer
θJA in still-air number unless otherwise stated.
6. Due to the limited drive capability, use for input of the same package only.
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
8. VIH (minimum), not lower than 1.2V.
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SY58038U
LVPECL Output DC Electrical Characteristics(9)
VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C ≤ to +85°C, RL = 50Ω to VCC − 2V, unless otherwise noted.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
VOH
Output HIGH Voltage (Q, /Q)
VCC − 1.145
VCC − 0.895
V
VOL
Output LOW Voltage (Q, /Q)
VCC − 1.945
VCC − 1.695
V
VOUT
Output Differential Swing (Q, /Q)
See Figure 1
550
800
mV
VDIFF_OUT
Differential Output Voltage Swing (Q, /Q)
See Figure 2
1100
1600
mV
LVTTL/CMOS DC Electrical Characteristics(9)
VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C ≤ to +85°C, unless otherwise noted.
Symbol
Parameter
Condition
Min.
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
IIH
Input HIGH Current
−125
IIL
Input LOW Current
−300
Typ.
Max.
Units
VCC
V
0.8
V
30
µA
2.0
µA
AC Electrical Characteristics(10)
VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C ≤ to +85°C, RL = 50Ω to VCC − 2V, unless otherwise noted.
Symbol
Parameter
fMAX
Maximum Operating Frequency
tpd
Differential Propagation Delay
∆tpd Temp
Coefficient
Differential Propagation Delay Temperature
Coefficient
tSKEW
tJITTER
Condition
Min.
NRZ Data
4.5
VOUT ≥ 400mV
IN-to-Q
Clock
VIN ≥ 100mV
SEL-to-Q
Typ.
Max.
Units
Gbps
3.5
5
280
390
150
GHz
500
ps
600
ps
220
fs/°C
Output-to-Output Skew
Note 11
15
ps
Part-to-Part Skew
Note 12
150
ps
RMS Phase Jitter
Carrier = 622MHz
Integration Range:
72
fsrms
12kHz − 20MHz
tr , tf
Output Rise/Fall Time
At full output swing, 20% to 80%
35
65
100
ps
Note:
9. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
10. High-frequency AC-parameters are guaranteed by design and characterization.
11. Output-to-output skew is measured between two different outputs under identical input transitions.
12. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs.
Phase Noise Plot
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SY58038U
Single-Ended and Differential Swings
Figure 1. Single-Ended Voltage Swing
March 26, 2015
Figure 2. Differential Voltage Swing
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SY58038U
Typical Operating Characteristics
VCC = 3.3V, GND = 0, VIN = 100mV, TA = +25°C, unless otherwise stated
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SY58038U
Functional Characteristics
VCC = 3.3V, GND = 0, VIN = 100mV, TA = +25°C, unless otherwise stated.
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SY58038U
Functional Characteristics (Continued)
VCC = 3.3V, GND = 0, VIN = 100mV, TA = +25°C, unless otherwise stated.
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SY58038U
Input and Output Stages
Figure 3. Simplified Differential Input Stage
Figure 4. Simplified LVPECL Output Stage
Input Interface Applications
Figure 5. LVPECL Interface (DC-Coupled)
Figure 6. LVPECL Interface (AC-Coupled)
Figure 7. CML Interface (DC-Coupled)
Figure 8. CML Interface (AC-Coupled)
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SY58038U
Input Interface Applications (Continued)
Figure 9. LVDS Interface (DC Coupled)
Figure 10. LVDS Interface (AC Coupled)
Output Interface Applications
Note:
For +2.5V system, R1 = 250Ω, R2 = 62.5Ω
Figure 11. Parallel Thevenin-Equivalent Termination
Note:
For +2.5V system, Rb = 19Ω
For +3.3V system, Rb = 50Ω
Figure 12. Parallel Termination (3-Resistor)
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SY58038U
Package Information and Recommended Landing Pattern(13)
44-Pin 7mm × 7mm QFN (MM)
Note:
13. Package meets Level 2 qualification. All parts are dry-packaged before shipment. Exposed pads must be soldered to a ground for proper thermal
management. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
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SY58038U
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high-performance linear and power, LAN, and timing & communications
markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock
management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company
customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products.
Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and
advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company maintains an extensive network
of distributors and reps worldwide.
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
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