SY89473U Precision LVPECL 2:1 Multiplexer with 1:2 Fanout and Internal Termination General Description The SY89473U is a 2.5V/3.3V precision, high-speed 2:1 differential MUX capable of processing clocks up to 2.5GHz and data up to 2.5Gbps. The differential input includes Micrel’s unique, 3-pin input termination architecture that directly interfaces to any differential signal (AC- or DC-coupled) as small as 100mV (200mVPP) without any level shifting or termination resistor networks in the signal path. The output is 800mV, 100K-compatible, LVPECL with fast rise/fall times guaranteed to be less than 190ps. The SY89473U operates from a 2.5V ±5% or 3.3V ±10% supply and is guaranteed over the full industrial temperature range of –40°C to +85°C. The SY89473U is part of Micrel’s high-speed, Precision Edge® product line. For multiple-clock switchover solutions, please refer to the SY89840–SY89843U family. All support documentation can be found on Micrel’s web site at: www.micrel.com. Functional Block Diagram ® Precision Edge Features • Selects between two input channels and provides two copies of the selected output • Guaranteed AC performance over temperature and supply voltage: - DC to 2.5Gbps data throughput - DC to 2.5GHz fMAX (clock) - <500ps In-to-Out tpd - <190ps tr/tf - <20ps Output-to-output skew • Unique patented input isolation design minimizes crosstalk • Ultra-low Jitter Design: - <1psRMS random jitter - <1psRMS cycle-to-cycle jitter - <10psPP total jitter (clock) - <0.7psRMS crosstalk induced jitter • Unique patent-pending input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS) • 800mV (100K) LVPECL output swing • 2.5V ±5% or 3.3V ±10% supply voltage • -40°C to +85°C industrial temperature range • Available in 24-pin (4mm x 4mm) QFN package Applications • Clock switchover • Data distribution Markets • • • • LAN/WAN Enterprise servers ATE Test and measurement Precision Edge is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com May 2007 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U Ordering Information(1) Lead Finish Part Number Package Type Operating Range Package Marking SY89473UMG QFN-24 Industrial 473U with Pb-Free bar-line indicator NiPdAu Pb-Free SY89473UMGTR(2) QFN-24 Industrial 473U with Pb-Free bar-line indicator NiPdAu Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals Only. 2. Tape and Reel. Pin Configuration 24-Pin QFN May 2007 2 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U Pin Description Pin Number Pin Name 5, 2, IN0, /IN0 23, 20 IN1, /IN1 3, 21 VREF-AC0, VREF-AC1 Pin Function Differential Inputs: These input pairs are the differential signal inputs to the device. They accept AC or DC-coupled signals as small as 100mV (200mVPP). Note that these inputs will default to an indeterminate state if left open. Each pin of a pair internally terminates to a VT pin through 50Ω. Please refer to the “Input Interface Applications” section for more details. Reference Voltage: These outputs bias to VCC -1.2V. They are used for ACcoupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT pin. Bypass with 0.01µF low ESR capacitor to VCC. Maximum sink/source current is ±1.5mA. Due to the limited drive capability, the VREF-AC pin is only intended to drive its respective VT pin. Please refer to the “Input Interface Applications” section for more details. Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network for maximum interface flexibility. Please refer to the “Input Interface Applications” section for more details. 4, 22 VT0, VT1 1, 6, 9, 10, 13, 19, 24 VCC 7, 8 11, 12 Q0, /Q0 Q1, /Q1 Differential Outputs: These differential LVPECL output pairs are a logic function of the IN0, IN1, and SEL inputs. Please refer to the truth table below for details. Unused output pairs can be left floating with no impact on jitter. 15 SEL This single-ended TTL/CMOS-compatible input selects the inputs to the multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left open. VTH = VCC/2. Please refer to the “Timing Diagram” section for more details. 14, 17, 18 GND, Exposed Pad Positive Power Supply: Connect to +2.5V or +3.3V power supply. Bypass with 0.1µF//0.01µF low ESR capacitors as close to VCC pins as possible. Ground: Ground pins and exposed pad must be connected to the same ground plane. Truth Table INPUTS May 2007 OUTPUTS IN0 /IN0 IN1 /IN1 SEL Q /Q 0 1 X X 0 0 1 1 0 X X 0 1 0 X X 0 1 1 0 1 X X 1 0 1 1 0 3 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) .................................... -0.5V to +4.0V Input Voltage (VIN) ........................................... -0.5V to VCC LVPECL Output Current (IOUT) Continuous ...........................................................±50mA Surge ..................................................................±100mA Input Current Source/sink Current on IN, /IN..............................±50mA Source/sink Current on VT ..................................±100mA VREF-AC Current Source/sink Current on VREF-AC ...............................±2mA Lead Temperature (soldering, 20 sec.) ...................+260°C Storage Temperature (TS) ...........................-65°C to 150°C Supply Voltage (VCC) .................................. +2.375V to +2.625V .................................................................... +3.0V to +3.6V Ambient Temperature (TA).................................–40°C to +85°C (3) Package Thermal Resistance QFN (θJA) Still-Air .................................................................... 50°C/W QFN (ΨJB) Junction-to-Board ................................................... 30°C/W DC Electrical Characteristics(4) TA = –40°C to +85°C; unless otherwise stated. Symbol Parameter VCC Power Supply ICC Power Supply Current RIN Input Resistance (IN-to-VT) RDIFF_IN Condition Min Typ Max Units 2.375 2.5 2.625 V 3.0 3.3 3.6 V 45 65 mA 45 50 55 Ω Differential Input Resistance (IN-to-/IN) 90 100 110 Ω VIH Input High Voltage (IN, /IN) 1.2 VCC V VIL Input Low Voltage (IN, /IN) 0 VIH-0.1 V VIN Input Voltage Swing (IN, /IN) See Figure 1a. Note 5 0.1 VCC V VDIFF_IN Differential Input Voltage Swing |IN-/IN| See Figure 1b. 0.2 VT_IN IN-to-VT (IN, /IN) VREF-AC Output Reference Voltage No load, max VCC. VCC-1.3 V VCC-1.2 1. 28 V VCC-1.1 V Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θ JA and ΨJB values are determined for a 4-layer board in still air unless otherwise stated. 4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 5. VIN (max) is specified when VT is floating. May 2007 4 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U LVPECL Outputs DC Electrical Characteristics(6) VCC = 2.5V ±5% or 3.3V ±10%; TA = -40°C to + 85°C; RL = 50Ω to VCC-2V, unless otherwise stated. Symbol Parameter Condition Min Typ Max Units VOH Output HIGH Voltage Q, /Q VCC–1.145 VCC-0.895 V VOL Output LOW Voltage Q, /Q VCC–1.945 VCC-1.695 V VOUT Output Voltage Swing Q, /Q See Figure 1a. 550 800 mV VDIFF-OUT Differential Output Voltage Swing Q, /Q See Figure 1b. 1100 1600 mV LVTTL/CMOS DC Electrical Characteristics(6) VCC = 2.5V ±5% or 3.3V ±10%; TA = -40°C to + 85°C, unless otherwise stated. Symbol Parameter VIH Input HIGH Voltage Condition Min VIL Input LOW Voltage IIH Input HIGH Current -125 IIL Input LOW Current -300 Typ Max 2.0 Units V 0.8 30 V µA µA Note: 6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. May 2007 5 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U AC Electrical Characteristics(7) VCC = 2.5V ±5% or 3.3V ±10%; TA = -40°C to + 85°C, RL = 50Ω to VCC-2V, unless otherwise stated. Symbol Parameter fMAX Maximum Operating Frequency Condition VOUT ≥ 400mV tpd Min Typ Max Units NRZ Data 2.5 3.2 Gbps Clock 2.5 3.0 GHz Differential Propagation Delay In-to-Q SEL-to-Q VTH = VCC/2 Tpd Tempco Differential Propagation Delay Temperature Coefficient tSKEW Output-to-Output Skew Note 8 Part-to-Part Skew Note 9 tJitter tr, tf 250 320 500 ps 250 360 600 ps o fs/ C 158 5 20 ps 200 ps Clock Random Jitter Note 10 1 psRMS Cycle-to-Cycle Jitter Note 11 1 psRMS Total Jitter (TJ) Note 12 10 psPP Crosstalk-Induced Jitter Note 13 0.7 psRMS 190 ps Output Rise/Fall Time (20% to 80%) At full output swing. 70 130 Notes: 7. High-frequency AC-parameters are guaranteed by design and characterization. 8. Output-to-output skew is measured between two different outputs under identical transitions. 9. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 10. Random Jitter is measured with a K28.7 pattern, measured at <fMAX. 11. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the output signal. 12 12. Total Jitter definition: With an ideal clock input of frequency <fMAX, no more than one output edge in 10 output edges will deviate by more than the specified peak-to-peak jitter value. 13. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each other at the inputs. May 2007 6 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U Typical Operating Characteristics VCC = 3.3V; VIN > 400mV; TA = 25°C, RL = 50Ω to VCC-2V, unless otherwise stated. Functional Characteristics VCC = 3.3V; VIN > 400mV; TA = 25°C, RL = 50Ω to VCC-2V, unless otherwise stated. May 2007 7 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U Single-Ended and Differential Swings Figure 1a. Single-Ended Voltage Swing Figure 1b. Differential Voltage Swing Timing Diagrams Input and Output Stages Figure 2a. Simplified Differential Input Stage May 2007 Figure 2b. Simplified LVPECL Output Stage 8 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U Input Interface Applications Option: may connect VT to VCC Figure 3a. LVPECL Interface (DC-Coupled) Figure 3b. LVPECL Interface (AC-Coupled) Figure 3d. CML Interface (AC-Coupled) Figure 3e. LVDS Interface (DC-Coupled) May 2007 9 Figure 3c. CML Interface (DC-Coupled) M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U LVPECL Output Interface Applications LVPECL has a high input impedance, a very low output impedance (open emitter), and a small signal swing which results in low EMI. LVPECL is ideal for driving 50Ω- and-100Ω-controlled impedance transmission lines. There are several techniques for terminating the LVPECL output including: Parallel Termination-Thevenin Equivalent, Parallel Termination (3-resistor), and AC-coupled Termination. Unused output pairs may be left floating. However, single-ended outputs must be terminated, or balanced. Note: 1. Power-saving alternative to Thevenin termination. 2. Place termination resistors as close to destination inputs as possible. 3. Rb resistor sets the DC bias voltage, equal to VT. 4. For 2.5V systems, Rb = 19Ω. Figure 4b. Parallel Termination (3-Resistor) Note: 1. For +2.5V systems, R1 = 250Ω, R2 = 62.5Ω. Figure 4a. Parallel Termination-Thevenin Equivalent Related Product and Support Information Part Number Function Data Sheet Link SY89474U Precision LVDS 2:1 Multiplexer with 1:2 Fanout and Internal Termination www.micrel.com/product-info/products/sy89474u.shtml SY89475U Precision CML 2:1 Multiplexer with 1:2 Fanout and Internal Termination www.micrel.com/product-info/products/sy89475u.shtml HBW Solutions New Products and Applications www.micrel.com/product-info/products/solutions.shtml May 2007 10 M9999-052207-B [email protected] or (408) 955-1690 Micrel, Inc. SY89473U Package Information 24-Pin QFN MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. May 2007 11 M9999-052207-B [email protected] or (408) 955-1690