Datasheet
Serial EEPROM Series Standard EEPROM
WLCSP EEPROM
BRCH064GWZ-3
General Description
BRCH064GWZ-3 is a 64Kbit serial EEPROM of I2C BUS Interface Method
Packages W(Typ) x D(Typ) x H(Max)
Features
UCSP30L1A 1.50mm x1.00mm x 0.33mm
Completely Conforming to the World Standard I2C
BUS.
All Controls Available by 2 Ports of Serial Clock
(SCL) and serial data (SDA)
Other Devices than EEPROM can be Connected to
the Same Port, Saving Microcontroller Port
1.6V to 5.5V Single Power Source Operation Most
Suitable for Battery Use
1.6V to 5.5V Wide Limit of Operating Voltage,
Possible FAST MODE 400KHz Operation
Up to 32 Byte in Page Write Mode
Bit Format 8K x 8
Self-timed Programming Cycle
Low Current Consumption
Prevention of Write Mistake
Write (Write Protect) Function Added
Prevention of write mistake at low voltage
More than 1 Million Write Cycles
More than 40 Years Data Retention
Noise Filter Built in SCL / SDA Terminal
Initial Delivery State FFh
○Product structure：Silicon monolithic integrated circuit
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○This product has no designed protection against radioactive rays
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Datasheet
BRCH064GWZ-3
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Rating
Unit
Supply Voltage
VCC
-0.3 to +6.5
V
Power Dissipation
Pd
0.22(UCSP30L1A)
W
Storage Temperature
Tstg
-65 to +125
°C
Operating Temperature
Topr
-40 to +85
°C
-
-0.3 to Vcc+1.0
V
The Max value of Input Voltage/Output Voltage is not over 6.5V.
When the pulse width is 50ns or less, the Min value of Input
Voltage/Output Voltage is not below 1.0V.
Tjmax
150
°C
Junction temperature at the storage condition
Input Voltage/
Output Voltage
Junction Temperature
Remark
Derate by 2.2mW/°C when operating above Ta=25°C
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Memory Cell Characteristics (Ta=25°C, Vcc=1.6V to 5.5V)
Limit
Parameter
Unit
Write Cycles (Note1)
Data Retention (Note1)
Min
Typ
Max
1,000,000
-
-
Times
40
-
-
Years
(Note1) Not 100% TESTED
Recommended Operating Ratings
Parameter
Symbol
Rating
Power Source Voltage
Vcc
1.6 to 5.5
Input Voltage
VIN
0 to Vcc
Unit
V
DC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, Vcc=1.6V to 5.5V)
Parameter
Symbol
Limit
Min
Typ
Max
Unit
Conditions
Input High Voltage1
VIH1
0.7Vcc
-
Vcc+1.0
V
1.7V≤Vcc≤5.5V
Input Low Voltage1
VIL1
-0.3 (Note2)
-
+0.3Vcc
V
1.7V≤Vcc≤5.5V
Input High Voltage2
VIH2
0.8Vcc
Input Low Voltage2
VIL2
Output Low Voltage1
VOL1
Output Low Voltage2
-0.3
-
Vcc+1.0
V
1.6V≤Vcc＜1.7V
(Note2)
-
+0.2Vcc
V
1.6V≤Vcc＜1.7V
-
-
0.4
V
IOL=3.0mA, 2.5V≤Vcc≤5.5V (SDA)
VOL2
-
-
0.2
V
IOL=0.7mA, 1.6V≤Vcc＜2.5V (SDA)
Input Leakage Current
ILI
-1
-
+1
µA
VIN=0 to Vcc
Output Leakage Current
ILO
-1
-
+1
µA
VOUT=0 to Vcc (SDA)
Supply Current (Write)
ICC1
-
-
2.0
mA
Supply Current (Read)
ICC2
-
-
0.5
mA
Standby Current
ISB
-
-
2.0
µA
Vcc=5.5V, fSCL=400kHz, tWR=5ms,
Byte Write, Page Write
Vcc=5.5V, fSCL=400kHz
Random Read, current Read, Sequential
Read
WP=GND or Vcc
Vcc=5.5V, SDA・SCL=Vcc
WP=GND or Vcc, TEST=GND or Vcc
(Note2) When the pulse width is 50ns or less, it is -1.0V.
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BRCH064GWZ-3
AC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, Vcc=1.6V to 5.5V)
Parameter
Limit
Symbol
Min
Typ
Max
Unit
Clock Frequency
Data Clock High Period
fSCL
-
-
400
kHz
tHIGH
0.6
-
-
μs
Data Clock Low Period
tLOW
1.2
-
-
µs
SDA,SCL(INPUT) Rise Time (Note1)
SDA,SCL (INPUT)Fall Time (Note1)
tR
-
-
1.0
µs
tF1
-
-
1.0
µs
SDA(OUTPUT)Fall Time (Note1)
tF2
-
-
0.3
µs
tHD:STA
0.6
-
-
µs
Start Condition Setup Time
tSU:STA
0.6
-
-
µs
Input Data Hold Time
tHD:DAT
0
-
-
ns
Input Data Setup Time
Start Condition Hold Time
tSU:DAT
100
-
-
ns
Output Data Delay Time
tPD
0.1
-
0.9
µs
Output Data Hold Time
tDH
0.1
-
-
µs
Stop Condition Setup Time
tSU:STO
0.6
-
-
µs
Bus Free Time
tBUF
1.2
-
-
µs
Write Cycle Time
tWR
-
-
5
ms
tI
-
-
0.1
µs
tHD:WP
1.0
-
-
µs
WP Setup Time
tSU:WP
0.1
-
-
µs
WP High Period
tHIGH:WP
1.0
-
-
µs
Noise Spike Width (SDA and SCL)
WP Hold Time
(Note1) Not 100% TESTED.
Condition Input Data Level: VIL=0.2×Vcc VIH=0.8×Vcc
Input Data Timing Reference Level: 0.3×Vcc/0.7×Vcc
Output Data Timing Reference Level: 0.3×Vcc/0.7×Vcc
Rise/Fall Time : ≤20ns
Serial Input / Output Timing
tR
SCL
tF1
30%
70%
ACK
ACK
tWR
tDH
tPD
tBUF
D0
D1
70%
30%
30%
DATA(n)
DATA(1)
tHD:DAT
70%
SDA
(入力)
(INPUT)
30%
tSU:DAT
70%
70%
70%
70%
30%
30%
tLOW
tHD:STA
70%
tHIGH
70% 70%
70%
30%
30%
30%
○Input read at the rise edge of SCL
70%
SDA
30%
○Data
(output) output in sync with the fall of SCL
30%
tSU:WP
tSU:WP
tF2
70%
Figure 1.-(d). WP Timing at Write Execution
D1
D1
tSU:STA
tHD:STA
tSU:STO
STOP CONDITION
START CONDITION
ACK
ACK
ACK
70%
70%
tWR
tWR
Fig1-(5) WP timing at write execution
30%
Fig1-(6) WP timing at write cancel
FigureSTART
1.-(b)
Start-Stop Bit Timing
STOP CONDITION
CONDITION
D0
ACK
ACK
70%
70%
70%
Fig1-(4) Write70%
cycle timing
30%
30%
D0
D0
tHIGH:WP
tHIGH:WP
70%
30%
DATA(n)
DATA(n)
DATA(1)
DATA(1)
70%
70%
tHD:WP
tHD:WP
STOP
STOP CONDITION
CONDITION
30%
Figure 1.-(a). Serial Input / Output Timing
70%
30%
70%
70%
SDA
(出力)
(OUTPUT)
Figure 1.-(e). WP Timing at Write Cancel
70%
70%
tWR
write data
(n-th address)
STOP CONDITION
START CONDITION
Figure 1.-(c). Write Cycle Timing
Fig1-(5) WP timing at write execution
Fig1-(6) WP timing at write cancel
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Datasheet
BRCH064GWZ-3
Block Diagram
64Kbit EEPROM ARRAY
Vcc
13bit
8bit
ADDRESS
DECODER
13bit
SLAVE, WORD
ADDRESS REGISTER
START
DATA
REGISTER
WP
STOP
SCL
TEST
CONTROL LOGIC
ACK
GND
HIGH VOLTAGE GEN.
SDA
VCC LEVEL DETECT
Figure 2. Block Diagram
Pin Configuration
B
A
A
B
1
2
3
B1
B2
B3
SDA
GND
GND
SDA
SCL
WP
A1
A2
TEST
Vcc
A3
VCC
Figure 3. Pin Configuration
(BOTTOM VIEW)
Pin Descriptions
Land No. Terminal Name
Input / Output
Descriptions
B3
TEST
Input
B2
GND
-
B1
SDA
Input / Output
A3
VCC
-
A2
WP
Input
Write protect terminal
A1
SCL
Input
Serial clock input
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Slave address setting
Reference voltage of all input / output, 0V
Slave and word address
Serial data input, serial data output
Power Supply
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BRCH064GWZ-3
Typical Performance Curves
6
6
4
Input Low Voltage1,2: V
Input High Voltage : V
IH1,2 (V)
5
IL1,2 (V)
Ta=-40°C
Ta= 25°C
Ta= 85°C
3
SPEC
2
1
0
5
Ta=-40°C
Ta= 25°C
Ta= 85°C
4
3
2
1
SPEC
0
0
1
2
3
4
5
6
0
1
4
5
6
5
6
Figure 5. Input Low Voltage1,2
vs Supply Voltage
Figure 4. Input High Voltage1,2,
vs Supply Voltage
1
1
OL2 (V)
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.8
Output Low Voltage2: V
OL1 (V)
3
Supply Voltage: Vcc(v)
Supply Voltage: Vcc(v)
Output Low Voltage1: V
2
0.6
SPEC
0.4
0.2
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.8
0.6
0.4
SPEC
0.2
0
0
0
1
2
3
4
5
0
6
Output Low Current: IOL(mA)
2
3
4
Output Low Current: IOL(mA)
Figure 6. Output Low Voltage1
vs Output Low Current
(Vcc=2.5V)
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Figure 7. Output Low Voltage2
vs Output Low Current
(Vcc=1.6V)
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BRCH064GWZ-3
Typical Performance Curves‐continued
1.2
1.2
0.6
0.4
0.2
LO (µA)
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.8
1
Output Leakage Current: I
Input Leakage Current: I
LI (μA)
SPEC
1
0.8
0
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0.6
0.4
0.2
0
0
1
2
3
4
5
6
0
1
Supply Voltage: Vcc(V)
2.5
0.5
CC2 (mA)
0.6
SPEC
Supply Current (Read): I
CC1 (mA)
Supply Current (Write): I
4
5
6
Figure 9. Output Leakage Current vs Supply Voltage
(SDA)
3
1.5
3
Supply Voltage: Vcc(v)
Figure 8. Input Leakage Current vs Supply Voltage
(SCL, WP, TEST)
2
2
Ta=-40°C
Ta= 25°C
Ta= 85°C
1
0.5
SPEC
0.4
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.3
0.2
0.1
0
0
0
1
2
3
4
5
0
6
2
3
4
5
6
Supply Voltage: Vcc(V)
Supply Voltage: Vcc(V)
Figure 11. Supply Current (Read) vs Supply Voltage
(fSCL=400kHz)
Figure 10. Supply Current (Write) vs Supply Voltage
(fSCL=400kHz)
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Typical Performance Curves‐continued
2.5
10000
SPEC
2
1.5
Ta=-40°C
Ta= 25°C
Ta= 85°C
Clock Frequency: f
Standby Current: I
SB (µA)
SCL (kHz)
1000
1
0.5
SPEC
100
Ta=-40°C
Ta= 25°C
Ta= 85°C
10
1
0.1
0
0
1
2
3
4
5
0
6
1
4
5
6
Figure 13. Clock Frequency vs Supply Voltage
Figure 12. Standby Current vs Supply Voltage
1
LOW (µs)
1.5
0.8
SPEC
Data Clock Low Period : t
HIGH (µs)
3
Supply Voltage: Vcc(V)
Supply Voltage: Vcc(V)
Data Clock High Period : t
2
0.6
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.4
0.2
0
SPEC
1.2
0.9
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.6
0.3
0
0
1
2
3
4
5
6
0
Supply Voltage: Vcc(V)
2
3
4
5
6
Supply Voltage: Vcc(V)
Figure 14. Data Clock High Period vs Supply Voltage
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Figure 15. Data Clock Low Period vs Supply Voltage
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BRCH064GWZ-3
Typical Performance Curves‐continued
(µs)
1
SU:STA
0.8
Start Condition Setup Time: t
Start Condition Hold Time: t
HD:STA (µs)
1
SPEC
0.6
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.4
0.2
0
0.8
SPEC
0.6
0.4
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.2
0
-0.2
0
1
2
3
4
5
6
0
1
Supply Voltage: Vcc(V)
4
5
6
Supply Voltage: Vcc(V)
50
50
HD:DAT (ns)
SPEC
0
HD:DAT
(ns)
3
Figure 17. Start Condition Setup Time vs Supply Voltage
Figure 16. Start Condition Hold Time vs Supply Voltage
-50
Input Data Hold Time: t
Input Data Hold Time: t
2
Ta=-40°C
Ta= 25°C
Ta= 85°C
-100
-150
-200
SPEC
0
-50
Ta=-40°C
Ta= 25°C
Ta= 85°C
-100
-150
-200
0
1
2
3
4
5
6
0
Supply Voltage: Vcc(V)
2
3
4
5
6
Supply Voltage: Vcc(V)
Figure 19. Input Data Hold Time vs Supply Voltage
(LOW)
Figure 18. Input Data Hold Time vs Supply Voltage
(HIGH)
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BRCH064GWZ-3
Typical Performance Curves‐continued
300
SU:DAT (ns)
200
SPEC
100
Input Data Setup Time: t
Input Data Setup Time: t
SU:DAT (ns)
300
0
Ta=-40°C
Ta= 25°C
Ta= 85°C
-100
200
SPEC
100
0
Ta=-40°C
Ta= 25°C
Ta= 85°C
-100
-200
-200
0
1
2
3
4
5
0
6
1
Figure 20. Input Data Setup Time vs Supply Voltage
(HIGH)
4
5
6
Figure 21. Input Data Setup Time vs Supply Voltage
(LOW)
2
2
PD
1.5
(µs)
Ta=-40°C
Ta= 25°C
Ta= 85°C
1
Output Data Delay Time: t
PD (µs)
3
Supply Voltage: Vcc(V)
Supply Voltage: Vcc(V)
Output Data Delay Time: t
2
SPEC
0.5
Ta=-40°C
Ta= 25°C
Ta= 85°C
1.5
1
SPEC
0.5
SPEC
SPEC
0
0
1
2
3
4
5
6
Supply Voltage: Vcc(V)
0
1
2
3
4
5
6
Supply Voltage: Vcc(V)
Figure 22. Output Data Delay Time
vs Supply Voltage
(LOW)
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Figure 23. Output Data Delay Time
vs Supply Voltage
(HIGH)
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BRCH064GWZ-3
Typical Performance Curves‐continued
2
SU:STO (µs)
2
1.5
BUF (µs)
Stop Condition Setup Time: t
Ta=-40°C
Ta= 25°C
Ta= 85°C
Bus Free Time: t
1
SPEC
0.5
1.5
SPEC
1
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.5
0
0
-0.5
0
1
2
3
4
5
0
6
1
2
5
6
Figure 25. Bus Free Time vs Supply Voltage
Figure 24. Stop Condition Setup Time
vs Supply Voltage
6
0.6
Noise Spike Width (SCL HIGH):tI(µs)
SPEC
5
WR(ms)
4
Supply Voltage: Vcc(V)
Supply Voltage: Vcc(V)
Write Cycle Time: t
3
4
3
2
Ta=-40°C
Ta= 25°C
Ta= 85°C
1
0
0.5
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.4
0.3
0.2
0.1
SPEC
0
0
1
2
3
4
5
6
0
Supply Voltage: Vcc(V)
2
3
4
5
6
Supply Voltage: Vcc(V)
Figure 26. Write Cycle Time vs Supply Voltage
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Figure 27. Noise Spike Width
vs Supply Voltage
(SCL HIGH)
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BRCH064GWZ-3
Typical Performance Curves‐continued
0.6
0.5
0.4
Noise Spike Width (SDA HIGH): tI(µs)
Noise Spike Width (SCL LOW): tI(µs)
0.6
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.3
0.2
0.1
SPEC
0
0.5
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.4
0.3
0.2
0.1
SPEC
0
0
1
2
3
4
5
6
0
1
2
Supply Voltage: Vcc(V)
5
6
Figure 29. Noise Spike Width
vs Supply Voltage
(SDA HIGH)
1.2
0.5
1
HD:WP (µs)
0.6
Ta=-40°C
Ta= 25°C
Ta= 85°C
WP Hold Time: t
Noise Spike Width (SDA LOW): tI(µs)
4
Supply Voltage: Vcc(V)
Figure 28. Noise Spike Width
vs Supply Voltage
(SCL LOW)
0.4
3
0.3
0.2
0.1
SPEC
0.8
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.6
0.4
0.2
SPEC
0
0
0
1
2
3
4
5
6
0
Supply Voltage: Vcc(V)
2
3
4
5
6
Supply Voltage: Vcc(V)
Figure 31. WP Hold Time vs Supply Voltage
Figure 30. SDA Noise Spike Width (LOW)
vs Supply Voltage
(SDA LOW)
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BRCH064GWZ-3
Typical Performance Curves‐continued
0.2
1.2
SPEC
( µs)
0
-0.1
HIGH:WP
Ta=-40°C
Ta= 25°C
Ta= 85°C
WP High Period: t
WP Setup Time: t
SU:WP(µs)
0.1
-0.2
-0.3
-0.4
-0.5
-0.6
SPEC
1
0.8
Ta=-40°C
Ta= 25°C
Ta= 85°C
0.6
0.4
0.2
0
0
1
2
3
4
5
6
0
1
2
3
4
5
Supply Voltage: Vcc(V)
Supply Voltage: Vcc(V)
Figure 32. WP Setup Time vs Supply Voltage
Figure 33. WP High Period vs Supply Voltage
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Datasheet
BRCH064GWZ-3
Timing Chart
1.
I2C BUS Data Communication
BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long,
and acknowledge is always required after each byte. I2C BUS data communication with several devices is possible by
connecting with 2 communication lines: serial data (SDA) and serial clock (SCL).
Among the devices, there should be a “master” that generates clock and control communication start and end. The rest
become “slave” which are controlled by an address peculiar to each device, like this EEPROM. The device that outputs
data to the bus during data communication is called “transmitter”, and the device that receives data is called “receiver”.
I2 C
SDA
1-7
SCL
S
START ADDRESS
condition
8
9
R/W
ACK
1-7
8
DATA
9
1-7
ACK
Figure 34. Data Transfer Timing
DATA
8
9
ACK
P
STOP
condition
2.
Start Condition (Start Bit Recognition)
(1) Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when SCL
is 'HIGH' is necessary.
(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition
is satisfied, any command cannot be executed.
3.
Stop Condition (Stop Bit Recognition)
(1) Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW' to 'HIGH' while SCL is
'HIGH'.
4.
Acknowledge (ACK) Signal
(1) The acknowledge (ACK) signal is a software rule to show whether data transfer has been made normally or not. In
a master-slave communication, the device (Ex. µ-COM sends slave address input for write or read command, to
this IC ) at the transmitter (sending) side releases the bus after output of 8bit data.
(2) The device (Ex. This IC receives the slave address input for write or read command from the µ-COM) at the
receiver (receiving) side sets SDA 'LOW' during the 9th clock cycle, and outputs acknowledge signal (ACK signal)
showing that it has received the 8bit data.
(3) This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal) 'LOW'.
(4) After receiving 8bit data (word address and write data) during each write operation, this IC outputs acknowledge
signal (ACK signal) 'LOW'..
(5) During read operation, this IC outputs 8bit data (read data) and detects acknowledge signal (ACK signal) 'LOW'.
When acknowledge signal (ACK signal) is detected, and stop condition is not sent from the master (µ-COM) side,
this IC continues to output data. When acknowledge signal (ACK signal) is not detected, this IC stops data transfer,
recognizes stop condition (stop bit), and ends read operation. Then this IC becomes ready for another
transmission.
5.
Device Addressing
(1) Slave address comes after start condition from master.
(2) The significant 4 bits of slave address are used for recognizing a device type.
The device code of this IC is fixed to '1010'.
(3) Next slave addresses (A2 0 0 --- device address) are for selecting devices, and plural ones can be used on a
same bus according to the number of device addresses.
(4) The most insignificant bit ( R / W --- READ / WRITE ) of slave address is used for designating write or read
operation, and is as shown below.
Setting R / W to 0 ------- write (setting 0 to word address setting of random read)
Setting R / W to 1 ------- read
Maximum number of
Connected buses
Slave address
1
――
0 1 0 A2 0 0 R/W
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Write Command
1.
Write Cycle
(1) Arbitrary data can be written to this EEPROM. When writing only 1 byte, Byte Write is normally used, and when
writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. Up to 32 arbitrary
bytes can be written.
S
T
A
R
T
SDA
LINE
SLAVE
ADDRESS
W
R
I
T
E
1 0 1 0 A2 0 0
1st WORD
ADDRESS
* * *
2nd WORD
ADDRESS
WAWA
12 11
WA
0
A
C
K
R A
/ C
W K
S
T
O
P
DATA
D7
*Don't Care bit
D0
A
C
K
A
C
K
Figure 35. Byte Write Cycle
S
T
A
R
T
SDA
LINE
W
R
I
T
E
SLAVE
ADDRESS
1 0 1 0 A2 0 0
1st WORD
ADDRESS(n)
***
2nd WORD
ADDRESS(n)
WA WA
DATA(n)
WA
D7
0
12 11
R A
/ C
W K
A
C
K
S
T
O
P
DATA(n+31)
D0
D0
*Don't Care bit
A
C
K
A
C
K
A
C
K
Figure 36. Page Write Cycle
(2)
(3)
(4)
(5)
(6)
During internal write execution, all input commands are ignored, therefore ACK is not returned.
Data is written to the address designated by word address (n-th address)
By issuing stop bit after 8bit data input, internal write to memory cell starts.
When internal write is started, command is not accepted for tWR (5ms at maximum).
Using page write cycle, writing in bulk is done as follows: When data of more than 32 bytes is sent, the bytes in
excess overwrites the data already sent first.
(Refer to "Internal Address Increment".)
(7) As for page write cycle where 2 or more bytes of data is intended to be written, after the 8 significant bits of word
address are designated arbitrarily, only the value of 5 least significant bits in the address is incremented internally,
so that data up to 32 addresses of memory only can be written.
1 page=32bytes, but the page Write Cycle Time is 5ms at maximum for 32byte bulk write.
It does not stand 5ms at maximum × 32byte=160ms(Max)
2.
Internal Address Increment
Page Write Mode
1Eh
WA7
WA6
WA5
WA4
WA3
WA2
WA1
WA0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
0
1
1
0
1
1
0
0
1
0
Significant bit is fixed.
No digit up
3.
Increment
For example, when it is started from address 1Eh,
then, increment is made as below,
1Eh→1Fh→00h→01h･･･ please take note.
※1Eh･･･1E in hexadecimal, therefore,
00011110 becomes a binary number.
Write Protect (WP) Terminal
Write Protect (WP) Function
When WP terminal is set at Vcc (H level), data rewrite of all addresses is prohibited. When it is set at GND (L level), data
rewrite of all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L level. Do not
leave it open.
At extremely low voltage at power ON / OFF, by setting the WP terminal 'H', write error can be prevented.
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Read Command
1. Read Cycle
Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random
read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a
command to read data of internal address register without designating an address, and is used when to verify just after
write cycle. In both the read cycles, sequential read cycle is available where the next address data can be read in
succession.
S
T
A
R
T
W
R
I
T
E
SLAVE
ADDRESS
SDA
LINE
1 0
1 0 A2 0 0
0
0
1st WORD
ADDRESS
（ｎ）
S
T
A
R
T
2nd WORD
ADDRESS(n)
WA
WAWA
R A
/ C
WK
A
C
K
SLAVE
ADDRESS
A
C
K
0 0
S
T
O
P
DATA(n)
1 0 1 0 A2 0 0
0
* * * 12 11
R
E
A
D
D7
*Don't Care bit
D0
R A
/ C
W K
A
C
K
Figure 37. Random Read Cycle
S
T
A
R
T
SDA
LINE
R
E
A
D
SLAVE
ADDRESS
1 0 1 0
A2
DATA(n)
0 0
0
S
T
O
P
D7
D0
A
C
K
R A
/ C
WK
Figure 38. Current Read Cycle
S
T
A
R
T
SDA
LINE
SLAVE
ADDRESS
R
E
A
D
1 0 1 0 A2 0 0
0
0
DATA(n)
D7
R A
/ C
W K
S
T
O
P
DATA(n+x)
D0
D7
A
C
K
A
C
K
D0
A
C
K
Figure 39. Sequential Read Cycle (in the case of Current Read Cycle)
(1) In Random Read Cycle, data of designated word address can be read.
(2) When the command just before current read cycle is random read cycle, current read cycle (each including sequential
read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address, is output.
(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (µ-COM) side, the next
address data can be read in succession.
(4) Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal goes from ‘L’ to ‘H’
while SCL signal is 'H' .
(5) When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.
Therefore, read command cycle cannot be ended. To end the read command cycle, be sure to input 'H' to ACK signal
after D0, and the stop condition where SDA goes from ‘L’ to ‘H’ while SCL signal is 'H'.
(6) Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is asserted from
‘L’ to ‘H’ while SCL signal is 'H'.
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Software Reset
Software reset is executed to avoid malfunction after power on and during command input. Software reset has several
kinds and 3 kinds of them are shown in the figure below. (Refer to Figure 40.-(a), Figure 40.-(b), and Figure 40.-(c).) Within
the dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output and read data '0' (both 'L' level) may
be output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to
instantaneous power failure of system power source or influence upon devices.
Dummy clock×14
SCL
1
2
Start×2
13
Normal command
14
SDA
Normal command
Figure 40.-(a) The case of dummy clock×14 + START+START+ command input
SCL
Start
Dummy clock×9
Start
1
2
8
Normal command
9
SDA
Normal command
Figure 40.-(b) The case of START + dummy clock×9 + START + command input
Start×9
SCL
1
2
3
7
8
Normal command
9
SDA
Normal command
SD
A
Figure 40.-(c) START×9 + command input
※Start command from START input.
Acknowledge Polling
During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic
write execution after write cycle input, next command (slave address) is sent.If the first ACK signal sends back 'L', then it
means end of write operation, else 'H' is returned, which means writing is still in progress. By the use of acknowledge
polling, next command can be executed without waiting for tWR = 5ms.
To write continuously, R / W = 0, then to carry out current read cycle after write, slave address with R / W = 1 is sent. If
ACK signal sends back 'L', then execute word address input and data output and so forth.
During internal write,
ACK = HIGH is returned.
First write command
S
T
A
R
T
Write Command
S
T
O
P
S
T Slave
A
R Address
T
S
T Slave
A
R Address
T
A
C
K
H
A
C
K
H
…
tWR
Second write command
…
S
T Slave
A
R Address
T
tWR
A
C
K
H
S
T Slave
A
R Address
T
A
C
K
L
Word
Address
A
C
K
L
Data
A
C
K
L
S
T
O
P
After completion of internal write,
ACK=LOW is returned, so input next
word address and data in succession.
Figure 41. Case of continuous write by Acknowledge Polling
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WP Valid Timing (Write Cancel)
WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so on, pay attention to the following WP valid
timing. During write cycle execution, inside cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte
write cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in D0 of
data(in page write cycle, the first byte data) is the cancel invalid area.
WP input in this area becomes ‘Don't care’. The area from the rise of SCL to take in D0 to the stop condition input is the
cancel valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status.
・Rise of D0 taken clock
・Rise of SDA
SCL
SCL
SDA
D1
D0
ACK
SDA
Enlarged view
SDA
S
T Slave
A
R Address
T
A
C Word
K Address
L
D0
ACK
Enlarged view
A
C D7 D6 D5 D4 D3 D2 D1 D0
K
L
WP cancel invalid area
A
C
K
L
Data
A
C
K
L
S
T
O
P
WP cancel valid area
tWR
WP cancel invalid area
WP
Data is not written.
Figure 42. WP Valid Timing
Command Cancel by Start Condition and Stop Condition
During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure
43.) However, within ACK output area and during data read, SDA bus may output 'L'. In this case, start condition and stop
condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by
start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not
determined. Therefore, it is not possible to carry out current read cycle in succession. To carry out read cycle in succession,
carry out random read cycle.
SCL
SDA
1
0
1
0
Start condition
Stop condition
Figure 43. Case of cancel by start, stop condition during Slave Address Input
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I/O Peripheral Circuit
1. Pull Up Resistance of SDA Terminal
SDA is NMOS open drain, so it requires a pull up resistor. As for this resistance value (RPU), select an appropriate value
from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The smaller
the RPU, the larger is the supply current (Read).
2. Maximum Value of RPU
The maximum value of RPU is determined by the following factors:
(1)SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(2)The bus’ electric potential ○
A to be determined by the input current leak total (IL) of the device connected to the bus
with output of 'H' to the SDA line and RPU should sufficiently secure the input 'H' level (VIH) of microcontroller and
EEPROM including recommended noise margin of 0.2Vcc.
VCC - ILRPU - 0.2 VCC VIH
Microcontroller
EEPROM
0.8VCC - VIH
IL
∴ RPU
RPU
Ex.) Vcc =3V IL=10µA VIH=0.7 Vcc
from(2)
∴ RPU
SDA terminal
A
IL
IL
0.8 3 - 0.7 3
10 10 -6
Bus Line
Capacity
CBUS
30 [k]
Figure 44. I/O Circuit Diagram
3. Minimum Value of RPU
The minimum value of RPU is determined by the following factors:
(1)When IC outputs LOW, it should be satisfied that VOLMAX=0.4V and IOLMAX=3mA.
VCC - VOL
IOL
RPU
∴ RPU
VCC - VOL
IOL
(2)VOLMAX=0.4V should secure the input 'L' level (VIL) of microcontroller and EEPROM
including the recommended noise margin of 0.1Vcc.
VOLMAX VIL - 0.1VCC
Ex.) VCC =3V, VOL=0.4V, IOL=3mA, microcontroller, EEPROM VIL=0.3Vcc
from (1)
∴ RPU
3 - 0.4
3 10 -3
867 []
And
VOL = 0.4 [V ]
VIL = 0.3 × 3
= 0.9
[V ]
Therefore, the condition (2) is satisfied.
4. Pull-up Resistance of SCL Terminal
When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time
where SCL becomes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several kΩ to several ten kΩ is
recommended in consideration of drive performance of output port of microcontroller.
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Cautions on Microcontroller Connection
1. RS
In I2C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input / output of
tri state to SDA port, insert a series resistance RS between the pull up resistor RPU and the SDA terminal of EEPROM.
This is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON
simultaneously. RS also plays the role of protecting the SDA terminal against surge. Therefore, even when SDA port is
open drain input/output, RS can be used.
ACK
RPU
SCL
RS
SDA
'H' output of microcontroller
Microcontroller
EEPROM
'L' output of EEPROM
Over current flows to SDA line by 'H'
output of microcontroller and 'L'
output of EEPROM.
Figure 45. I/O Circuit Diagram
Figure 46. Input / Output Collision Timing
2. Maximum Value of RS
The maximum value of RS is determined by the following relations:
(1)SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(2)The bus’ electric potential ○
A to be determined by RPU and RS the moment when EEPROM outputs 'L' to SDA bus
should sufficiently secure the input 'L' level (VIL) of microcontroller including recommended noise margin of 0.1Vcc.
VCC
RPU A
RS
VOL
IOL
Ex)VCC=3V
Bus line
capacity
CBUS
VIL Micro controller
(VCC - VOL) RS
VOL 0.1VCC VIL
RPU RS
VIL - VOL - 0.1VCC
∴ RS
RPU
1.1VCC - VIL
RS
EEPROM
VIL=0.3VCC
VOL=0.4V
RPU=20kΩ
0.3 3 - 0.4 - 0.1 3
20 103
1.1 3 - 0.3 3
1.67 [k]
Figure 47. I/O Circuit Diagram
3. Minimum Value of RS
The minimum value of RS is determined by over current at bus collision. When over current flows, noises in power source
line and instantaneous power failure of power source may occur. When allowable over current is defined as I, the
following relation must be satisfied. Determine the allowable current in consideration of the impedance of power source
line in set and so forth. Set the over current to EEPROM at 10mA or lower.
RPU
RS
'L'output
Over current I
EX) VCC=3V I=10mA
'H' output
Microcontroller
VCC
I
RS
VCC
Rs
I
EEPROM
Rs
Figure 48. I/O circuit diagram
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I/O Equivalence Circuit
1. Input (SCL, WP, TEST)
Figure 49. Input Pin Circuit Diagram
2. Input / Output (SDA)
Figure 50. Input / Output Pin Circuit Diagram
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Power-Up/Down Conditions
At power on, the IC’s internal circuits may go through unstable low voltage area as the Vcc rises, making the IC’s internal
logic circuit not completely reset, hence, malfunction may occur. To prevent this, the IC is equipped with POR circuit and
LVCC circuit. To assure the operation, observe the following conditions at power on.
1. Set SDA = 'H' and SCL ='L' or 'H’
2. Start power source so as to satisfy the recommended conditions of t R, tOFF, and Vbot for operating POR circuit.
tR
VCC
Recommended conditions of tR, tOFF,Vbot
tR
tOFF
Vbot
0
Figure 51.
tOFF
Vbot
10ms or below
10ms or larger
0.3V or below
100ms or below
10ms or larger
0.2V or below
Rise Waveform Diagram
3. Set SDA and SCL so as not to become 'Hi-Z'.
When the above conditions 1 and 2 cannot be observed, take the following countermeasures.
(1) In the case when the above condition 1 cannot be observed such that SDA becomes 'L' at power on.
→Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.
VCC
tLOW
SCL
SDA
After Vcc becomes stable
After Vcc becomes stable
tDH
tSU:DAT
Figure 52. When SCL= 'H' and SDA= 'L'
tSU:DAT
Figure 53. When SCL='L' and SDA='L'
(2) In the case when the above condition 2 cannot be observed.
→After power source becomes stable, execute software reset(Page 16).
(3) In the case when the above conditions 1 and 2 cannot be observed.
→Carry out (1), and then carry out (2).
Low Voltage Malfunction Prevention Function
LVCC circuit prevents data rewrite operation at low power and prevents
data rewrite is prevented.
write error. At LVCC voltage (Typ =1.2V) or below,
Noise Countermeasures
1. Bypass Capacitor
When noise or surge gets in the power source line, malfunction may occur, therefore, it is recommended to connect a
bypass capacitor (0.1µF) between the IC’s Vcc and GND pins. Connect the capacitor as close to the IC as possible. In
addition, it is also recommended to attach a bypass capacitor between the board’s Vcc and GND.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
11.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when
no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins
have voltages within the values specified in the electrical characteristics of this IC.
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TSZ02201-0R2R0G100720-1-2
11.May.2015 Rev.002
Datasheet
BRCH064GWZ-3
Part Numbering
B
R
C H
0
6 4
G W Z
-
3
E 2
BUS type
C：I2C
Revision
Capacity
064=64K
Package
GWZ：UCSP30L1A
Process Code
Packaging and forming specification
E2：: Embossed tape and reel
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Datasheet
BRCH064GWZ-3
Physical Dimension Tape and Reel Information
Package Name
UCSP30L1A(BRCH064GWZ-3)3
1PIN MARK
LOT No.
1.0±0.05
ADM
0.06
0.33MAX
1.5±0.05
S
S
0.06
0.05
AB
0.3±0.05
6-φ 0.20±0.05
A
B
0.4
B
A
1
2
0.35±0.05
3
P=0.4×2
(Unit : mm)
< Tape and Reel Information >
Tape
Embossed carrier tape
Quantity
6000pcs
Direction of feed
E2
The direction is the pin 1 of product is at the upper left when you
hold reel on the left hand and you pull out the tape on the right hand
1234
1234
Reel
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1234
1234
1234
1234
Direction of feed
1pin
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TSZ02201-0R2R0G100720-1-2
11.May.2015 Rev.002
Datasheet
BRCH064GWZ-3
Marking Diagram
UCSP30L1A(BRCH064GWZ-3)
(TOP VIEW)
1PIN MARK
Part Number Marking
A D M
LOT Number
Revision History
Date
Revision
16.Jan.2015
001
New Release
11.May.2015
002
Correction of Marking Diagram from ADJM to ADM
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Changes
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11.May.2015 Rev.002
Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001