BR25H128F-2LB : Memory

Datasheet
Serial EEPROM Series Industrial EEPROM
125℃ Operation SPI BUS EEPROM
BR25H128F-2LB
General Description
This is the product guarantees long time support in Industrial market.
BR25H128F-2LB is a serial EEPROM of SPI BUS interface method.
Features
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Package
Long Time Support a Product for Industrial
Applications.
High speed clock action up to 10MHz (Max.)
Wait function by HOLDB terminal.
Part or whole of memory arrays settable as read only
memory area by program.
2.5V to 5.5V single power source action most
suitable for battery use.
Page write mode useful for initial value write at
factory shipment.
For SPI bus interface (CPOL, CPHA)=(0, 0), (1, 1)
Self-timed programming cycle.
Low Supply Current
At write operation (5V)
: 1.2mA (Typ.)
At read operation (5V)
: 1.0mA (Typ.)
At standby operation (5V) : 0.1μA (Typ.)
Address auto increment function at read operation
Prevention of write mistake
Write prohibition at power on.
Write prohibition by command code (WRDI).
Write prohibition by WPB pin.
Write prohibition block setting by status registers
(BP1, BP0).
Prevention of write mistake at low voltage.
Data at shipment Memory array: FFh, status register
WPEN, BP1, BP0 : 0
More than 100 years data retention.
More than 1 million write cycles.
W(Typ.) x D(Typ.) x H(Max.)
SOP8
5.00mm x 6.20mm x 1.71mm
Application
Industrial Equipment
Page write
Number of pages
64 Byte
Product Number
BR25H128F-2LB
BR25H128F-2LB
Capacity
Bit Format
Product Number
Supply Voltage
Package
128Kbit
16Kx8
BR25H128F-2LB
2.5V to 5.5V
SOP8
○Product structure：Silicon monolithic integrated circuit
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©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product has no designed protection against radioactive rays
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27.Feb.2014 Rev.002
Datasheet
BR25H128F-2LB
Absolute maximum ratings (Ta=25°C)
Parameter
Symbol
Limits
Unit
VCC
-0.3 to +6.5
V
Pd
0.56
W
Storage Temperature Range
Tstg
-65～+150
°C
Operating Temperature Range
Topr
-40 to +125
°C
－
-0.3 to VCC+0.3
V
Supply Voltage
Permissible Dissipation
Terminal Voltage
Remarks
When using at Ta=25℃ or higher 4.5mW to be reduced per 1℃.
Memory cell characteristics (VCC=2.5V to 5.5V)
Limits
Unit
Parameter
Write Cycles *1
Data Retention *1
Condition
Min.
Typ.
Max.
1,000,000
－
－
Cycles
Ta≦85°C
500,000
－
－
Cycles
Ta≦105°C
300,000
－
－
Cycles
Ta≦125°C
100
－
－
Years
Ta≦25°C
60
－
－
Years
Ta≦105°C
50
－
－
Years
Ta≦125°C
*1: Not 100% TESTED
Recommended Operating Ratings
Parameter
Supply Voltage
Symbol
Limits
VCC
2.5 to 5.5
Vin
0 to VCC
Unit
V
Input Voltage
Input / output capacity (Ta=25°C, frequency=5MHz)
Parameter
Input Capacity *2
Symbol
Conditions
Min
Max
CIN
VIN=GND
－
8
COUT
VOUT=GND
－
8
Unit
pF
Output Capacity *2
*2: Not 100% TESTED
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Datasheet
BR25H128F-2LB
DC characteristics (Unless otherwise specified, Ta=-40°C to +125°C, VCC=2.5V to 5.5V)
Limits
Parameter
Symbol
Unit Conditions
Min.
Typ.
Max.
VCC
+0.3
0.3x
VCC
Input High Voltage
VIH
0.7xVCC
－
Input Low Voltage
VIL
-0.3
－
Output Low Voltage
VOL
0
－
Output High Voltage
VOH
VCC-0.5
ILI
Input Leakage
Current
Output Leakage
Current
V
2.5V≦VCC≦5.5V
V
2.5V≦VCC≦5.5V
0.4
V
IOL=2.1mA
－
VCC
V
IOH=-0.4mA
-2
－
2
μA
VIN=0V to VCC
ILO
-2
－
2
μA
VOUT=0V to VCC, CSB=VCC
ICC1
－
－
2.5
VCC=2.5V,fSCK=5MHz, tE/W=4ms
mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byte write, Page write, Write status register
ICC2
－
－
5.5
VCC=5.5V,fSCK=5 or 10 MHz, tE/W=4ms
mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byte write, Page write, Write status register
ICC3
－
－
1.5
VCC=2.5V,fSCK=5MHz
mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
ICC4
－
－
2.0
VCC=5.5V,fSCK=5MHz
mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
ICC5
－
－
4.0
VCC=5.5V,fSCK=10MHz
mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
ISB
－
－
10
μA
Supply Current
(WRITE)
Supply Current
(READ)
Standby Current
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VCC=5.5V
CSB=HOLDB=WPB=VCC,
SCK=SI=VCC or =GND, SO=OPEN
TSZ02201-0R1R0G100370-1-2
27.Feb.2014 Rev.002
Datasheet
BR25H128F-2LB
AC characteristics (Ta=-40°C to +125°C, unless otherwise specified, load capacity CL1=100pF)
Parameter
2.5V≦VCC≦5.5V
Symbol
4.5V≦VCC≦5.5V
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
SCK Frequency
fSCK
－
－
5
－
－
10
MHz
SCK High Time
tSCKWH
85
－
－
40
－
－
ns
SCK Low Time
tSCKWL
85
－
－
40
－
－
ns
CSB High Time
tCS
85
－
－
40
－
－
ns
CSB Setup Time
tCSS
90
－
－
30
－
－
ns
CSB Hold Time
tCSH
85
－
－
30
－
－
ns
SCK Setup Time
tSCKS
90
－
－
30
－
－
ns
SCK Hold Time
tSCKH
90
－
－
30
－
－
ns
SI Setup Time
tDIS
20
－
－
10
－
－
ns
SI Hold Time
tDIH
30
－
－
10
－
－
ns
Data Output Delay Time1
Data Output Delay Time2
tPD1
－
－
60
－
－
40
ns
(CL2=30pF)
tPD2
－
－
50
－
－
30
ns
Output Hold Time
tOH
0
－
－
0
－
－
ns
Output Disable Time
tOZ
－
－
100
－
－
40
ns
tHFS
0
－
－
0
－
－
ns
tHFH
40
－
－
30
－
－
ns
tHRS
0
－
－
0
－
－
ns
tHRH
70
－
－
30
－
－
ns
tHOZ
－
－
100
－
－
40
ns
tHPD
－
－
70
－
－
40
ns
tRC
－
－
1
－
－
1
μs
SCK Fall Time
tFC
－
－
1
－
－
1
μs
OUTPUT Rise Time*1
tRO
－
－
40
－
－
40
ns
tFO
－
－
40
－
－
40
ns
tE/W
－
－
4
－
－
4
ms
HOLDB Setting
Setup Time
HOLDB Setting
Hold Time
HOLDB Release
Setup Time
HOLDB Release
Hold Time
Time from HOLDB
to Output High-Z
Time from HOLDB
to Output Change
SCK Rise Time*1
*1
OUTPUT Fall Time
*1
Write Time
*1 NOT 100% TESTED
AC measurement conditions
Parameter
Symbol
Limits
Min.
Typ.
Max.
Unit
Input Voltage
Load Capacity 1
CL1
－
－
100
pF
Load Capacity 2
CL2
－
－
30
pF
Input Rise Time
－
－
－
50
ns
Input Fall Time
－
－
－
50
ns
Input Voltage
Input / Output
Judgment Voltage
－
0.2VCC/0.8VCC
－
0.3VCC/0.7VCC
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V
V
4/28
0.8Vcc
Input/Output judgement voltage
0.7Vcc
0.3Vcc
0.2Vcc
Figure 1. Input/Output judgment voltage
TSZ02201-0R1R0G100370-1-2
27.Feb.2014 Rev.002
Datasheet
BR25H128F-2LB
Serial Input / Output Timing
tCSS
tCS
CSB
tSCKS
tSCKWL
tRC
tSCKWH
tFC
SCK
tDIS tDIH
SI
High-Z
SO
Figure 2. Input timing
SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the most significant bit MSB.
tCS
tCSH tSCKH
CSB
SCK
SI
tPD
tRO,tFO
tOH
tOZ
High-Z
SO
Figure 3. Input / Output timing
SO is output in sync with data fall edge of SCK. Data is output from the most significant bit MSB.
"H"
CSB
"L"
tHFS
tHFH
tHRS tHRH
SCK
tDIS
SI
n
n+1
tHOZ
SO
n-1
tHPD
High-Z
Dn
Dn+1
Dn
Dn-1
HOLDB
Figure 4. HOLD timing
Block diagram
CSB
VOLTAGE
INSTRUCTION DECODE
DETECTION
CONTROL CLOCK
SCK
GENERATION
SI
WRITE
HIGH VOLTAGE
INHIBITION
GENERATOR
INSTRUCTION
REGISTER
HOLDB
STATUS REGISTER
ADDRESS
REGISTER
14bit
ADDRESS
DECODER
14bit
128K
EEPROM
WPB
DATA
REGISTER
READ/WRITE
8bit
AMP
8bit
SO
Figure 5. Block diagram
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Datasheet
BR25H128F-2LB
Pin Configuration
TOP VIEW
VCC
HOLDB
SCK
SI
BR25H010-2C
BR25H128F-2LB
CSB
SO
WPB
GND
Figure 6. Pin assignment diagram
Pin Descriptions
Terminal
number
Terminal
name
Input
/Output
1
CSB
Input
Chip select input
2
SO
Output
Serial data output
3
WPB
Input
4
GND
－
5
SI
Input
Start bit, ope code, address, and serial data input
6
SCK
Input
Serial clock input
7
HOLDB
Input
Hold input
Command communications may be suspended
temporarily (HOLD status)
8
VCC
－
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©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Function
Write protect input
Write status register command is prohibited.
All input / output reference voltage, 0V
Power source to be connected
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Datasheet
BR25H128F-2LB
Typical Performance Curves
6
6
Ta= -40℃
Ta= 25℃
Ta= 125℃
Ta= -40℃
Ta= 25℃
Ta= 125℃
5
INPUT LOW VOLTAGE : VIL ［V］
INPUT HIGH VOLTAGE :VIH ［V］
5
4
3
SPEC
2
4
3
2
SPEC
1
1
0
0
0
1
2
3
4
5
6
0
1
SUPPLY VOLTAGE : VCC［V］
2
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
Figure 7. Input High Voltage VIH
(CSB,SCK,SI,HOLDB,WPB)
Figure 8. Input Low Voltage VIL
(CSB,SCK,SI,HOLDB,WPB)
1
3
Ta= -40℃
OUTPUT HIGH VOLTAGE : VOH ［V］
OUTPUT LOW VOLTAGE : VOL［V］
2.5
Ta= 25℃
Ta= 125℃
0.8
0.6
SPEC
0.4
SPEC
2
Ta= -40℃
Ta= 25℃
Ta= 125℃
1.5
1
0.2
0.5
0
0
0
1
2
3
4
5
6
-1.2
OUTPUT LOW CURRENT : IOL［mA］
Figure 9. Output Low Voltage
-0.8
-0.6
-0.4
-0.2
0
OUTPUT HIGH CURRENT : IOH［mA］
VOL, IOL (Vcc=2.5V)
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-1
Figure 10. Output High Voltage VOH, IOH (Vcc=2.5V)
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27.Feb.2014 Rev.002
Datasheet
BR25H128F-2LB
Typical Performance Curves‐Continued
4
CURRENT CONSUMPTION AT WRITE ACTION : Icc1, 2［mA］
3.0
INPUT LEAKAGE CURRENT: ILI［μA］
2.5
SPEC
2.0
Ta= -40℃
1.5
Ta= 25℃
Ta= 125℃
1.0
0.5
0.0
SPEC
Ta= -40℃
Ta= 25℃
3
Ta= 125℃
2
SPEC
1
0
0
1
2
3
4
5
0
6
1
SUPPLY VOLTAGE : VCC [V]
2
3
4
5
6
SUPPLY VOLTAGE : VCC ［V］
Figure 11. Input Leakage Current ILI
(CSB,SCK,SI,HOLDB,WPB)
Figure 12. Output Leakage Current ILO(SO)(Vcc=5.5V)
6
2.5
SPEC
Ta= -40℃
Ta= 25℃
2
Ta= -40℃
Ta= 25℃
Ta= 125℃
SUPPLY CURRENT (READ) : Icc3, 4 ［mA］
SUPPLY CURRENT (WRITE) : Icc1, 2［mA］
SPEC
Ta= 125℃
5
4
3
SPEC
2
SPEC
1.5
1
0.5
1
0
0
0
1
2
3
4
5
0
6
SUPPLY VOLTAGE : VCC［V］
2
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
Figure 14. Supply Current (READ) ICC3,4
Figure 13. Supply Current (WRITE) ICC1,2
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TSZ02201-0R1R0G100370-1-2
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Datasheet
BR25H128F-2LB
Typical Performance Curves‐Continued
5
12
SPEC
Ta= -40℃
Ta= 25℃
4
10
SPEC
STANDBY CURRENT : ISB ［μ A］
SUPPLY CURRENT : Icc5 ［mA］
Ta= 125℃
3
2
8
Ta= -40℃
Ta= 25℃
6
Ta= 125℃
4
1
2
0
0
0
1
2
3
4
5
6
0
1
2
SUPPLY VOLTAGE : VCC ［V］
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
Figure 15. Supply Current (READ) ICC5
Figure.16
100
Standby Current ISB
100
SPEC
SCK HIGH TIME : tSCKWH［ns］
SCK FREQUENCY : fSCK [MHz]
80
10
SPEC
SPEC
Ta= -40℃
1
Ta= 25℃
Ta= -40℃
Ta= 25℃
Ta= 125℃
60
SPEC
40
Ta= 125℃
20
0.1
0
0
1
2
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
Figure 17. SCK Frequency
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0
1
2
3
4
5
SUPPLY VOLTAGE : VCC［V］
Figure 18. SCK High Time tSCKWH
fSCK
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6
Datasheet
BR25H128F-2LB
Typical Performance Curves‐Continued
100
100
SPEC
SPEC
80
CSB HIGH TIME : tCS［ns］
SCK LOW TIME : tSCKWL［ns］
80
Ta= -40℃
Ta= 25℃
Ta= 125℃
60
SPEC
40
Ta= -40℃
Ta= 25℃
60
Ta= 125℃
SPEC
40
20
20
0
0
0
1
2
3
4
5
0
6
1
2
3
4
5
6
5
6
SUPPLY VOLTAGE : VCC［V］
SUPPLY VOLTAGE : VCC［V］
Figure 20. CSB High Time tCS
Figure 19. SCK Low Time tSCKWL
100
100
SPEC
SPEC
80
80
60
CSB HOLD TIME : tCSH ［ns ］
CSB SETUP TIME : tCSS ［ns ］
Ta= -40℃
Ta= 25℃
Ta= -40℃
Ta= 25℃
Ta= 125℃
40
SPEC
20
Ta= 125℃
60
40
SPEC
20
0
0
0
1
2
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
1
2
3
4
SUPPLY VOLTAGE : VCC［V］
Figure 22. CSB Hold Time tCSH
Figure 21. CSB Setup Time tCSS
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Datasheet
BR25H128F-2LB
Typical Performance Curves‐Continued
50
50
40
40
Ta= -40℃
Ta= 25℃
Ta= 125℃
Ta= -40℃
Ta= 25℃
SI HOLD TIME : tDIH ［ ns］
SI SETUP TIME : tDIS［ns］
Ta= 125℃
30
SPEC
20
SPEC
30
20
SPEC
SPEC
10
10
0
0
0
1
2
3
4
5
6
0
1
SUPPLY VOLTAGE : VCC［V］
Figure 23. SI Setup Time tDIS
3
4
5
6
Figure 24. SI Hold Time tDIH
100
100
Ta= -40℃
Ta= 25℃
Ta= 125℃
80
DATA OUTPUT DELAY TIME2 : tPD2 ［ns］
80
DATA OUTPUT DELAY TIME : tPD1 ［ ns］
2
SUPPLY VOLTAGE : VCC［V］
SPEC
60
SPEC
40
Ta= -40℃
Ta= 25℃
Ta= 125℃
60
SPEC
40
SPEC
20
20
0
0
0
1
2
3
4
5
0
6
2
3
4
5
6
Figure 26. Data Output Delay Time tPD2 (CL=30pF)
Figure 25. Data Output Delay Time tPD1 (CL=100pF)
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SUPPLY VOLTAGE : VCC［V］
SUPPLY VOLTAGE : VCC［V］
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27.Feb.2014 Rev.002
Datasheet
BR25H128F-2LB
Typical Performance Curves‐Continued
120
50
SPEC
SPEC
100
［ns ］
Ta= -40℃
Ta= 25℃
Ta= 125℃
80
HOLDB SETTING HOLD TIME : tHFH
OUTPUT DISABLE TIME : tOZ ［ ns］
40
60
SPEC
40
Ta= -40℃
Ta= 25℃
30
SPEC
Ta= 125℃
20
10
20
0
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
SUPPLY VOLTAGE : VCC［V］
Figure 28. HOLDB Setting Hold Time tHFH
Figure 27.Output Disable Time tOZ
100
120
［ns］
SPEC
SPEC
TIME FROM HOLDB TO OUTPUT HIGH-Z : tHOZ
HOLDB RELEASE HOLD TIME : tHRH
［ns ］
80
60
Ta= -40℃
Ta= 25℃
Ta= 125℃
40
SPEC
20
0
90
Ta= -40℃
Ta= 25℃
60
Ta= 125℃
SPEC
30
0
0
1
2
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
1
2
3
4
5
6
SUPPLY VOLTAGE : VCC［V］
Figure 30. Time from HOLDB to Output High-Z
Figure 29. HOLDB Release Hold Time tHRH
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tHOZ
TSZ02201-0R1R0G100370-1-2
27.Feb.2014 Rev.002
Datasheet
BR25H128F-2LB
Typical Performance Curves‐Continued
100
Ta= -40℃
Ta= 25℃
Ta= 125℃
80
Ta= -40℃
Ta= 25℃
Ta= 125℃
80
SPEC
OUTPUT RISE TIME : tRO ［ns］
TIME FROM HOLDB TO OUTPUT CHANGE : tHPD［ns］
100
60
SPEC
40
20
60
SPEC
40
20
0
0
0
1
2
3
4
5
6
0
1
SUPPLY VOLTAGE : VCC［V］
Figure 31. Time from HOLDB to Output Change tHPD
3
4
5
6
Figure 32. Output Rise Time tRO
100
8
Ta= -40℃
Ta= 25℃
Ta= 125℃
Ta= -40℃
Ta= 25℃
Ta= 125℃
6
WRITE TIME : tE/W ［ms］
80
OUTPUT FALL TIME : tFO ［ ns］
2
SUPPLY VOLTAGE : VCC［V］
60
SPEC
40
SPEC
4
2
20
0
0
0
1
2
3
4
5
6
1
2
3
4
5
6
Figure 34. Write Cycle Time tE/W
Figure 33. Output Fall Time tFO
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BR25H128F-2LB
Features
○Status registers
This IC has status registers. The status registers are of 8 bits and express the following parameters.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when power source is turned off.
Number of data rewrite times and data hold time are same as characteristics of the EEPROM.
WEN can be set by write enable command and write disable command. WEN becomes write disable status when power
source is turned off. R/B is for write confirmation, therefore cannot be set externally.
The value of status register can be read by read status command.
Status registers
Product number
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
BR25H128F-2LB
WPEN
0
0
0
BP1
BP0
WEN
bit
Memory
location
WPEN EEPROM
bit 0
――
R /B
Function
Contents
WPB pin enable / disable designation bit
This enables / disables the functions of WPB pin.
WPEN=0=invalid , WPEN=1=valid
BP1
BP0
EEPROM
EEPROM write disable block designation bit
This designates the write disable area of
EEPROM. Write designation areas of product
numbers are shown below.
WEN
Register
Write and write status register write enable
/ disable status confirmation bit
This confirms prohibited status or permitted
status of the write and the write status register.
WEN=0=prohibited , WEN=1=permitted
――
R /B
Register
Write cycle status (READY / BUSY) confirmation bit
R/B=0=READY , R/B=1=BUSY
This confirms READY status or BUSY status of
the write cycle.
Write disable block setting
BP1
BP0
BR25H128F-2LB
0
0
None
0
1
3000h-3FFFh
1
0
2000h-3FFFh
1
1
0000h-3FFFh
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○WPB pin
By setting WPB=LOW, write command is prohibited. As for BR25H128F-2LB, only when WPEN bit is set “1”, the WPB pin
functions become valid. And the write command to be disabled at this moment is WRSR. However, when write cycle is in
execution, no interruption can be made.
Product number
WRSR
WRITE
BR25H128F-2LB
Prohibition possible
but WPEN bit “1”
Prohibition
impossible
○HOLDB pin
By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.
Command mode
Command
Contents
Ope codes
WREN
Write enable
Write enable command
0000
0110
WRDI
Write disable
Write disable command
0000
0100
READ
Read
Read command
0000
0011
WRITE
Write
Write command
0000
0010
Status register read command
0000
0101
Status register write command
0000
0001
RDSR
WRSR
Read status
register
Write status
register
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BR25H128F-2LB
Timing Chart
1. Write enable (WREN) / disable (WRDI) cycle
WREN (WRITE ENABLE): Write enable
CSB
SCK
0
SI
0
SO
High-Z
1
2
0
3
0
4
0
5
0
6
1
7
1
0
Figure 35. Write enable command
WRDI (WRITE DISABLE): Write disable
CSB
SCK
0
SI
1
0
2
0
0
3
0
4
5
0
6
1
0
7
0
High-Z
SO
Figure 36. Write disable
○This IC has write enable status and write disable status. It is set to write enable status by write enable command, and
it is set to write disable status by write disable command. As for these commands, set CSB LOW, and then input the
respective ope codes. The respective commands accept command at the 7-th clock rise. Even with input over 7 clocks,
command becomes valid.
When to carry out write and write status register command, it is necessary to set write enable status by the write enable
command. If write or write status register command is input in the write disable status, commands are cancelled. And even in
the write enable status, once write and write status register command is executed. It gets in the write disable status. After
power on, this IC is in write disable status.
2. Read command (READ)
～
～
～
～
CSB
～
～
0
1
2
3
4
5
6
7
8
9
10
11
23
～
～
SCK
24
30
～
～
0
0
0
0
0
1
1
＊
＊
A13
A12
A1
～
～
0
～
～
SI
A0
～
～
Product
number
BR25H128F-2LB
～
～
SO
High-Z
D7
D6
D2
D1
D0
Address
length
A13-A0
*=Don’t Care
Figure 37. Read command
By read command, data of EEPROM can be read. As for this command, set CSB LOW, then input address after read ope
code. EEPROM starts data output of the designated address. Data output is started from SCK fall of 23 clock, and from D7 to
D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, data
of the next address can be read. Increment read can read all the addresses of EEPROM. After reading data of the most
significant address, by continuing increment read, data of the most insignificant address is read.
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3. Write command (WRITE)
～
～
～
～
CSB
～
～
0
3
0
4
0
0
5
6
0
7
1
8
9
＊
＊
0
11
A13 A12
10
23
24
30
A1
A0
D7
～
～
31
D6
D2
D0
D1
～
～
SO
0
2
～
～
SI
1
～ ～
～
～
0
～
～
SCK
High-Z
＊=Don't Care
Product
number
BR25H128F-2LB
Address
length
A13-A0
Figure 38. Write command
CSB 立ち上げ有効区間
～
～
～
～
CSB
～
～
～
～
1
2
3
4
5
6
7
9
8
10
11
23
24
25
0
0
0
1
0
*
*
A13 A12
32
33
～
～
0
A1
A0
D7
D6
～
～
0
～
～
D1
D0
D7
D6
D7
D6
D0
n= up to 64 bytes
～
～
SO
0
31
～
～
～
～
SI
(8n+24)-8 (8n+24)-7 (8n+24)-2 (8n+24)-1 8n+24
30
～
～
0
～
～
SCK
High-Z
＊=Don’t care
Figure 39. N Byte page write command
By write command, data of EEPROM can be written. As for this command, set CSB LOW, then input address and data
after write ope code. Then, by making CSB HIGH, the EEPROM starts writing. The write time of EEPROM requires time of
tE/W (Max 4ms). During tE/W, other than status read command is not accepted. Start CSB after taking the last data (D0),
and before the next SCK clock starts. At other timing, write command is not executed, and this write command is
cancelled. This IC has page write function, and after input of data for 1 byte (8 bits), by continuing data input without
starting CSB, data up to 64 bytes can be written for one tE/W. In page write, the insignificant 6 bit of the designated
address is incremented internally at every time when data of 1 byte is input and data is written to respective addresses.
When data of the maximum bytes or higher is input, address rolls over, and previously input data is overwritten.
Write command is executed when CSB rises between the SCK clock rising edge to recognize the 8th bits of data input and
the next SCK rising edge. At other timings the write command is not executed and cancelled (Figure.48 valid timing c). In
page write, the CSB valid timing is every 8 bits. If CSB rises at other timings page write is cancelled together with the write
command and the input data is reset.
This column addresses are
Top address of this page
64byte
page0
page 1
page 2
・
・
・
page m-1
page *2 m
0000h
0040h
0080h
・
・
・
n-127
n-63
0001h
0041h
0081h
・
・
・
n-126
n-62
0002h
0042h
0082h
・
・
・
n-125
n-61
･･･
･･･
･･･
・
・
・
･･･
･･･
003Eh
007Eh
00FEh
・
・
・
n-65
n-1
003Fh
007Fh
00FFh
・
・
・
n-64
*1
n
*1 n=16383d=3FFFh : BR25H128F-2LB
*2 m=255 : BR25H128F-2LB
This column addresses are
the last address of this page
Figure 40. EEPROM physical address for Page write command (64Byte)
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BR25H128F-2LB
○Example of Page write command
No.
Addresses of Page0
0000h
0001h
0002h
････
003Eh
003Fh
①
Previous data
00h
01h
02h
････
3Eh
3Fh
②
2 bytes input data
AAh
55h
-
････
-
-
③
After No.②
AAh
55h
02h
････
3Eh
3Fh
AAh
55h
AAh
････
AAh
55h
④
66 byte input data
FFh
00h
-
････
-
-
FFh
00h
AAh
････
AAh
55h
⑤
After No.④
a：In case of input the data of No.② which is 2 bytes page write command for the data of No.①, EEPROM data changes
like No.③.
b：In case of input the data of No.④ which is 66 bytes page write command for the data of No.①, EEPROM data changes
like No.⑤.
c：In case of a or b, when write command is cancelled, EEPROM data keep No.①.
In page write command, when data is set to the last address of a page (e.g. address “007Fh” of page 1), the next data will be
set to the top address of the same page (e.g. address “0040h” of page 1). This is why page write address increment is
available in the same page. As a reference, if of 64 bytes, page write command is executed for 2 bytes the data of the other
62 bytes without addresses will not be changed.
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4. Status register write / read command
CSB
SCK
0
SI
0
1
2
0
0
3
4
0
5
0
6
0
0
7
1
8
9
bit7
bit6
WPEN
＊
10
bit5
＊
11
12
bit4
13
bit3
＊
14
bit2
BP1 BP0
15
bit1
bit0
＊
＊
High-Z
SO
＊=Don't care
Figure 41. Status register write command
Write status register command can write status register data. The data can be written by this command are 3 bits, that is,
WPEN (bit7), BP1 (bit3) and BP0 (bit2) among 8 bits of status register. By BP1 and BP0, write disable block of EEPROM
can be set. As for this command, set CSB LOW, and input ope code of write status register, and input data. Then, by
making CSB HIGH, EEPROM starts writing. Write time requires time of tE/W as same as write. As for CSB rise, start CSB
after taking the last data bit (bit0), and before the next SCK clock starts. At other timing, command is cancelled. Write
disable block is determined by BP1 and BP0, and the block can be selected from 1/4 of memory array, 1/2, and entire
memory array. (Refer to the write disable block setting table.)
To the write disabled block, write cannot be made, and only read can be made.
*
CSB
SCK
SI
SO
0
0
1
0
2
0
3
0
4
0
High-Z
5
1
7
6
0
8
9
10
11
12
13
14
15
1
bit7
bit6
bit5
bit4
WPEN
0
0
0
bit3
bit2
BP1 BP0
bit1
bit0
WEN R/B
Figure 42. Status register read command
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At standby
○Current at standby
Set CSB “H”, and be sure to set SCK, SI, WPB, HOLDB input “L” or “H”. Do not input intermediate electric potential.
○Timing
As shown in Figure.43, at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is
read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.
Even if CSB is fallen at SCK=SI=”H”,
SI status is not read at that edge.
CSB
Command start here. SI is read.
SCK
0
1
2
SI
Figure 43. Operating timing
WPB cancel valid area
WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command and
write command, pay attention to the following WPB valid timing.
Write status register command is executed, by setting WPB = “L” in cancel valid area, command can be cancelled. The Data
area (from 7clock fall to 16clock rise) becomes the cancel valid area. However, once write is started, any input cannot be
cancelled. WPB input becomes Don’t Care, and cancellation becomes invalid.
CSB
SCK
6
7
15
Ope Code
16
tE/W
Data write time
Data
Invalid
Valid
Invalid
Figure 44. WPB valid timing (WRSR)
CSB
SCK
6
7
Ope code
Invalid
8
31
23
Address
Invalid
32
Data
tE/W
Data write time
Invalid
Invalid
Figure 45. WPB valid timing (WRITE)
HOLDB pin
By HOLDB pin, command communication can be stopped temporarily (HOLD status). The HOLDB pin carries out command
communications normally when it is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the
HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release
the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point
before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD
status, by starting A4 address input, read can be restarted. When in HOLD status, leave CSB LOW. When it is set
CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.
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Method to cancel each command
○READ
・Method to cancel : cancel by CSB = “H”
Ope code
8 bits
Address
Data
16 bits
8 bits
Cancel available in all areas of read mode
Figure 46 READ cancel valid timing
○RDSR
・Method to cancel : cancel by CSB = “H”
Data
Ope code
8 bits
8 bits
Cancel available in all
areas of rdsr mode
Figure 47 RDSR cancel valid timing
○WRITE,PAGE WRITE
a：Ope code, address input area.
Cancellation is available by CSB=”H”
b：Data input area (D7 to D1 input area)
Cancellation is available by CSB=”H”
c：Data input area (D0 area)
When CSB is started, write starts.
After CSB rise, cancellation cannot be made by any means.
d：tE/W area.
Cancellation is available by CSB = “H”. However, when
write starts (CSB is started) in the area c, cancellation
cannot be made by any means. And by inputting on
SCK clock, cancellation cannot be made. In page write
mode, there is write enable area at every 8 clocks.
Ope code
8bits
Address
Data
16bits
8bits
a
tE/W
b
d
c
SCK
SI
D7
D6
D5
D4
D3
D2
D1
D0
c
b
Figure 48. WRITE cancel valid timing
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore
write it once again.
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,
therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.
○WRSR
a：From ope code to 15 rise.
Cancel by CSB =”H”.
b：From 15 clock rise to 16 clock rise (write enable area).
When CSB is started, write starts.
After CSB rise, cancellation cannot be made by any means.
c：After 16 clock rise.
Cancel by CSB=”H”. However, when write starts (CSB is started)
in the area b, cancellation cannot be made by any means.
And, by inputting on SCK clock, cancellation cannot be made.
14
SCK
15
D1
SI
b
c
tE/W
Data
8 bits
17
D0
a
Ope code
16
8 bits
a
c
b
Figure 49. WRSR cancel valid timing
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,
therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.
○WREN/WRDI
a：From ope code to 7-th clock rise, cancel by CSB = “H”.
b：Cancellation is not available when CSB is started after 7-th clock.
7
SCK
8
9
Ope code
8 bits
a
b
Figure 50. WREN/WRDI cancel valid timing
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High speed operation
In order to realize stable high speed operations, pay attention to the following input / output pin conditions.
○Input terminal pull up, pull down resistance
When to attach pull up, pull down resistance to EEPROM input terminal, select an appropriate value for the
microcontroller VOL, IOL from VIL characteristics of this IC.
○Pull up resistance
Microcontroller
IOLM
RPU
VOLM
VILE
“L” output
RPU≧
VCC-VOLM
IOLM
･･･①
VOLM≦
VILE
･･･②
EEPROM
Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA,
from the equation ①,
5-0.4
RPU≧
2×10-3
“L” input
・VILE :EEPROM VIL specifications
・VOLM :Microcontroller VOL specifications
・IOLM :Microcontroller IOL specifications
∴RPU≦
Figure 51. Pull up resistance
2.3[kΩ]
With the value of Rpu to satisfy the above equation, VOLM
becomes 0.4V or lower, and with VILE (=1.5V), the equation ② is
also satisfied.
And, in order to prevent malfunction, mistake write at power ON/OFF, be sure to make CSB pull up.
○Pull down resistance
Microcontroller
VOHM
VOHM
RPD≧
EEPROM
VIHE
VOHM≧
“H” output
IOHM
RPD
･･･③
IOHM
“H” input
･･･④
VIHE
Example) When VCC=5V, VOHM=VCC-0.5V, IOHM＝0.4mA,
VIHE=VCC×0.7V, from the equation③,
RPD≧
Figure 52. Pull down resistance
∴RPU≧
5-0.5
0.4×10-3
11.3[kΩ]
Further, by amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting signal of amplitude of
VCC / GND level to input, more stable high speed operations can be realized. On the contrary, when amplitude of 0.8VCC /
*1
0.2VCC is input, operation speed becomes slow.
In order to realize more stable high speed operation, it is recommended to make the values of RPU, RPD as large as possible,
and make the amplitude of signal input to EEPROM close to the amplitude of VCC / GND level.
ж
( 1 At this moment, operating timing guaranteed value is guaranteed.)
tPD_VIL characteristics
80
70
Spec
tPD[ns]
60
50
40
30
Vcc=2.5V
Ta=25℃
VIH=Vcc
CL=100pF
20
10
0
0
0.2
0.4
VIL[V]
0.6
0.8
1
Figure 53. VIL dependency of data output delay time tPD
○SO load capacity condition
Load capacity of SO output terminal affects upon delay characteristic of SO output. (Data output delay time, time from
HOLDB to High-Z) In order to make output delay characteristic into higher speed, make SO load capacity small. In concrete,
“Do not connect many devices to SO bus”, “Make the wire between the controller and EEPROM short”, and so forth.
○Other cautions
Make the wire length from the microcontroller to EEPROM input signal same length, in order to prevent setup / hold violation
to EEPROM, owing to difference of wire length of each input.
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I/O equivalence circuit
○Output circuit
SO
OEint.
Figure 54. SO output equivalent circuit
○Input circuit
RESETint.
CSB
Figure 55. CSB input equivalent circuit
SCK
SI
Figure 57. SI input equivalent circuit
Figure 56. SCK input equivalent circuit
WPB
HOLDB
Figure 59. WPB input equivalent circuit
Figure 58. HOLDB input equivalent circuit
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Power-Up/Down conditions
○At power ON/OFF, set CSB “H” (=VCC).
When CSB is “L”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may
cause malfunction, mistake write or so. To prevent these, at power ON, set CSB “H”. (When CSB is in “H” status, all inputs
are canceled.)
Vcc
Vcc
GND
Vcc
CSB
GND
Good
example
Bad
example
Figure 60. CSB timing at power ON/OFF
(Good example) CSB terminal is pulled up to VCC.
At power OFF, take 10ms or higher before supply. If power is turned on without observing this condition, the IC internal
circuit may not be reset, which please note.
(Bad example)
CSB terminal is “L” at power ON/OFF.
In this case, CSB always becomes “L” (active status), and EEPROM may have malfunction, mistake write owing to noises
and the likes.
Even when CSB input is High-Z, the status becomes like this case, which please note.
○LVCC circuit
LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ. =1.9V) or below, it prevent data rewrite.
○P.O.R. circuit
This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable
status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the
recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to
noises and the likes.
Recommended conditions of tR, tOFF, Vbot
tR
Vcc
tOFF
Vbot
tR
tOFF
Vbot
10ms or below
10ms or higher
0.3V or below
100ms or below
10ms or higher
0.2V or below
0
Figure 61. Rise waveform
Noise countermeasures
○VCC noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a bypass capacitor (0.1μF) between IC VCC and GND. At that moment, attach it as close to IC as
possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND.
○SCK noise
When the rise time (tR) of SCK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock
bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set about
0.2V, if noises exist at SCK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time
(tR) of SCK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures.
Make the clock rise, fall time as small as possible.
○WPB noise
During execution of write status register command, if there exist noises on WPB pin, mistake in recognition may occur and
forcible cancellation may result, which please note. To avoid this, a Schmitt trigger circuit is built in WPB input. In the same
manner, a Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.
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Datasheet
BR25H128F-2LB
Operational Notes
(1) Described numeric values and data are design representative values, and the values are not guaranteed.
(2) Application circuit
Although we can recommend the application circuits contained herein with a relatively high degree of confidence, we
ask that you verify all characteristics and specifications of the circuit as well as its performance under actual conditions.
Please note that we cannot be held responsible for problems that may arise due to patent infringements or
noncompliance with any and all applicable laws and regulations.
(3)
Absolute maximum ratings
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit
between pins or an open circuit between pins. Therefore, it is important to consider circuit protection measures, such as
adding a fuse, in case the IC is operated over the absolute maximum ratings.
(4) Ground Voltage
The voltage of the ground pin must be the lowest voltage of all pins of the IC at all operating conditions. Ensure that no
pins are at a voltage below the ground pin at any time, even during transient condition.
(5) Thermal consideration
Use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (Pd) in
actual operating conditions. Consider Pc that does not exceed Pd in actual operating conditions (Pc≥Pd).
Package Power dissipation
: Pd (W)=(Tjmax－Ta)/θja
Power dissipation
: Pc (W)=(Vcc－Vo)×Io+Vcc×Ib
Tjmax : Maximum junction temperature=150℃, Ta : Peripheral temperature[℃] ,
θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],
Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current
(6) Short between pins and mounting errors
Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong
orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.
(7) Operation under strong electromagnetic field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
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Datasheet
BR25H128F-2LB
Part Numbering
B
R
2
5
H
1
2
8
F
－
2
L B H
2
BUS Type
25: SPI
Operating temperature/
Operating voltage
H: -40°C to +125°C /
2.5V to5.5V
Capacity
128 = 128K
Package
F : SOP8
Process code
Product class
LB for Industrial applications
Packaging and forming specification
H2：Embossed tape and reel (SOP8)
Marking Diagram
SOP8(TOP VIEW)
Part Number Marking
H
1
2
8
LOT Number
1PIN MARK
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Datasheet
BR25H128F-2LB
Physical Dimension Tape and Reel Information
Package Name
SOP8
Max 5.35 (include. BURR)
Drawing: EX112-5001-1
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BR25H128F-2LB
Revision History
Date
Revision
Changes
15.Nov. 2013
001
New Release
27.Feb. 2014
002
Delete sentence “and log life cycle” in General Description and Futures.
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Datasheet
Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice - SS
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice - SS
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.001