PLL602-38N

PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
FEATURES
•
DESCRIPTION
X1
1
X2
2
GND
3
GND
4
PLL602-38N
•
•
•
•
Low phase noise output (-125dBc @ 10kHz frequency offset).
12MHz to 25MHz crystal input.
48MHz to 100MHz PECL output.
3.3V operation.
Available in Green (RoHS Compliant) 8-Pin
SOIC package.
PIN CONFIGURATION
(Top View)
8
VDD
7
CLKB
6
VDD
5
CLK
The PLL602-38N is a high performance and low
phase noise PECL XO IC chip. It provides phase
noise performance as low as –125dBc at 10kHz offset and a typical RMS jitter of 4.5pS RMS ( at
100MHz ). It accepts a fundamental parallel resonant
mode crystal input from 12MHz to 25MHz.
BLOCK DIAGRAM
XIN
XOUT
Oscillator
Amplifier
PLL
(Phase
Locked
Loop)
Q
Q
PLL602-38N
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/26/10 Page 1
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
PIN DESCRIPTIONS
Name
TSSOP
Pin number
Type
X1
X2
GND
CLK
VDD
CLKC
1
2
3,4
5
6,8
7
I
I
P
O
P
O
Description
Crystal input. See Crystal Specifications on page 2.
Crystal output. See Crystal Specifications on page 2.
Ground.
True output PECL.
Power Supply.
Complementary output PECL.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
Supply Voltage
Input Voltage, dc
Output Voltage, dc
V DD
VI
VO
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
TS
TA
TJ
MIN.
MAX.
UNITS
-0.5
-0.5
4.6
V DD +0.5
V DD +0.5
V
V
V
150
85
125
260
2
°C
°C
-65
-40
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. General Electrical Specifications
PARAMETERS
Supply Current, Dynamic (with
Loaded Outputs)
Operating Voltage
Short Circuit Current
SYMBOL
CONDITIONS
I DD
48MHz < Fout < 100MHz
V DD
MIN.
TYP.
2.97
MAX.
UNITS
65
mA
3.63
V
mA
±50
3. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Rating
Recommended ESR
SYMBOL
CONDITIONS
MIN.
F XIN
C L (xtal)
Parallel Fundamental Mode
12
RE
TYP.
MAX.
UNITS
25
MHz
pF
30
Ω
20
AT cut
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/26/10 Page 2
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
4. Jitter Specifications
PARAMETERS
CONDITIONS
Period jitter RMS
Period jitter Peak-to-Peak
Integrated jitter RMS
FREQUENCY
With capacitive decoupling
between VDD and GND.
Over 10,000 cycles.
With capacitive decoupling
between VDD and GND.
Over 10,000 cycles.
Integrated 12 kHz to 20 MHz
MIN.
TYP.
MAX.
UNITS
100.00MHz
4.3
ps
100.00MHz
27
ps
100.00MHz
2.6
4
ps
5. Phase Noise Specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz
@1kHz
@10kHz
@100kHz
UNITS
Phase Noise relative to
carrier (typical)
100.00MHz
-65
-95
-120
-125
-121
dBc/Hz
6. PECL Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
Output High Voltage
V OH
V DD – 1.025
Output Low Voltage
V OL
R L = 50 Ω to (V DD – 2V)
(see figure)
MAX.
UNITS
V
V DD – 1.620
V
7. PECL Switching Characteristics
PARAMETERS
SYMBOL
Clock Rise Time
Clock Fall Time
Duty Cycle
tr
tf
CONDITIONS
MIN.
20% to 80% of signal
80% to 20% of signal
Measured @ 50% of signal
PECL Levels Test Circuit
OUT
MAX.
UNITS
50
600
600
55
ps
ps
%
PECL Output Skew
OUT
VDD
50Ω
300
300
45
TYP.
2.0V
50%
50Ω
OUT
tSKEW
OUT
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
80%
50%
20%
OUT
tR
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/26/10 Page 3
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
PACKAGE INFORMATION
8 PIN SOIC (in mm )
Symbol
A
A1
B
C
D
E
H
L
e
Min.
1.35
0.10
0.33
0.19
4.80
3.80
5.80
0.40
Nom
Max.
1.55
1.75
.175
0.25
0.43
0.53
0.23
0.27
4.90
5.00
3.90
4.00
6.00
6.20
0.645
0.89
1.27 BSC
E
H
D
A
A1
C
L
B
e
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
2880 Zanker Road, San Jose, CA 95134 USA
Tel: (408) 571-1668 Fax: (408) 571-1688
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL602-38N X C - R
NONE= TUBE
R=TAPE and REEL
PART NUMBER
PACKAGE TYPE
S=SOIC
TEMPERATURE
C=COMMERCIAL
Order Number
PLL602-38NSC-R
PLL602-38NSC
Marking
P602-38N
SC
LLLLL
Package Option
SOIC 8 - Tape and Reel
SOIC 8 – Tube
*Note: LLLLL designates lot number
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/26/10 Page 4