(Preliminary) PL586-55/-58 Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) • • • • • • • DESCRIPTION 0.952mm XIN 7 XOUT 8 6 5 Q 4 VCON The PL586-55/-58 is a non-multiplier VCXO IC specifically designed to pull fundamental mode crystals from 150MHz to 160MHz. This IC achieves a typical pull range of ±125ppm with <5% linearity. The phase noise performance is optimized for close-in performance and with <100fs phase jitter, makes this an ideal solution for all high end clocking applications such as SONET, WiMax, CPRI, OBSAI, Fiber Channel, and any application where performance and quality are required. QB • • Advanced non multiplier VCXO Design for High Performance Crystal Oscillators Input/Output Range: 150MHz to 160MHz Phase Noise Optimized for 155.52MHz: -64dBc @10Hz, -152dBc @100kHz Very low Phase Jitter: <100fs RMS High Pull Range: ±125ppm Linearity: <5% Integrated Variable Capacitors Complementary LVPECL Outputs Power Supply: 3.3V ±10% Available in Die or Wafer Form VDD • DIE CONFIGURATION 0.952mm FEATURES 3 VSS 2 OE Die ID 1 (0,0) OUTPUT ENABLE LOGIC PL586-55 OE State (Pad 4) Output Buffers State 0 Outputs Tri-Stated 1 (Default) Outputs Enabled * Internal 60KΩ pull-up resistor DIE SPECIFICATIONS OUTPUT ENABLE LOGIC PL586-58 Name Value Size 952 micron x 952 micron Reverse side OE State (Pad 4) Output Buffers State GND 0 (Default) Outputs Enabled Pad dimensions 80 micron x 80 micron 1 Outputs Tri-Stated Thickness 8 mil * Internal 60KΩ pull-down resistor BLOCK DIAGRAM OE XIN XOUT Xtal Osc Q QB VCON Varicap 2880 Zanker Road, San Jose, California 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 2/2/12 Page 1 (Preliminary) PL586-55/-58 Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) PAD ASSIGNMENT Pad # Name X (µ µ m)* Y (µ µ m)* Description 1 VCON -194 -365 Voltage Control input 2 XOUT -372 -190 Crystal output connection 3 XIN -372 158 Crystal input connection 4 VDD -117 329 V DD connection 5 QB 140 315 Complementary LVPECL output 6 Q 315 75 LVPECL output 7 VSS 373 -127 GND connection 8 OE 373 -373 Output enable pin. Internal pull up (-55) or pull down (-58). * Note: Referenced to center of the die. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS Supply Voltage SYMBOL MIN. V DD MAX. UNITS 4.6 V Input Voltage, DC VI V SS -0.5 V DD +0.5 V Output Voltage, DC VO V SS -0.5 V DD +0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature TA -40 85 °C HBM ESD Protection 2,000 V Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. *Operating temperature is guaranteed by design. Parts are tested to commercial grade only. 2880 Zanker Road, San Jose, California 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 2/2/12 Page 2 (Preliminary) PL586-55/-58 Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) 2. Voltage Control Crystal Oscillator PARAMETERS VCXO Stabilization Time * CONDITIONS SYMBOL T VCXOSTB VCXO Pullability * Varicap Control Range * Linearity * From power valid XTAL C 1 = 6.8, C 0 /C 1 = 265 0V ≤ VCON ≤ V DD (at 25°C) XTAL C 1 = 3.7, C 0 /C 1 = 350 0V ≤ VCON ≤ V DD (at 25°C) VCON = 0 to V DD MIN. TYP. MAX. UNITS 10 ms ± 160 ppm ± 110 ppm 0 3.3 V 0.0V ≤ VCON ≤ 3.3V 8 % 0.3V ≤ VCON ≤ 3.0V 3 % VCON Input Impedance * DC Input resistance VCON Modulation BW * 0V ≤ VCON ≤ V DD , -3dB 10 MΩ 30 kHz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 3. Crystal Specifications PARAMETERS SYMBOL Crystal Resonator Frequency F XIN Crystal Loading Rating C L (xtal) Shunt Capacitance C0 Motional Capacitance C1 Recommended ESR RE CONDITIONS Fundamental Mode, AT cut MIN. TYP. 150 VCON = 1.65V MAX. UNITS 160 MHz 5 pF 2.0 Recommended for at least ±125ppm Frequency Pulling pF fF 5.0 C 0 ≤ 2.0pF 15 Ω C 0 ≤ 1.5pF 20 Ω MAX. UNITS 50 mA 4. General Electrical Specifications PARAMETERS SYMBOL Supply Current I DD Operating Voltage V DD Output Clock Duty Cycle Short Circuit Current CONDITIONS MIN. TYP. Standard LVPECL Loading (See LVPECL Levels Test Circuit, page 4) @ V DD – 1.3V (See LVPECL Transition Time Waveform, page 4) 2.97 3.3 3.63 V 45 50 55 % ±50 mA 2880 Zanker Road, San Jose, California 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 2/2/12 Page 3 (Preliminary) PL586-55/-58 Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) 5. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. 2.5 Period Jitter pk-to-pk At 155.52MHz, with capacitive decoupling between V DD and GND. Over 10,000 cycles Integrated Jitter RMS at 155.52MHz Integrated 12 kHz to 20 MHz 90 Period Jitter RMS MAX. UNITS ps 20 fs 6. Phase Noise Specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz @1MHz @10MHz Phase Noise, relative to carrier 155.52MHz -64 92 120 143 152 156 UNITS 157 dBc/Hz MAX. UNITS Note: Phase Noise measured at VCON = 0.3V to 3.0V. 7. LVPECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. Output High Voltage V OH V DD – 1.025 V DD – 0.950 V DD – 0.880 V Output Low Voltage V OL R L = 50 Ω to (V DD – 2V) (see figure) V DD – 1.810 V DD – 1.700 V DD – 1.620 V 8. LVPECL Switching Characteristics PARAMETERS SYMBOL CONDITIONS Clock Rise Time tr Clock Fall Time tf TYP. MAX. UNITS @20/80% of output waveform 400 500 ps @80/20% of output waveform 400 500 ps LVPECL Levels Test Circuit MIN. LVPECL Transistion Time Waveform DUTY CYCLE OUT VDD 50? 2.0V 45 - 55% 55 - 45% OUT 80% 50% 50? 20% OUT OUT tR tF 2880 Zanker Road, San Jose, California 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 2/2/12 Page 4 (Preliminary) PL586-55/-58 Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) ORDERING INFORMATION For part ordering, please contact our Sales Department: 2880 Zanker Road, San Jose, CA, USA Tel: (408) 571-1668 Fax: (408) 571-1688 PART NUMBER The order number for this device is a combination of the following: Part number, Package type and Operating temperature range Order Number Packaging PL586-55DC PL586-58DC Die – Waffle Pack PL586-55WC PL586-58WC Wafer PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 2880 Zanker Road, San Jose, California 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 2/2/12 Page 5