PL502-00 - Phaselink.com

PL502-00
Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
FEATURES
DIE CONFIGURATION
•
•
•
•
•
23
il
m
2 XOUT
6
BLOCK DIAGRAM
XIN
VCXO
Selectable
PLL
VCON
CLK
19
18
13
CLK
10
GND
29
C502B
DESCRIPTION
The PL502-00 is a monolithic low jitter and low
phase noise (-125dBc @10kHz offset and
155.52MHz output), high performance CMOS VCXO
IC Die, that uses a low cost crystal (12-25MHz).
The same die can be used as a VCXO with output
frequencies ranging from F XIN x 1 to F XIN x 8 using
selector pad bonding options (see Multiplier
Selection Table on this page). This makes the
PL502-00 ideal for a wide range of applications from
12MHz to 190MHz (including 27MHz, 35.328MHz,
77.76MHz and 155.52MHz, etc.).
20
21
(1550,1475)
Die ID:
3737-37
27
XIN
S2V
25
D
D
V
S1V
•
D
D
V
^
E
O
S0V
65 mil
Integrated voltage-controlled crystal oscillator
circuitry (VCXO) (pull range 500ppm minimum).
Low phase noise (-125dBc @ 10kHz offset and
155.52MHz output)
Selectable frequency multipliers (x1, x2, x4, x8).
3.3V supply voltage.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 12 to 25MHz).
Selectable High Drive (30mA) or Standard Drive
(10mA) output.
Available in DIE (65 mil x 62 mil).
•
VCON
31
7
Y
D
N
G
(0,0)
X
Note:
^ denotes internal pull up
V
denotes internal pull down
MULTIPLIER SELECTION
SELECTION
S2
S1
S0
0
0
0
0
0
1
0
1
0
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
F XIN
CLK (MHz)
F XIN x 2
F XIN x 4
F XIN x 1
12MHz – 25MHz
F XIN x 2*
F XIN x 8
F XIN x 1*
F XIN x 4*
F XIN x 8*
Note: - Selector pads default to ‘0’, wire bond to VDD to set to ‘1’
- (*) High-drive output
PAD DESCRIPTION
DIE SPECIFICATIONS
Name
Value
Size
65 x 62 mil
Reverse side
Pad dimensions
Thickness
GND
80 micron x 80 micron
8 mil
Name
Number
Description
XIN
27
Crystal input connection.
XOUT
29
Crystal output connection.
VCON
31
Voltage Control Input.
GND
7,10
CLK
13
S[0:2]
18,19,20
VDD
21,23
OE
25
Ground.
Clock Output.
Frequency selection pads
3.3V Power Supply.
Output Enable: ‘0’ to disable (tri-state
output), ‘1’ (default value when not
connected) to enabled the output.
2880 Zanker Road, San Jose, CA 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 4/27/11 Page 1
PL502-00
Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
Supply Voltage
Input Voltage, dc
Output Voltage, dc
V DD
VI
VO
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
TS
TA
TJ
MIN.
MAX.
UNITS
-0.5
-0.5
4.6
V DD +0.5
V DD +0.5
V
V
V
150
85
125
260
2
°C
°C
°C
°C
kV
-65
-40
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. DC Electrical Specifications
PARAMETERS
Supply Current, Dynamic, with
Loaded Outputs
Operating Voltage
Output drive current
(High Drive)
Output drive current
(Standard Drive)
VCXO Control Voltage
SYMBOL
I DD
V DD
I OH
I OL
I OH
I OL
VCON
CONDITIONS
MIN.
TYP.
F XIN = 12 - 25MHz
Output load of 10pF
V OH = V DD -0.4V, V DD =3.3V
V OL = 0.4V, V DD = 3.3V
V OH = V DD -0.4V, V DD =3.3V
V OL = 0.4V, V DD = 3.3V
2.97
30
30
10
10
0
MAX.
UNITS
35
mA
3.63
V
mA
mA
mA
3.3
mA
V
MAX.
UNITS
25
MHz
3. AC Electrical Specifications
PARAMETERS
Input Crystal Frequency
Output Clock Rise/Fall Time
(Standard Drive)
Output Clock Rise/Fall Time
(High Drive)
Output Clock Duty Cycle
SYMBOL
CONDITIONS
MIN.
TYP.
12
0.3V ~ 3.0V with 15 pF load
3.0
0.3V ~ 3.0V with 15 pF load
1.2
ns
Measured @ 50% V DD
45
50
55
2880 Zanker Road, San Jose, CA 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 11/29/11 Page 2
%
PL502-00
Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
4. Voltage Control Crystal Oscillator
PARAMETERS
VCXO Stabilization Time *
SYMBOL
T VCXOSTB
VCXO Tuning Range
CLK output pullability
VCXO Tuning Characteristic
Pull range linearity
VCON pin input impedance
VCON modulation BW
CONDITIONS
From power valid
F XIN = 12 – 25MHz;
XTAL C 0 /C 1 < 250
0V ≤ VCON ≤ 3.3V
VCON=1.65V, ±1.65V
MIN.
TYP.
MAX.
UNITS
10
ms
500
ppm
150
ppm
ppm/V
%
±200
10
0V ≤ VCON ≤ 3.3V, -3dB
2000
10
kΩ
kHz
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
5. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Rating
Crystal Pullability
Recommended ESR
SYMBOL
CONDITIONS
MIN.
F XIN
C L (xtal)
Parallel Fundamental Mode
At VCON = 1.65V
12
C 0 /C 1 (xtal)
RE
TYP.
MAX.
UNITS
25
MHz
pF
250
30
-
9.5
AT cut
AT cut
Ω
Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at
nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This
however may reduce the pull range.
6. Jitter and Phase Noise specification*
PARAMETERS
RMS Period Jitter
(1 sigma – 1000 samples)
Phase Noise relative to carrier
Carrier Frequency 44MHz
Phase Noise relative to carrier
Carrier Frequency 155.52MHz
CONDITIONS
at 155MHz, with capacitive decoupling
between VDD and GND.
@100Hz offset
@1kHz offset
@10kHz offset
@100kHz offset
@1MHz offset
@100Hz offset
@1kHz offset
@10kHz offset
@100kHz offset
@1MHz offset
@10MHz offset
@40MHz offset
MIN.
TYP.
MAX.
UNITS
20
ps
-113
-130
-135
-128
-128
-100
-115
-125
-116
-114
-132
-142
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
* General condition: Control Voltage is 0V.
2880 Zanker Road, San Jose, CA 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 11/29/11 Page 3
PL502-00
Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
PAD ASSIGNMENT
Pad #
Name
X (µ
µ m)
Y (µ
µ m)
Description
7
10
13
GND
GND
CLK
1042
1400
1400
109
259
716
Ground.
Ground.
CMOS Clock Output.
18
S2
1232
1365
Used to select multiplication factor and Standard or High-Drive
output. Internal pull down.
19
S1
1042
1365
Used to select multiplication factor and Standard or High-Drive
output. Internal pull down.
20
S0
854
1365
Used to select multiplication factor and Standard or High-Drive
output. Internal pull down.
21
23
25
27
29
VDD
VDD
OE
XIN
XOUT
659
459
194
109
109
1365
1365
1365
1017
646
3.3V Power Supply.
3.3V Power Supply.
Used to Enable/Disable the output. Internal pull up. See
Crystal input. See Crystal Specifications on page 3.
Crystal output. See Crystal Specifications on page 3.
31
VCON
109
181
Voltage Control Input. 0V to 3.3V.
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
2880 Zanker Road, San Jose, CA 95134
Tel (408) 571-1668 Fax (408) 571-1688
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PL502-00 D C
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PART NUMBER
PACKAGE TYPE
D=DIE
W=SAW WAFER IN BLUE TAPE
Order Number
Marking
Package Option
PL502-00DC
N/A
Die (Waffle Pack)
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems
without the express written approval of the President of PhaseLink Corporation.
2880 Zanker Road, San Jose, CA 95134 Tel (408) 571-1668 Fax (408) 571-1688 www.phaselink.com Rev 11/29/11 Page 4