SDG5521C

SDG5521C
N-Ch: 5A, 20V, RDS(ON) 58 mΩ
Ω
P-Ch: -4.7A, -20V, RDS(ON) 77 mΩ
Ω
N & P-Ch Enhancement Mode Power MOSFET
Elektronische Bauelemente
RoHS Compliant Product
A suffix of “-C” specifies halogen & lead-free
DFN2*3
DESCRIPTION
These miniature surface mount MOSFETs
utilize a high cell density trench process to
provide low RDS(on) and to ensure minimal
power loss and heat dissipation. Typical
applications are DC-DC converters and power
management in portable and battery-powered
products such as computers, printers, PCMCIA
cards, cellular and cordless telephones.
FEATURES
Low RDS(on) provides higher efficiency and extends battery life.
Low thermal impedance copper leadframe DFN2*3
saves board space.
Fast switching speed.
High performance trench technology.
Millimeter
Min.
Max.
3.00 BSC.
1.70 BSC.
0.70
0.90
0.65 BSC.
0.08
0.25
REF.
A
B
C
D
E
PACKAGE INFORMATION
Package
MPQ
Leader Size
DFN2*3
3K
13’ inch
REF.
F
G
H
I
Millimeter
Min.
Max.
0.24
0.35
2.00 BSC.
0.20
0.40
0
0.15
Top View
ABSOLUTE MAXIMUM RATINGS (TA=25°C unless otherwise specified)
Parameter
Symbol
Rating
N-CH
P-CH
Unit
Drain-Source Voltage
VDS
20
-20
V
Gate-Source Voltage
VGS
±8
±8
V
5
-4.7
A
4.1
-3.9
A
IDM
8
-8
A
IS
4.5
-4.5
A
Continuous Drain Current
Pulsed Drain Current
1
TA = 25°C
TA = 70°C
2
Continuous Source Current (Diode Conduction)
Total Power Dissipation
1
1
TA = 25°C
TA = 70°C
Operating Junction & Storage Temperature Range
ID
PD
TJ, TSTG
2.1
W
1.3
W
-55 ~ 150
°C
62.5
°C / W
80
°C / W
Thermal Resistance Ratings
Maximum Junction-to-Ambient 1
t≦10 sec
Steady State
RθJA
Notes:
1 Surface Mounted on 1” x 1” FR4 Board.
2 Pulse width limited by maximum junction temperature.
http://www.SeCoSGmbH.com/
03-May-2013 Rev. A
Any changes of specification will not be informed individually.
Page 1 of 2
SDG5521C
N-Ch: 5A, 20V, RDS(ON) 58 mΩ
Ω
P-Ch: -4.7A, -20V, RDS(ON) 77 mΩ
Ω
N & P-Ch Enhancement Mode Power MOSFET
Elektronische Bauelemente
ELECTRICAL CHARACTERISTICS (TA=25°C unless otherwise specified)
Parameter
Symbol Ch
Min.
Typ.
Max.
Unit
Teat Conditions
Static
Gate Threshold Voltage
VGS(th)
Gate-Body Leakage
IGSS
Zero Gate Voltage Drain Current
On-State Drain Current
1
IDSS
ID(on)
N
1
-
-
P
-1
-
-
N
-
-
100
P
-
-
-100
N
-
-
1
P
-
-
-1
N
-
-
10
P
-
-
-10
N
5
-
-
P
-5
-
-
-
-
58
-
-
64
-
-
77
-
-
85
N
-
10
P
-
5
N
-
0.8
-
P
-
-0.83
-
N
Drain-Source On-Resistance
1
RDS(ON)
P
Forward Tranconductance
Diode Forward Voltage
1
1
gfS
VSD
Dynamic
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
Td(on)
Rise Time
Turn-Off Delay Time
Fall Time
Tr
Td(off)
Tf
VDS=VGS, ID=250µA
V
VDS=VGS, ID= -250µA
µA
VDS=0, VGS=8V
VDS=0, VGS= -8V
VDS=16V, VGS=0
µA
VDS= -16V, VGS=0
VDS=16V, VGS=0, TJ =55°C
VDS= -16V, VGS=0, TJ =55°C
VDS=5V, VGS=4.5V
A
VDS= -5V, VGS= -4.5V
VGS=4.5V, ID=1A
mΩ
VGS=2.5V, ID=1A
VGS= -4.5V, ID= -1A
VGS= -2.5V, ID= -1A
VDS=5V, ID=1A
S
VDS= -5V, ID= -1A
VGS=0, IS=1A
V
VGS=0, IS= -1A
2
N
-
2
-
P
-
7
-
N
-
0.4
-
P
-
1
-
N
-
0.7
-
P
-
2
-
N
-
6
-
P
-
10
-
N
-
9
-
P
-
1
-
N
-
5
-
P
-
11
-
N
-
16
-
P
-
12
-
N-Channel
ID=1A, VDS=15V, VGS=4.5V
nC
P-Channel
ID= -1A, VDS= -15V, VGS= -4.5V
N-Channel
VDD=15V, VGEN=4.5V
ID=1A, RGEN=15Ω
nS
P-Channel
VDD= -15V, VGEN= -4.5V
ID=1A, RGEN=15Ω
Notes:
1. Pulse test：PW≦300µs duty cycle≦2%.
2. Guaranteed by design, not subject to production testing.
http://www.SeCoSGmbH.com/
03-May-2013 Rev. A
Any changes of specification will not be informed individually.
Page 2 of 2