UM3212 Dual Bidirectional I2C-Bus and SMBus Voltage-Level Translator UM3212M8 MSOP8 UM3212DA DFN8 2.1×1.6 General Description The UM3212 is a dual bidirectional I2C-bus and SMBus voltage-level translator with an enable(EN) input, and is operational from 1.0 V to 3.6 V (Vref(1)) and 1.8 V to 5.5 V(Vbias(ref)(2)). The UM3212 allows bidirectional voltage translations between 1.0 V and 5 V without the use of a direction pin. The low ON-state resistance (Ron) of the switch allows connections to be made with minimal propagation delay. When EN is HIGH, the translator switch is on, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports. The UM3212 is not a bus buffer which provides both level translation and physically isolates the capacitance to either side of the bus when both sides are connected. The UM3212 only isolates both sides when the device is disabled and provides voltage level translation when active. The UM3212 can also be used to run two buses, one at 400 kHz operating frequency and the other at 100 kHz operating frequency. If the two buses are operating at different frequencies, the 100 kHz bus must be isolated when the 400 kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum system operating frequency may be less than 400 kHz because of the delays added by the translator. As with the standard I2C-bus system, pull-up resistors are required to provide the logic HIGH levels on the translator’s bus. The UM3212 has a standard open-collector configuration of the I2C-bus. The size of these pull-up resistors depends on the system, but each side of the translator must have a pull-up resistor. The device is designed to work with Standard-mode, Fast-mode and Fast-mode Plus I2C-bus devices in addition to SMBus devices. The maximum frequency is dependent on the RC time constant, but generally supports > 2 MHz. When the SDA1 or SDA2 port is LOW, the clamp is in the ON-state and a low resistance connection exists between the SDA1 and SDA2 ports. Assuming the higher voltage is on the SDA2 port when the SDA2 port is HIGH, the voltage on the SDA1 port is limited to the voltage set by VREF1. When the SDA1 port is HIGH, the SDA2 port is pulled to the drain pull-up supply voltage (Vpu(D)) by the pull-up resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control. The SCL1/SCL2 channel also functions as the SDA1/SDA2 channel. All channels have the same electrical characteristics and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the fabrication of the switch is symmetrical. The translator provides excellent ESD protection to lower voltage devices, and at the same time protects less ESD-resistant devices. Applications I2C, SMBus and SPI Level Translation Low-Voltage ASIC Level Translation Smart Card Readers Cell-Phone Cradles Portable POS Systems Portable Communication Devices Low-Cost Serial Interfaces Cell-Phones GPS Telecommunications Equipment ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 1/11 UM3212 Features 2-Bit Bidirectional Translator for SDA and SCL Lines in Mixed-Mode I2C-Bus Applications Standard-Mode, Fast-Mode, Fast-Mode Plus and HS-Mode I2C-Bus and SMBus Compatible Less than 3.5ns Maximum Propagation Delay to Accommodate Standard-Mode and Fast-Mode I2C-Bus Devices and Multiple Masters Allows Voltage Level Translation between: 1.) 1.0V VREF1 and 1.8V, 2.5V, 3.3V or 5V VREF2 2.) 1.2V VREF1 and 1.8V, 2.5V, 3.3V or 5V VREF2 3.) 1.8V VREF1 and 3.3V or 5V VREF2 4.) 2.5V VREF1 and 5V VREF2 5.) 3.3V VREF1 and 5V VREF2 Pin Configurations Open-Drain I2C-Bus I/O Ports (SCL1, SDA1, SCL2 and SDA2) Provides Bidirectional Voltage Translation with no Direction Pin Low 3.0Ω ON-State Connection between Input and Output Ports Provides Less Signal Distortion 5V Tolerant I2C-Bus I/O Ports to Support Mixed-Mode Signal Operation High-Impedance SCL1, SDA1, SCL2 and SDA2 Pins for EN = LOW Lock-up Free Operation Flow through Pinout for Ease of Printed-Circuit Board Trace Routing ESD Protection Exceeds 2000V HBM per JESD22-A114, 200V MM per JESD22-A115, and 1000V CDM per JESD22-C101 Packages Offered: MSOP8, DFN8 Top View 8 1 8 EN VREF1 2 7 VREF2 3 6 SCL2 SDA1 4 5 SDA2 GND SCL1 7 6 5 3212 XX 1 2 3 4 XX: Week Code UM3212M8 MSOP8 1 8 VREF1 2 7 VREF2 SCL1 3 6 SCL2 SDA1 4 5 SDA2 3212 M EN GND M: Month Code UM3212DA DFN8 2.1×1.6 ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 2/11 UM3212 Pin Description Pin Number 1 2 Symbol Function GND VREF1 Ground (0V). Low-voltage side reference supply voltage for SCL1 and SDA1. Serial clock, low-voltage side; connect to VREF1 through a pull-up resistor. Serial data, low-voltage side; connect to VREF1 through a pull-up resistor. Serial data, high-voltage side; connect to VREF2 through a pull-up resistor. Serial clock, high-voltage side; connect to VREF2 through a pull-up resistor. High-voltage side reference supply voltage for SCL2 and SDA2. Switch enable input; connect to VREF2 and pull-up through a high resistor. 3 SCL1 4 SDA1 5 SDA2 6 SCL2 7 VREF2 8 EN Ordering Information Part Number Packaging Type Marking Code UM3212M8 MSOP8 3212 UM3212DA DFN8 2.1×1.6 3212 Shipping Qty 3000pcs/13Inch Tape & Reel 3000pcs/7Inch Tape & Reel Absolute Maximum Ratings (Note 1) Over operating free-air temperature range (unless otherwise noted) Symbol Parameter Vref(1) Reference Voltage (1) Vbias(ref)(2) Reference Bias Voltage (2) VI VI/O Ich Value -0.5 to +6 -0.5 to +6 Unit V V Input Voltage -0.5(Note 2) to +6 V Voltage on an input/output pin -0.5(Note 2) to +6 V +128 mA Channel Current (DC) IIK Input Clamp Current -50 mA VI＜0V Tstg Storage Temperature Range -65 to +150 °C Note 1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Note 2: The input and input/output negative voltage ratings may be exceeded if the input and input/output clamp current ratings are observed. ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 3/11 UM3212 Recommended Operating Conditions Symbol Parameter Voltage on an input/ output pin Conditions SCL1, SDA1, SCL2, SDA2 Min Max Unit 0 5 V Vref(1)(Note 3) Reference Voltage (1) VREF1 0 5 V Vbias(ref)(2) (Note 3) Reference Bias Voltage (2) VREF2 0 5 V VI(EN) Input Voltage on pin EN 0 5 V Isw(pass) Pass Switch Current 64 mA +85 °C VI/O Operating in -40 free-air Note 3：Vref(1) ≤ Vbias(ref)(2) −1 V for best results in level shifting applications. Tamb Ambient Temperature Electrical Characteristics Tamb = −40 °C to +85 °C, unless otherwise specified. Symbol Parameter Conditions VIK Input Clamping Voltage HIGH-level Input Current Input Capacitance on pin EN Off-state input/output capacitance On-state input/output capacitance II = −18 mA; VI(EN) = 0 V VI= 5 V; VI(EN) = 0 V IIH Ci(EN) Cio(off) Cio(on) Ron ON-state resistance(Note 5) VI= 0 V or 3 V SCLn, SDAn; VO= 0 V or 3 V ; VI(EN) = 0V SCLn, SDAn; VO= 0 V or 3 V ; VI(EN) = 3V SCLn, SDAn; EN = 4.5V EN = 3V (Note 6) VI = 0; EN = 2.3V IO = 64mA EN = 1.5V SCLn, SDAn; EN = 4.5V VI = 2.4V; EN = 3V IO = 15mA SCLn, SDAn; VI = 1.7V; EN = 2.3V IO = 15mA Min Typ(Note 4) Max Unit -1.2 V 5 μA 13 pF 10 12.2 pF 8 12 pF 2.0 2.4 3.1 11 4.6 5.0 6.0 8.0 32 7.5 Ω 50 80 50 80 Note 4：All typical values are at Tamb = 25°C. Note 5：Measured by the voltage drop between the SCL1 and SCL2, or SDA1 and SDA2 terminals at the indicated current through the switch. ON-state resistance is determined by the lowest voltage of the two terminals. Note 6：Guaranteed by design. ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 4/11 UM3212 Switching Characteristics (translating down) Over recommended operating free-air temperature range (unless otherwise noted). Values guaranteed by design. CL=50pF CL=30pF CL=15pF Test Symbol Parameter Unit Conditions Min Max Min Max Min Max VI(EN) = 3.3 V; VIH = 3.3 V; VIL = 0 V; VM =1.15V(see Figure 1). LOW to HIGH from (input) tPLH propagation 0 2.5 0 1.7 0 1.2 ns SCL2 or delay SDA2 HIGH to LOW to (output) SCL1 or tPHL propagation 0 2.5 0 2.0 0 1.3 ns SDA1. delay VI(EN) =2.5V; VIH = 2.5 V; VIL = 0 V; VM = 0.75 V (see Figure 1). LOW to HIGH from (input) tPLH propagation 0 2.5 0 1.7 0 1.2 ns SCL2 or delay SDA2 HIGH to LOW to (output) SCL1 or tPHL propagation 0 3.0 0 2.0 0 1.3 ns SDA1. delay Switching Characteristics (translating up) Over recommended operating free-air temperature range (unless otherwise noted). Values guaranteed by design. CL=50pF CL=30pF CL=15pF Test Symbol Parameter Unit Conditions Min Max Min Max Min Max VI(EN) = 3.3 V; VIH = 2.3 V; VIL = 0 V; VTT = 3.3 V; VM = 1.15 V; RL = 300 Ω(see Figure 1). LOW to HIGH from (input) tPLH propagation 0 2.35 0 1.5 0 1.0 ns SCL1 or delay SDA1 HIGH to LOW to (output) SCL2 or tPHL propagation 0 3.35 0 2.25 0 1.4 ns SDA2. delay VI(EN) =2.5V; VIH = 1.5 V; VIL = 0 V; VTT = 2.5 V; VM = 0.75 V; RL = 300 Ω (see Figure 1). LOW to HIGH from (input) tPLH propagation 0 2.35 0 1.5 0 1.0 ns SCL1 or delay SDA1 HIGH to LOW to (output) SCL2 or tPHL propagation 0 3.5 0 2.5 0 1.5 ns SDA2. delay ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 5/11 UM3212 VIH VTT VM VM input VIL RL S1 from output under test S2(OPEN) VOH CL VM VM output VOL a. Load circuit B. Timing diagram; high-impedance scope probe used S1 = translating up; S2 = translating down. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Zo = 50 Ω; tr ≤ 5 ns; tf ≤ 5 ns. The outputs are measured one at a time, with one transition per measurement. Fig 1. Load circuit for outputs Typical Application Circuit Vpu(D)=3.3V(1) 200kΩ Vref(1)=1.8V (1) UM3212 8 EN VREF1 2 RPU Vcc SCL I2C-BUS MASTER SDA GND 7 RPU RPU VREF2 RPU SCL1 SDA1 3 4 SW SW 1 6 5 SCL2 SDA2 Vcc SCL I2C-BUS DEVICE SDA GND GND (1) The applied voltages at Vref(1) and Vpu(D) should be such that Vbias(ref)(2) is at least 1 V higher than Vref(1) for best translator operation. Fig 2. Typical application circuit (switch always enabled) ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 6/11 UM3212 Vpu(D)=3.3V(1) 3.3V enable signal(1) on off 200kΩ Vref(1)=1.8V (1) UM3212 8 EN VREF1 2 RPU Vcc SCL1 SDA GND RPU RPU SCL I2C-BUS MASTER 7 RPU VREF2 SDA1 3 4 SW SW 1 6 5 SCL2 SDA2 Vcc SCL I2C-BUS DEVICE SDA GND GND (1) In the Enabled mode, the applied enable voltage VI(EN) and the applied voltage at Vref(1) should be such that Vbias(ref)(2) is at least 1 V higher than Vref(1) for best translator operation. Fig 3. Typical application circuit (switch enable control) Applications Information Bidirectional translation For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage), the EN input must be connected to VREF2 and both pins pulled to HIGH side Vpu(D) through a pull-up resistor (typically 200 kΩ). This allows VREF2 to regulate the EN input. A filter capacitor on VREF2 is recommended. The I2C-bus master output can be totem pole or open-drain (pull-up resistors may be required) and the I2C-bus device output can be totem pole or open-drain (pull-up resistors are required to pull the SCL2 and SDA2 outputs to Vpu(D)). However, if either output is totem pole, data must be unidirectional or the outputs must be 3-stateable and be controlled by some direction-control mechanism to prevent HIGH-to-LOW contentions in either direction. If both outputs are open-drain, no direction control is needed. The reference supply voltage (Vref(1)) is connected to the processor core power supply voltage. When VREF2 is connected through a 200 kΩ resistor to a 3.3 V to 5.5 V Vpu(D) power supply, and Vref(1) is set between 1.0 V and (Vpu(D) −1 V), the output of each SCL1 and SDA1 has a maximum output voltage equal to VREF1, and the output of each SCL2 and SDA2 has a maximum output voltage equal to Vpu(D). ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 7/11 UM3212 Application operating conditions Refer to Figure 2 Symbol Parameter Vbias(ref)(2) VI(EN) Vref(1) Isw(pass) Iref Reference Bias Voltage (2) Input Voltage on pin EN Reference Voltage (1) Pass Switch Current Reference Current Conditions Transistor Operating Tamb Ambient Temperature in free-air Note 7: All typical values are at Tamb = 25 °C. Vref(1) + 0.6 Vref(1) + 0.6 0 - Typ (Note 7) 2.1 2.1 1.5 14 5 -40 - Min Max Unit 5 5 4.4 - V V V mA μA +85 °C Sizing pull-up resistor The pull-up resistor value needs to limit the current through the pass transistor when it is in the ON state to about 15mA. This ensures a pass voltage of 260 mV to 350 mV. If the current through the pass transistor is higher than 15mA, the pass voltage also is higher in the ON state. To set the current through each pass transistor at 15mA, the pull-up resistor value is calculated as: RPU V pu( D ) 0.35V 0.015 A The table below summarizes resistor reference voltages and currents at 15mA, 10mA, and 3mA. The resistor values shown in the +10 % column or a larger value should be used to ensure that the pass voltage of the transistor would be 350 mV or less. The external driver must be able to sink the total current from the resistors on both sides of the UM3212 device at 0.175 V, although the 15mA only applies to current flowing through the UM3212 device Pull-up resistor values Calculated for VOL = 0.35 V; assumes output driver VOL = 0.175 V at stated current. Pull-up resistor value (Ω) 15mA 10mA 3mA Vpu(D) +10 % +10 % +10 % Nominal Nominal Nominal (Note 8) (Note 8) (Note 8) 5V 310 341 465 512 1550 1705 3.3V 197 217 295 325 983 1082 2.5V 143 158 215 237 717 788 1.8V 97 106 145 160 483 532 1.5V 77 85 115 127 383 422 1.2V 57 63 85 94 283 312 Note 8: +10 % to compensate for VCC range and resistor tolerance. ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 8/11 UM3212 Package Information UM3212M8: MSOP8 Outline Drawing D E3 L 0.750 0.750 Symbol E1 E E1 c e Ø0.60mm×0.038DP θ Top View A3 A A2 End View A1 b Side View A A1 A2 A3 b c D E E1 E3 e L θ DIMENSIONS MILLIMETERS Min Max 1.10 0.05 0.15 0.75 0.95 0.29 0.49 0.22 0.38 0.08 0.23 2.90 3.10 4.70 5.10 2.90 3.10 2.85 3.05 0.65(BSC) 0.40 0.80 0° 8° INCHES Min Max 0.044 0.002 0.006 0.030 0.038 0.012 0.020 0.009 0.015 0.003 0.009 0.116 0.124 0.188 0.204 0.116 0.124 0.114 0.122 0.026(BSC) 0.016 0.032 0° 8° 4.8 1.02 Land Pattern 0.65 0.41 NOTES: 1. Compound dimension: 3.00×3.00; 2. Unit: mm; 3.General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation 3212 XX ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 9/11 UM3212 UM3212DA: DFN8 2.1×1.6 A Outline Drawing Side View A3 A1 Symbol D D2 L E E2 Pin1 ID C0.2*45 e b Bottom View D E D2 E2 A A1 A3 b L e DIMENSIONS MILLIMETERS Min Typ 2.05 2.10 1.55 1.60 1.60 1.70 0.30 0.40 0.545 0.575 0.02 0.13TYP 0.20 0.25 0.275 0.325 0.50TYP Max 2.175 1.675 1.80 0.50 0.605 0.05 0.30 0.375 Land Pattern NOTES: 1. Compound dimension: 2.10×1.60; 2. Unit: mm; 3.General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation 3212 M ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 10/11 UM3212 IMPORTANT NOTICE The information in this document has been carefully reviewed and is believed to be accurate. Nonetheless, this document is subject to change without notice. Union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. Union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. Union Semiconductor, Inc Add: Unit 606, No.570 Shengxia Road, Shanghai 201210 Tel: 021-51093966 Fax: 021-51026018 Website: www.union-ic.com ________________________________________________________________________ http://www.union-ic.com Rev.04 Dec.2014 11/11