NC7NZ14K8X

NC7NZ14
TinyLogic® UHS Inverter with Schmitt Trigger Input
Features
Description

Ultra-High Speed: tPD 3.7 ns (Typical) into 50 pF at
5 V VCC




High Output Drive: ±24 mA at 3 V VCC



The NC7NZ14 is a single inverter with Schmitt trigger
input from Fairchild's Ultra-High Speed (UHS) series of
TinyLogic®. The device is fabricated with advanced
CMOS technology to achieve ultra-high speed with high
output drive while maintaining low static power
dissipation over a very broad VCC operating range. The
device is specified to operate over the 1.65 V to 5.5 V
VCC range. The inputs and outputs are high-impedance
when VCC is 0 V. Inputs tolerate voltages up to 7 V
independent of VCC operating voltage.
Proprietary Noise/EMI Reduction Circuitry
Broad VCC Operating Range: 1.65 V to 5.5 V
Power Down High Impedance Inputs/Outputs
Over-Voltage Tolerance Inputs Facilitate 5 V to 3 V
Translation
IEEC/IEC
Ultra-Small MicroPak™ Packages
Space-Saving US8 Surface Mount Package
Figure 1. Logic Symbol
Figure 2. Connection Diagram (Top View)
Ordering Information
Part Number
Operating
Temperature
NC7NZ14K8X
Top
Mark
NZ14
-40 to +85°C
NC7NZ14L8X
P6
Package
Packing
Method
8-Lead, US8, JEDEC MO-187, Variation CA
3.1 mm Wide
3000 Units on
Tape & Reel
8-Lead MicroPak™, 1.6 mm Wide
5000 Units on
Tape & Reel
MicroPak™is a trademarks of Fairchild Semiconductor Corporation.
TinyLogic® is a registered trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
www.fairchildsemi.com
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
April 2014
Figure 3. US8
Notes:
1. AAA represents product code top mark (see ordering table).
2. Orientation of top mark determines pin one location. Reading the top product code mark left to right, pin one is
the lower left pin.
Figure 4. MicroPak™ (Top Through View)
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
Pin Configurations
Pin Definitions
Pin # US8
Pin # MicroPak™
Name
Description
1
7
1A
Input
2
6
3Y
Output
3
5
2A
Input
4
4
GND
Ground
5
3
2Y
Output
6
2
3A
Input
7
1
1Y
Output
8
8
VCC
Supply Voltage
Function Table
Y= /A
Inputs
Output
A
Y
L
H
H
L
H = HIGH Logic Level
L = LOW Logic Level
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
www.fairchildsemi.com
2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
VCC
Supply Voltage
-0.5
7.0
V
VIN
DC Input Voltage
-0.5
7.0
V
DC Output Voltage
-0.5
7.0
V
VIN < -0.5 V
-50
mA
VOUT < -0.5 V
-50
VOUT > 6.0 V, VCC=GND
+20
VOUT
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IOUT
DC Output Current
ICC / IGND
TSTG
DC VCC or Ground Current
Storage Temperature Range
-65
mA
±50
mA
±50
mA
+150
°C
°C
TJ
Junction Temperature Under Bias
+150
TL
Junction Lead Temperature (Soldering, 10 Seconds)
+260
°C
PD
Power Dissipation at +85°C
250
mW
Human Body Model, JEDEC:JESD22-A114
4000
Charge Device Model, JEDEC:JESD22-C101
2000
ESD
V
Recommended Operating Conditions(3)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
VIN
VOUT
Parameter
Conditions
Min.
Max.
Supply Voltage Operating
1.65
5.50
Supply Voltage Data Retention
1.5
5.5
Unit
V
Input Voltage
0
5.5
V
Output Voltage
0
VCC
V
-40
+85
°C
TA
Operating Temperature
JA
Thermal Resistance
US8
250
Micropak™
400
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
Absolute Maximum Ratings
°C/W
Note:
3. Unused inputs must be held HIGH or LOW. They may not float.
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
www.fairchildsemi.com
3
Symbol
VP
VN
VH
Parameter
Positive Threshold
Voltage
Negative Threshold
Voltage
Hysteresis Voltage
VCC (V)
Typ.
Max.
Min.
Max.
1.65
0.70
1.10
1.50
0.70
1.50
2.30
1.00
1.40
1.80
1.00
1.80
3.00
1.30
1.75
2.20
1.30
2.20
4.50
1.90
2.45
3.10
1.90
3.10
5.50
2.20
2.90
3.60
2.20
3.60
1.65
0.25
0.55
0.90
0.25
0.90
2.30
0.40
0.75
1.15
0.40
1.15
3.00
0.60
1.00
1.50
0.60
1.50
4.50
1.00
1.43
2.00
1.00
2.00
5.50
1.20
1.70
2.30
1.20
2.30
1.65
0.15
0.54
1.00
0.15
1.00
2.30
0.25
0.65
1.10
0.25
1.10
3.00
0.40
0.77
1.20
0.40
1.20
4.50
0.60
1.01
1.50
0.60
1.50
5.50
0.70
1.18
1.70
0.70
1.70
1.65
1.55
1.65
1.55
2.20
2.30
2.20
2.90
3.00
2.90
4.40
4.50
4.4
3.00
VIN=VIL,
IOH=-100 µA
4.50
VOH
1.65
IOH=-4 mA
1.29
1.52
1.29
2.30
IOH=-8 mA
1.90
2.15
1.90
3.00
IOH=-16 mA
2.40
2.80
2.40
3.00
IOH=-24 mA
2.30
2.68
2.30
4.50
IOH=-32 mA
3.80
4.20
0.10
0.10
2.30
0.00
0.10
0.10
0.00
0.10
0.10
0.00
0.10
0.10
4.50
VOL
IIN
Input Leakage Current
IOFF
Power Off Leakage
Current
ICC
Quiescent Supply Current
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
V
V
3.80
0.00
VIN=VIH,
IOL=100 µA
Units
V
1.65
3.00
LOW Level Output
Voltage
TA=-40 to +85°C
Min.
2.30
HIGH Level Output
Voltage
TA=+25°C
Conditions
1.65
IOL=4 mA
0.08
0.24
0.24
2.30
IOL=8 mA
0.10
0.30
0.30
3.00
IOL=16 mA
0.15
0.40
0.40
3.00
IOL=24 mA
0.22
0.55
0.55
4.50
IOL=32 mA
0.22
0.55
0.55
±0.1
±1.0
µA
1
10
µA
1.0
10
µA
0 to 5.5
0
1.65 to 5.50
VIN=5.5 V, GND
VIN or VOUT=5.5 V
VIN=5.5 V, GND
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
DC Electrical Characteristics
V
www.fairchildsemi.com
4
Symbol
Parameter
VCC (V)
Conditions
Min. Typ.
tPLH, tPHL
Propagation Delay
TA=-40 to
+85°C
TA=+25°C
Units
Max.
Min.
Max.
1.80 ± 0.15
2.0
7.6
12.5
2.0
13.0
2.50 ± 0.20
1.0
5.0
9.0
1.0
9.5
1.0
3.7
6.3
1.0
6.5
0.5
3.1
5.2
0.5
5.5
1.5
4.4
7.2
1.5
7.5
0.8
3.7
5.9
0.8
6.2
3.30 ± 0.30
CL=15 pF,
RL=1 M
5.00 ± 0.50
3.30 ± 0.30
5.00 ± 0.50
CL=50 pF,
RL=500 
CIN
Input Capacitance
0.00
CPD
Power Dissipation
(4)
Capacitance
3.30
9
5.00
11
Figure
Figure 5
Figure 6
ns
Figure 5
Figure 6
2.5
pF
pF
Figure 7
Note:
4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
current consumption (ICCD) at no output loading and operating at 50% duty cycle. CPD is related to ICCD dynamic
operating current by the expression: ICCD=(CPD)(VCC)(fIN)+(ICCstatic).
Dynamic Switching Characteristics
Symbol
Parameter
Conditions
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
VCC
CL=50 pF, VIH=5.0 V, VIL=0 V
TA=25°c
Typ.
Unit
5.0
0.8
V
5.0
-0.8
V
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
AC Electrical Characteristics
Note:
5. CL includes load and stray capacitance;
Input PRR=1.0 MHz; tW=500 ns
Figure 5. AC Test Circuit
Figure 6. AC Waveforms
Note:
6. Input=AC Waveform; tr=tf=1.8 ns; PRR=10 MHz; Duty Cycle =50%.
Figure 7. ICCD Test Circuit
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
www.fairchildsemi.com
5
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
Physical Dimensions
2.10
1.90
0.15
A
1.80
B
5
8
(8X) 0.70
3.20
3.00
2.40
2.20
2.70
3.40
1.00
1.55
1
PIN 1 IDENT
4
0.2 C B A
ALL LEAD TIPS
0.30 (8X)
0.50
TOP VIEW
RECOMMENDED LAND PATTERN
0.80
0.60
0.90 MAX
0.10
0.00
ALL LEAD TIPS
0.1 C
A. CONFORMS TO JEDEC REGISTRATION MO-187
B. DIMENSIONS ARE IN MILLIMETERS.
SEATING
PLANE
C
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
0.17-0.27 (8X)
0.50
0.13
A B
C
D. DIMENSIONS AND TOLERANCES PER
ANSI Y14.5M, 1994.
E. FILE DRAWING NAME : MKT-MAB08Arev4
SIDE VIEW
DETAIL A
0.4 TYP
GAGE PLANE
0.10-0.18
0.12
0°-8°
0.20-0.35
SEATING PLANE
DETAIL A
Figure 8. 8-Lead US8, JEDEC MO-187, Variation CA, 3.1 mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specification
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/packaging/US8_Pack_TNR.pdf
Package Designator
K8X
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
Tape Section
Cavity Number
Leader (Start End)
125 (Typical)
Cavity Status Cover Type Status
Empty
Sealed
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (Typical)
Empty
Sealed
www.fairchildsemi.com
6
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
Physical Dimensions
0.10
2X
C
A
1.6
B
1.6
INDEX AREA
0.10
2X
C
TOP VIEW
0.55 MAX
0.05
0.05
0.00
DETAIL A
8X(0.09)
C
8X
Recommended Landpattern
0.05
C
(0.20)
1.0
2
1
4 (0.1)
C
8
4
7
0.35
0.25
3X(0.2)
0.35
0.25
0.5
3
6
5
(0.15)
0.15 8X
0.25
0.35
0.25
0.10
0.05
DETAIL A
PIN #1 TERMINAL
SCALE: 2X
C A B
C
BOTTOM VIEW
Notes:
1. PACKAGE CONFORMS TO JEDEC MO-255 VARIATION UAAD
2. DIMENSIONS ARE IN MILLIMETERS
3. DRAWING CONFORMS TO ASME Y.14M-1994
4. PIN 1 FLAG, END OF PACKAGE OFFSET
5. DRAWING FILE NAME: MKT-MAC08AREV4
MAC08AREV4
Figure 9. 8-Lead, MicroPak™, 1.0 mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specification
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf
Package Designator
L8X
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
Tape Section
Cavity Number
Cavity Status Cover Type Status
Leader (Start End)
125 (Typical)
Empty
Sealed
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (Typical)
Empty
Sealed
www.fairchildsemi.com
7
NC7NZ14 — TinyLogic® UHS Inverter with Schmitt Trigger Input
© 2001 Fairchild Semiconductor Corporation
NC7NZ14 • Rev. 1.0.2
www.fairchildsemi.com
8