FAN6862 Highly Integrated Green-Mode PWM Controller

FAN6862
Highly Integrated Green-Mode PWM Controller
Features
Description



Low Startup Current: 8µA

PWM Frequency Continuously Decreasing with
Burst Mode at Light Loads




VDD Over-Voltage Protection (OVP)
A highly integrated PWM controller, FAN6862 provides
several features to enhance the performance of flyback
converters. To minimize standby power consumption, a
proprietary green-mode function provides off-time
modulation to continuously decrease the switching
frequency under light-load conditions. Under zero-load
conditions, the power supply enters burst-mode, which
completely shuts off PWM output. Output restarts just
before the supply voltage drops below the UVLO lower
limit. This green-mode function enables power supplies
to meet international power conservation requirements.



Feedback Open-Loop Protection with 56ms Delay
Low Operating Current in Green Mode: 3mA
Peak-Current Mode Operation with Cycle-by-Cycle
Current Limiting
Constant Output Power Limit (Full AC Input Range)
Internal Latch Circuit for OVP, OTP
The FAN6862 is designed for SMPS and integrates a
frequency-hopping function that helps reduce EMI
emission of a power supply with minimum line filters.
The built-in synchronized slope compensation is
proprietary sawtooth compensation for constant output
power limit over universal AC input range. The gate
output is clamped at 18V to protect the external
MOSFET from over-voltage damage.
Fixed PWM Frequency (65KHz) with Frequency
Hopping
Soft Start Time: 4ms
400mA Driving Capability
Applications
General-purpose switch-mode power supplies and
flyback power converters, including:



Power Adapters
Open-Frame SMPS
SMPS with Surge-Current Output, such as for
Printers, Scanners, and Motor Drivers
Other protection functions include VDD over-voltage
protection and over-temperature protection. For overtemperature protection, an external NTC thermistor can
be applied to sense the ambient temperature. When VDD
OVP or OTP is activated, an internal latch circuit latches
off the controller.
Part Number
OVP
OTP
OLP
FAN6862TY
Latch
Latch
Auto Restart
FAN6862NY
Latch
Latch
Auto Restart
Ordering Information
Part Number
Operating Temperature
Range
FAN6862TY
-40 to +105°C
6-Pin SSOT-6
FAN6862NY
-40 to +105°C
8-Pin Dual In-Line Package (DIP)
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
Package
Packing Method
Tape & Reel
Tube
www.fairchildsemi.com
FAN6862 — Highly Integrated Green-Mode PWM Controller
May 2012
Figure 1. Typical Application
Block Diagram
FAN6862 — Highly Integrated Green-Mode PWM Controller
Typical Application
Figure 2. Block Diagram
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
www.fairchildsemi.com
2
FAN6862 — Highly Integrated Green-Mode PWM Controller
Marking Information
ABx:
TT:
:
_ _ _:
ABD: FAN6862TY
Wafer Lot Code
Year Code
Week Code
F – Fairchild Logo
Z – Plant Code
X – 1-Digit Year Code
Y – 1-Digit Week Code
TT – 2-Digit Die Run Code
T – Package Type (N:DIP)
P – Y: Green Package
M – Manufacture Flow Code
Figure 3. Top Mark
Pin Configuration
Figure 4. SSOT-6
Figure 5. DIP-8
Pin Definitions
Pin # DIP8
Pin #
SSOT-6
Name
8
1
GND
7
2
6
5
4
3
4
3
Ground.
FB
Feedback. The FB pin provides the output voltage regulation signal. It
provides feedback to the internal PWM comparator, so that the PWM
comparator can control the duty cycle. This pin also provide for OLP: if
VFB is larger than the trigger level and delays for a long time, the
controller stops and restarts.
NC
No Connect Pin
RT
Temperature Detection. An external NTC thermistor is connected from
this pin to GND for over-temperature protection. The impedance of the
NTC decreases at high temperatures. Once the voltage of the RT pin
drops below a threshold,
PWM output is disabled.
SENSE
Current Sense. This pin senses the voltage across a resistor. When the
voltage reaches the internal threshold, PWM output is disabled. This
activates over-current protection. This pin also provides current
amplitude information for current-mode control.
NC
No Connect Pin
Power Supply.
2
5
VDD
1
6
GATE
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
Description
Driver Output. The totem-pole output driver for driving the power
MOSFET.
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with
respect to GND pin.
Symbol
Parameter
VDD
Supply Voltage
VL
Input Voltage to FB, SENSE, RT Pin
PD
Power Dissipation at TA<50°C
ΘJC
Thermal Resistance (Junction-to-Case)
TJ
TSTG
TL
ESD
Min.
Max.
Unit
30
V
-0.3
7.0
V
SSOT-6
300
DIP-8
800
SSOT-6
115
DIP-8
67
mW
°C/W
Operating Junction Temperature
-40
+150
°C
Storage Temperature Range
-55
+150
°C
Lead Temperature, Wave Soldering, 10 Seconds
+260
°C
Human Body Model, JESD22-A114
3.00
Charge Device Model, JESD22-C101
1.25
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Ambient Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
Min.
Max.
Unit
-40
+105
°C
FAN6862 — Highly Integrated Green-Mode PWM Controller
Absolute Maximum Ratings
www.fairchildsemi.com
4
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
Max. Unit
VDD Section
VDD-OP
Continuously Operating Voltage
24
V
VDD-ON
Turn-on Threshold Voltage
15
16
17
V
VDD-OFF
Turn-off Voltage
7.5
8.5
9.5
V
VDD-LH
Threshold voltage for Latch-Off release
3
4
5
V
IDD-ST
Startup Current
VDD-ON–0.16V
8
30
μA
3
IDD-OP
Normal Operating Supply Current
CL=1nF
IDD-BM
Green-Mode Operating Supply Current
GATE open, VFB=VFB-G
VDD-OVP
VDD Over-Voltage Protection
tD-VDDOVP
VDD OVP Debounce Time
IDD-LH
Latch-Off Holding Current
24
VDD=5V
4
mA
2.5
mA
25
26
V
30
50
μs
40
65
μA
1/3.5
1/3.0
V/V
Feedback Input Section
AV
Input-Voltage to Current-Sense Attenuation
ZFB
Input Impedance
1/4.0
5.5
kΩ
VFB-OPEN
FB Pin Open Voltage
5.0
5.2
5.4
V
VFB-OLP
Threshold Voltage for Open-Loop
Protection
4.3
4.6
4.9
V
tD-OLP
Open-Loop Protection Delay Time
53
56
60
ms
100
250
270
360
Current Sense Section
tPD
Delay to Output
tLEB
Leading-Edge Blanking Time
ns
ns
VSTHFL
Flat Threshold Voltage for Current Limit
Duty>51%
0.47
0.50
0.53
V
VSTHVA
Valley Threshold Voltage for Current Limit
Duty=0%
0.41
0.44
0.47
V
Slope Compensation
Duty=DCYMAX
ms
VSLOPE
tSOFT-START
Period During Startup time
FAN6862 — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
0.273
V
2.50
4.00
5.25
Oscillator Section
fOSC
thop-1
Normal PWM Frequency
Center
Frequency
VFB>VFB-N
62
65
68
Hopping Range
VFB≥VFB-N
±3.7
±4.2
±4.7
Hopping Range*1 VFB=VFB-G
±2.9
*1
VFB≥VFB-N
4.4
*1
VFB=VFB-G
Hopping Period 1
kHz
ms
thop-3
Hopping Period 3
fOSC-G
Green Mode Minimum Frequency
18.0
22.5
25.0
kHz
VFB-N
FB Threshold Voltage For Frequency
Reduction
2.0
2.2
2.4
V
VFB-G
FB Voltage at fOSC-G
1.9
2.1
2.3
V
VFB-ZDC
11.5
FB Threshold Voltage for Zero Duty
ms
1.7
fDV
Frequency Variation vs. VDD Deviation
VDD=11.5V to 20V
fDT
Frequency Variation vs. Temperature
Deviation
TA= -40 to +105°C
0
0.02
V
2.00
%
2
%
Continued on the following page…
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
www.fairchildsemi.com
5
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
65
70
75
%
1.5
V
PWM Output Section
DCYMAX
Maximum Duty Cycle
VOL
Output Voltage Low
VDD=15V, IO=50mA
VOH
Output Voltage High
VDD=8V, IO=50mA
tR
Rising Time
CL=1nF
150
200
ns
tF
Falling Time
CL=1nF
35
80
ns
Gate Output Clamping Voltage
VDD=20V
15.0
16.5
18.0
V
92
100
108
μA
0.95
1.00
1.05
V
15
17
19
VCLAMP
6
V
Over-Temperature Protection (OTP) Section
IRT
Output Current of RT Pin
VOTP
Threshold Voltage for Over-Temperature
Protection
tDOTP
Over-Temperature Debounce Time
VOTP2
2nd Threshold Voltage for Over-Temperature
Protection
tDOTP2
2nd Over-Temperature Debounce Time
TA=25°C
VFB=VFB-N
VFB=VFB-G
Note:
1. Guarantee by Design.
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
TA=25°C
(1)
51
ms
0.60
0.70
0.75
V
80
100
190
μs
FAN6862 — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics (Continued)
www.fairchildsemi.com
6
9.5
16.6
9.1
VDD-OFF (V)
VDD-ON (V)
17
16.2
15.8
15.4
8.7
8.3
7.9
15
7.5
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
Temperature (ºC)
25
Turn-on Threshold Voltage (VDD-ON)
vs. Temperature
Figure 7.
4.5
26
4.1
25.6
3.7
3.3
2.9
75
85
100
125
Turn-off Threshold Voltage (VDD-OFF)
vs. Temperature
25.2
24.8
24.4
2.5
24
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
Temperature (ºC)
Figure 8.
25
50
75
85
100
125
Temperature (ºC)
Operating Current (IDD-OP)
vs. Temperature
Figure 9.
68
VDD Over-Voltage Protection (VDD-OVP)
vs. Temperature
2.2
67
2.12
66
VFB-N (V)
fOSC (KHz)
50
Temperature (ºC)
VDD-OVP (V)
IDD-OP (mA)
Figure 6.
0
FAN6862 — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
65
2.04
1.96
64
1.88
63
62
1.8
-40
-30
-15
0
25
50
75
85
100
125
-40
Temperature (ºC)
-15
0
25
50
75
85
100
125
Temperature (ºC)
Figure 10. Center Frequency (fOSC) vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
-30
Figure 11. FB Threshold Voltage for Frequency
Reduction (VFB-N) vs. Temperature
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7
4.9
2.12
4.8
VFB-OLP (V)
VFB-G (V)
2.2
2.04
1.96
1.88
4.7
4.6
4.5
1.8
4.4
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
Temperature (ºC)
Figure 12. FB Voltage at fOSC-G (VFB-G)
vs. Temperature
75
85
100
125
0.6
58
0.56
57
VSTHFL (V)
tD-OLP (ms)
50
Figure 13. Threshold Voltage for Open-Loop
Protection (VFB-OLP) vs. Temperature
59
56
55
0.52
0.48
0.44
54
0.4
53
-40
-30
-15
0
25
50
75
85
100
-40
125
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 14. Open-Loop Protection Delay Time (tD-OLP)
vs. Temperature
Figure 15. Flat Threshold Voltage for Current Limit
(VSTHFL) vs. Temperature
0.55
5
0.51
4
tSOFT-START (ms)
VSTHVA (V)
25
Temperature (ºC)
FAN6862 — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics (Continued)
0.47
0.43
0.39
3
2
1
0.35
0
-40
-30
-15
0
25
50
75
85
100
125
-40
Temperature (ºC)
-15
0
25
50
75
85
100
125
Temperature (ºC)
Figure 16. Valley Threshold Voltage for Current Limit
(VSTHVA) vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
-30
Figure 17. Period during Startup (tSOFT-START)
vs. Temperature
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8
200
71
180
70
160
tR (ns)
DCYMAX (%)
72
69
68
140
120
67
100
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
Temperature (ºC)
Figure 18. Maximum Duty Cycle (DCYMAX)
vs. Temperature
50
75
85
100
125
Figure 19. Rising Time (tR) vs. Temperature
50
120
40
112
30
104
IRT (μA)
tF (ns)
25
Temperature (ºC)
20
10
96
FAN6862 — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics (Continued)
88
0
80
-40
-30
-15
0
25
50
75
85
100
125
-40
Temperature (ºC)
-15
0
25
50
75
85
100
125
Temperature (ºC)
Figure 20. Falling Time (tF) vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
-30
Figure 21. Output Current of RT Pin (IRT)
vs. Temperature
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9
FAN6862 — Highly Integrated Green-Mode PWM Controller
Operation Description
Startup Operation
Figure 22 shows a typical startup circuit and transformer
auxiliary winding for a FAN6862 application. Before
FAN6862 begins switching operation, it consumes only
startup current (typically 8μA) and the current supplied
through the startup resistor charges the VDD capacitor
(CDD). When VDD reaches turn-on voltage of 16V (VDDON), FAN6862 begins switching and the current
consumed increases to 3mA. Then, the power required
is supplied from the transformer auxiliary winding. The
large hysteresis of VDD (8.5V) provides more holdup
time, which allows using a small capacitor for VDD. The
startup resistor is typically connected to AC line for a
fast reset of latch protection.
Figure 23. PWM Frequency
VDL
+
CDL
AC line
Np
Vo
-
CDD
R START
VFB
NA
VFB.ZDC
FAN6862
1
GND
2
FB
VDD
3
RT
SENSE
GATE
(1.7V)
6
5
Ids
4
Switching
Disabled
Figure 22. Startup Circuit
Switching
Disabled
Figure 24. Burst Mode Operation
Green-Mode Operation
Frequency Hopping
The FAN6862 uses feedback voltage (VFB) as an
indicator of the output load and modulates the PWM
frequency, as shown in Figure 23, such that the
switching frequency decreases as load decreases. In
heavy load conditions, the switching frequency is
65KHz. Once VFB decreases below VFB-N (2.2V), the
PWM frequency starts to linearly decrease from 65KHz
to 22.5kHz to reduce the switching losses. As VFB
decreases below VFB-G (2.1V), the switching frequency
is fixed at 22.5kHz and FAN6862 enters “deep” green
mode, where the operating current decreases to 2.5mA
(maximum), further reducing the standby power
consumption. As VFB decreases below VFB-ZDC (1.7V),
FAN6862 enters burst-mode operation. When VFB drops
below VFB-ZDC, FAN6862 stops switching and the output
voltage starts to drop, which causes the feedback
voltage to rise. Once VFB rises above VFB-ZDC, switching
resumes. Burst mode alternately enables and disables
switching, thereby reducing switching loss in standby
mode, as shown in Figure 24.
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. An internal frequency hopping circuit
changes the switching frequency between 60.8kHz and
69.2kHz with a period of 4.4ms, as shown in Figure 25.
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
fs
69.2kHz
65.0kHz
60.8kHz
t
4.4ms
Figure 25. Frequency Hopping
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10
Open-Loop / Over-Load Protection (OLP)
When the upper branch of the voltage divider for the
shunt regulator (KA431 shown) is broken, as shown in
Figure 27, no current flows through the opto-coupler
transistor, which pulls up the feedback voltage to 5.2V.
Self-protective functions include VDD Over-Voltage
Protection (OVP), Open-Loop / Overload Protection
(OLP), Over-Current Protection (OCP), Short-Circuit
Protection, and Over-Temperature Protection (OTP).
OLP, OCP, and SCP are auto-restart mode protections;
while OVP and OTP are latch-mode protections.
When the feedback voltage is above 4.6V longer than
56ms, OLP is triggered. This protection is also triggered
when the SMPS output drops below the nominal value
longer than 56ms due to the overload condition.
Auto-Restart Mode Protection: Once a fault condition
is detected, switching is terminated and the MOSFET
remains off. This causes VDD to fall because no more
power is delivered from auxiliary winding. When VDD
falls to VDD-OFF (8.5V), the protection is reset and the
operating current reduces to startup current, which
causes VDD to rise. FAN6862 resumes normal operation
when VDD reaches VDD-ON (16V). In this manner, the
auto-restart can alternately enable and disable the
switching of the MOSFET until the fault condition is
eliminated (see Figure 26).
Latch-Mode Protection: Once this protection is
triggered, switching is terminated and the MOSFET
remains off. The latch is reset only when VDD is
discharged below 4V by unplugging AC power line.
VFB
5.2V
VFB-OLP (4.6V)
OLP Shutdown Delay Time
FAN6862 — Highly Integrated Green-Mode PWM Controller
Protections
OLP Triggers
Figure 27. OLP Operation
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents IC damage caused
by over voltage on the VDD pin. The OVP is triggered
when VDD reaches 25V. A debounce time (typically
30µs) prevents false triggering by switching noise.
Over-Temperature Protection (OTP)
The OTP circuit is composed of current source and
voltage comparators. Typically, an NTC thermistor is
connected between the RT and GND pins. Once the
voltage of this pin drops below a threshold of 1.0V,
PWM output is disabled after tDOTP debounce time. If this
pin drops below 0.7V, it triggers the latch-off protection
immediately after tDOTP2 debounce time.
Figure 26. Auto Restart Operation
Over-Current Protection (OCP)
FAN6862 has over-current protection thresholds. It is for
pulse-by-pulse current limit, which turns off MOSFET for
the remainder of the switching cycle when the sensing
voltage of MOSFET drain current reaches the threshold.
The other threshold is for the over-current protection,
which shuts down the MOSFET gate when the sensing
voltage of MOSFET drain current is above the threshold
longer than the shutdown delay (56ms).
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
www.fairchildsemi.com
11
Leading-Edge Blanking (LEB)
FAN6862 has saw-limiter for pulse-by-pulse current
limit, which guarantees almost constant power limit over
different line voltages of universal input range.
Each time the power MOSFET is switched on, a turn-on
spike occurs across the sense-resistor caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. To avoid premature termination of the
switching pulse, a leading-edge blanking time is built in.
During this blanking period (360ns), the PWM
comparator is disabled and cannot switch off the gate
driver. Thus, RC filter with a small RC time constant is
enough for current sensing.
The conventional pulse-by-pulse current limiting scheme
has a constant threshold for current limit comparator,
which results in a higher power limit for high line
voltage. FAN6862 has a sawtooth current limit threshold
that increases progressively within a switching cycle,
which provides lower current limit for high line and
makes the actual power limit level almost constant over
different line voltages of universal input range, as shown
in Figure 28.
Figure 29. Current Sense R-C Filter
Soft-Start
The FAN6862 has an internal soft-start circuit that
increases pulse-by-pulse current-limit comparator
inverting input voltage slowly after it starts. The typical
soft-start time is 4ms. The pulsewidth to the power
MOSFET is progressively increased to establish the
correct working conditions for transformers, rectifier
diodes, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps prevent transformer saturation and reduces
the stress on the secondary diode during startup.
Figure 28. Sawtooth Current Limiter
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
FAN6862 — Highly Integrated Green-Mode PWM Controller
Constant Output Power Limit
www.fairchildsemi.com
12
C1
R3
C 102P/1206
R 47R/1206
N5
2
1
N4
D1
N3 11
R5
R 750K/1206
C3
D1 20A/100V
D2
D 1N4007
C82uF/450V
22
Q1
MOS 6A/600V
2
+
C11
R10
R 1K/1206
7
飛飛
D3
D 1N4007
1
3
R 0R/0805
+
C6
RM8
1
R17
VO
LED1
-1
10
YC470p/400V
2
10uH
1
3
N2 3
+
VO
1
2
C 330uF/25V
2
1
飛飛
1
4
C4
L3
6
C5
C 472pF/1KV
R7
R4
R 100K/1206
R 750K/1206
R2
R 1.5M/1206
TR1
N1 1
1
C 680uF/25V
4
+1
2
N1
L2
TRN-0211
C2
1
4
L1
900uH
BD1
BD 2A/600V
3
2
R1
R 1.5M/1206
XC 0.33uF/275V
1
M1
MOV
3
NTC1
SCK053
3.15A
3
F1
2
L1
R8
R 0R22/1W
R6
R 100/1206
R9
R 0R/0805
U1
GND 1
FB 2
C7
RT 3
C 102P/0805
GND
GATE
FB
VDD
RT
SENSE
6 GATE
D4
1
5 VDD
2
D 1N4148
4 SENSE
R11 FAN6862
R 5.6K/0805
C12
C/4.7uF/50V
C8
C 471p/0805
+
C9
C/10uF/50V
+
NTC2
TTC 100K
4
R12
1
R13
R 560/0805
U3
PC817
K 2
3
R/100/1206
U2
C10
R14
C 0.1uF/0805
R 10K/0805
R16
R 39K/1206
R
A
TL431
R15
R 10K/0805
Figure 30. 36W (12V/3A) Application Circuit
BOM
Designator
Part Type
Designator
Part Type
BD1
2KBP06M 2A/600V
C8
CC 470pF/50V
D1
Y2010DN 20A/100V
C9
EC 10µF/50V
D2, D3
1N4007
C10
CC 0.1µF/50V
D4
1N4148
C12
EC 4.7µF/50V
F1
Fuse 3.15A/250V
R1, R2
R 1.5MΩ (option)
NTC1
NTC Thermistor SCK053
R3
R 47Ω
NTC2
NTC Thermistor TTC 100KΩ
R4, R5
R 750KΩ (option)
L1
900µH
R6, R12
R 100Ω
L2
10mH
R7
R 100KΩ
L3
10µH
R8
R 0.22Ω / 1W
TR1
RM-8 400µH
R9
R 0Ω
M1
VZ 9G
R10
R 1KΩ
LED1
LED
R11
R 5.6KΩ
C1
CC 1nF
R13
R 560Ω
C2
XC 0.33µF/275V
R14, R15
R 10KΩ
C3
YC 470pF/400V
R16
R 39KΩ
C4
EC 82µF/400V
U1
IC FAN6862
C5
CC 4.7nF/1KV
U2
TL431
C6, C11
EC 680µF/25V
U3
PC-817
C7
CC 1nF
Q1
MOSFET 6A/600V
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
SGN
FAN6862 — Highly Integrated Green-Mode PWM Controller
Applications Information
www.fairchildsemi.com
13
FAN6862 — Highly Integrated Green-Mode PWM Controller
Physical Dimensions
Figure 31. 6-Pin, SUPERSOT6 “SSOT-6”, JEDEC MO-193, 1.6mm Wide Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
www.fairchildsemi.com
14
FAN6862 — Highly Integrated Green-Mode PWM Controller
Physical Dimensions
[
0.400 10.160
0.355 9.017
8
]
5
PIN 1 INDICATOR
1
]
4
HALF LEAD 4X
0.005 [0.126]
FULL LEAD 4X
0.005 [0.126] MIN
[
0.195 4.965
0.115 2.933
MAX 0.210 [5.334]
]
[
0.325 8.263
0.300 7.628
]
0.015 [0.389] GAGE PLANE
[
0.280 7.112
0.240 6.096
SEATING PLANE
[
]
0.150 3.811
0.115 2.922
C
MIN 0.015 [0.381]
0.100 [2.540]
[
0.022 0.562
0.014 0.358
0.300 [7.618]
[
0.045 1.144
0.030 0.763
]
[ ] 4X
0.070 1.778
0.045 1.143
0.10
C
] 4X
0.430 [10.922]
MAX
NOTES:
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) CONTROLING DIMS ARE IN INCHES
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER ASME
Y14.5M -1982
E) DRAWING FILENAME AND REVSION: MKT-N08MREV1.
Figure 32. 8-Pin Dual In-Line Package (DIP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
www.fairchildsemi.com
15
FAN6862 — Highly Integrated Green-Mode PWM Controller
© 2009 Fairchild Semiconductor Corporation
FAN6862 • Rev. 1.0.3
www.fairchildsemi.com
16