FSA642 Low-Power, Three-Port, High-Speed MIPI Switch Features Description The FSA642 is a bi-directional, low-power, high-speed analog switch. The pin out is designed to ease differential signal layout and is configured as a triplepole, double-throw switch (TPDT). The FSA642 is optimized for switching between two MIPI devices, such as cameras or LCD displays and on-board Multimedia Application Processors (MAP). Low On Capacitance: 7.0 pF Typical Low On Resistance: 7.0 Ω Typical Wide -3db Bandwidth: 1 GHz Typical 24-Lead UMLP (2.5 x 3.4 mm) Package 8 kV ESD Rating; >16 kV Power/GND ESD Rating Applications Dual Camera Applications for Cell Phones Dual LCD Applications for Cell Phones, Digital Camera Displays, and Viewfinders The FSA642 is compatible with the requirements of Mobile Industry Processor Interface (MIPI). The lowcapacitance design allows the FSA642 to switch signals that exceed 500 MHz in frequency. Superior channel-tochannel crosstalk immunity minimizes interference and allows the transmission of high-speed differential signals and single-ended signals, as described by the MIPI specification. Ordering Information Part Number Top Mark Operating Temperature Range FSA642UMX JG -40 to +85°C Camera 1 Camera 2 C D D D C FSA642 D Package 24-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 2.5 x 3.4 mm LCD 1 LCD 2 C D C FSA642 C D MAP Processor D D C MAP Processor Figure 1. Application Block Diagram © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch December 2014 15 14 13 CLKAN DA1P DA1N DA2P 20 16 CLKAP DB2P 17 DB2N 19 18 DA2N 12 DB1P SEL 11 21 DB1N VCC 10 22 CLKBP GND 9 23 CLKBN /OE 8 24 NC NC 7 CLKP CLKN D1P D1N D2P D2N 642 1 2 3 4 5 6 Figure 2. Pin Configuration (Top Through View) Pin Definitions Pin # Name 1, 2 CLKP, CLKN Clock Path (Common) Description 3, 4 D1P, D1N Data Path 1 (Common) 5, 6 D2P, D2N Data Path 2 (Common) 7, 24 NC No Connect (Float) 8 /OE Output Enable (Active Low) 9 GND Ground 10 VCC Power 11 SEL Select (0=A, 1=B) 12, 13 DA2N, DA2P Data Path (A2) 14, 15 DA1N, DA1P Data Path (A1) 16, 17 CLKAN, CLKAP Clock Path (A) 18, 19 DB2N, DB2P Data Path (2B) 20, 21 DB1P, DB1N Data Path (1B) 22, 23 CLKBP, CLKBN, Clock Path (B) © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Pin Configuration www.fairchildsemi.com 2 FSA642 CLKAP (17) CLKAN (16) (1) CLKP (2) CLKN DA1P (15) DA1N (14) DA2P (13) DA2N (12) (3) D1P (4) D1N CLKBP (22) CLKBN (23) DB1P (20) DB1N (21) (5) D2P (6) D2N DB2P (19) DB2N (18) (8) /OE (11) SEL Switch Control (10) V CC (9) GND FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Functional Diagram Figure 3. Functional Diagram Truth Table SEL /OE Function Don’t Care HIGH Disconnect LOW LOW D1, D2, CLK=DA1, DA2, CLKA HIGH LOW D1, D2, CLK=DB1, DB2, CLKB © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VCNTRL Parameter Supply Voltage DC Input Voltage (SEL, /OE) (1) VSW DC Switch I/O Voltage IIK DC Input Diode Current IOUT DC Output Current TSTG Storage Temperature ESD (1) Min. Max. Unit -0.50 +5.25 V -0.5 VCC V -0.5 VCC + 0.3 V -50 -65 Human Body Model, JEDEC: JESD22-A114 mA 50 mA +150 °C All Pins 6.5 I/O to GND 8.0 Power to GND 16.0 Charged Device Model, JEDEC: JESD22-C101 kV 2.5 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VCNTRL VSW TA Parameter Min. Max. Unit 2.65 4.30 V 0 VCC V Switch I/O Voltage -0.5 VCC-1 V Operating Temperature -40 +85 °C Supply Voltage Control Input Voltage (SEL, /OE) (2) FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Absolute Maximum Ratings Note: 2. The control input must be held HIGH or LOW; it must not float. © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 4 All typical values are TA=25°C unless otherwise specified. Symbol Parameter Conditions TA=-40 to +85ºC VCC (V) VIK Clamp Diode Voltage IIN=-18 mA IIN Control Input Leakage VSW=0 to 4.3 V VIH Input Voltage High VIN=0 to VCC VIL Input Voltage Low VIN=0 to VCC IOZ Off-State Leakage A,B=0+0.3 V to VCC-0.3 4.3 ICC Quiescent Supply Current VCNTRL=0 or VCC, IOUT=0 ICCT Increase in ICC Current Per Control Voltage and VCC VCNTRL=1.8 V Min. Typ. 2.775 4.3 -1 2.650 to 2.775 1.3 4.3 1.7 Max. Units -1.2 V 1 µA V 2.650 to 2.775 0.5 V 2 µA 4.3 1.0 µA 2.775 1.5 µA -2 DC Electrical Characteristics, Low-Speed Mode All typical values are TA=25°C unless otherwise specified. Symbol RON ∆RON Parameter LS Switch On Resistance LS Delta Conditions (3) (4) RON VCC (V) TA=-40 to +85ºC Min. Typ. Max. VSW=1.2 V, ION=-10 mA, Figure 4 2.65 10 VSW=1.2 V, ION=-10 mA (Intra-pair) 2.65 0.65 14 Units FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch DC Electrical Characteristics Notes: 3. Measured by the voltage drop between A/B and CLK/Dn pins at the indicated current through the switch. 4. Guaranteed by characterization. DC Electrical Characteristics, High-Speed Mode All typical values are TA=25°C unless otherwise specified. Symbol Parameter RON HS Switch On Resistance ∆RON (6) RON HS Delta (5) TA=-40 to +85ºC Conditions VCC (V) VSW=0.4 V, ION=-10 mA, Figure 4 2.65 7.0 VSW=0.4 V, ION=-10 mA (Intra-pair) 2.65 0.65 Min. Typ. Max. 9.5 Units Notes: 5. Measured by the voltage drop between A, B, and Dn pins at the indicated current through the switch. 6. Guaranteed by characterization. © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 5 All values are at RL=50Ω and RS=50Ω and all typical values are VCC=2.775V at TA=25°C unless otherwise specified. Symbol Parameter Conditions (7) OIRR Off Isolation Xtalk Non-Adjacent Channel (7) Crosstalk (7) VCC (V) TA=-40ºC to +85ºC Min. Typ. Max. Units f=100 MHz, RT=50 Ω Figure 14 2.775 -35 dB f=100 MHz, RT=50 Ω Figure 15 2.775 -55 dB CL=0 pF, RT=50 Ω Figure 13 2.775 1.0 GHz BW -3 db Bandwidth tON Turn-On Time SEL, /OE to Output CL=5 pF, VSW=1.2 V Figure 6, Figure 7 2.650 to 2.775 20 37 ns tOFF Turn-Off Time SEL, /OE to Output CL=5 pF, VSW=1.2 V Figure 6, Figure 7 2.650 to 2.775 15 27 ns tPD Propagation Delay 2.775 0.25 tBBM CL=5 pF, Break-Before-Make Time VSW1=VSW2=1.2 V Figure 12 CL=5 pF Figure 6, Figure 8 (7) 2.650 to 2.775 3 5 ns 8 ns Note: 7. Guaranteed by characterization. AC Electrical Characteristics, High-Speed All typical values are VCC=2.775V at TA=25°C unless otherwise specified. Symbol Parameter Conditions TA=-40ºC to +85ºC Min. Typ. Max. Units tSK(Part_Part) Channel-to-Channel Skew (8,9) Across Multiple Parts VSW=0.2 VdiffPP, CL=5 pF 40 80 ps tSK(Chl_Chl) Channel-to-Channel Skew Within VSW=0.2 VdiffPP, CL=5 pF, (8) Figure 9 a Single Part 15 30 ps Skew of Opposite Transitions in (8) the Same Differential Channel 10 20 ps tSK(Pulse) VSW=0.2 VdiffPP, CL=5 pF FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch AC Electrical Characteristics Notes: 8. Guaranteed by characterization. 9. Assumes the same VCC and temperature for all devices. Capacitance Symbol Parameter Conditions CIN Control Pin Input (10) Capacitance CON Dn/CLK- On Capacitance COFF Dn/CLK Off Capacitance TA=-40ºC to +85ºC Min. VCC=0 V (10) (10) Typ. Max. Units 1.5 VCC=2.775 V, /OE=0 V, f=1 MHz, at 25°C, Figure 11 VCC=2.775 V, /OE=2.775 V, f=1 MHz, Figure 10 6.0 7.0 9.0 pF 2.5 Note: 10. Guaranteed by characterization. © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 6 VON I Dn(OFF) NC A DA/Bn VSW Dn VSW Select GND I ON Select RON = V Sel = VON / ION GND V Sel = GND 0 orV V cc 0 orV cc **Each switch port is tested separately Figure 4. On Resistance Figure 5. Off Leakage tRISE = 2.5ns DA B / n tFALL = 2.5ns Dn VSW CL GND RS RL VCC V OUT Input – V/OE , VSel GND 10% GND VSel 90% 90% VCC /2 VCC /2 10% VOH GN D 90% 90% Output- VOUT RL , RS , an C L a r fu ction s o f th a p lica tion n Ta ble s fo respe pifi c v lue s) env iro nmednt (s e e A C c a citaance . CL inclu es testef ixtu re a n stra ca p d d y . VOL tON tOFF Figure 6. AC Test Circuit Load Figure 7. Turn-On / Turn-Off Waveforms Figure 8. Propagation Delay (tRtF – 500 ps) Figure 9. Channel-to-Channel Skew DA/Bn Capacitance DA/Bn Meter S Capacitance Meter S VSEL =0 or VCC VSEL =0 or VCC DA/Bn DA/Bn Figure 10. Channel Off Capacitance © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Test Diagrams Figure 11. Channel On Capacitance www.fairchildsemi.com 7 tRISE= 2 .5 ns Vc c HSDn Dn VSW1 GND 1 % 0 0V VOUT CL VSW2 9 % Vcc 0 /2 Inp ut - VS el RL VOUT GND GND 0.9*Vo RS 0.9*Vo t u u tBBM VSel RL , RS , and CL ar functions of the application environment (seee AC Tables for specific v lues). CL includes test fixture and stra capacitaance. y GND Figure 12. Break-Before-Make Interval Timing Network Analyzer RS V IN VS GND GND VSel GND VOUT GND RT GND RS and RT are functions of the application environment (see AC Tables for specific values). Figure 13. Bandwidth t FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Test Diagrams (Continued) Network Analyzer RS VSel V IN GND RT VS GND GND V OUT GND GND RT RS and RT are functions of the application environment (see AC Tables for specific values). GND Off isolation = 20 Log (V OUT / VIN) Figure 14. Channel Off Isolation Network Analyzer NC RS GND V IN VS VSel GND GND RT GND GND RS and RT are functions of the application environment (see AC Tables for specific values). RT V OUT GND Crosstalk = 20 Log (VOUT / VIN) Figure 15. Non-Adjacent Channel-to-Channel Crosstalk © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 8 FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Physical Dimensions Figure 16. 24-Lead UMLP Package Product-Specific Dimensions Description Nominal Values (mm) Description Nominal Values (mm) Overall Height PKG Standoff Lead Thickness Lead Width (24x) 0.500 0.026 0.152 0.200 Lead Length (23x) Lead Length, Pin 1 (1x) Lead Pitch Body Length (X) Body Width (Y) 0.4 0.5 0.4 3.4 2.5 © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 9 FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Figure 17. Tape and Reel Packing Specification, page 1 © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 10 FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Figure 18. Tape and Reel Packing Specification, page 2 © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 11 FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch © 2008 Fairchild Semiconductor Corporation FSA642 • Rev. 1.1.2 www.fairchildsemi.com 12