FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Features Description The FSUSB104 is a bi-directional, low-power, two-port, Hi-Speed, USB2.0 switch. Configured as a double-pole, double-throw switch (DPDT) switch, it is optimized for switching between two Hi-Speed (480Mbps) sources or a Hi-Speed and Full-Speed (12Mbps) source. Low On Capacitance: 3.7pF Typical Low On Resistance: 3.9Ω Typical Low Power Consumption: 1μA Maximum - 15μA Maximum ICCT over an Expanded Voltage The FSUSB104 is compatible with the requirements of USB2.0 and features an extremely low on capacitance (CON) of 3.7pF. The wide bandwidth of this device (720MHz) exceeds the bandwidth needed to pass the third harmonic, resulting in signals with minimum edge and phase distortion. Superior channel-to-channel crosstalk also minimizes interference. Range (VIN=1.8V, VCC=4.3V) Wide -3db Bandwidth: > 720MHz Packaged in Pb-free 10-Lead UMLP (1.4 x 1.8mm) 8kV ESD Rating, >16kV Power/GND ESD Rating Power-Off Protection on All Ports When VCC=0V - D+/D- Pins Tolerate up to 5.25V Applications Cell phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-Top Box IMPORTANT NOTE: For additional performance information, please contact [email protected]. The FSUSB104 contains special circuitry on the switch I/O pins for applications where the VCC supply is powered-off (VCC=0), which allows the device to withstand an over-voltage condition. This device is designed to minimize current consumption even when the control voltage applied to the SEL pin is lower than the supply voltage (VCC). This feature is especially valuable to ultra-portable applications, such as cell phones, allowing for direct interface with the generalpurpose I/Os of the baseband processor. Other applications include switching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and notebook computers. Ordering Information Part Number Top Mark Operating Temperature Range FSUSB104UMX JF -40 to +85°C Package Eco Status Green 10-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm MicroPak™ is a trademark of Fairchild Semiconductor Corporation. For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. HSD1+ D+ HSD2+ HSD1- D- HSD2Sel Control /OE Figure 1. Analog Symbol © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 www.fairchildsemi.com FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch December 2009 GN D 3 HSD2- 4 HSD2+ 5 D- D+ 2 1 6 10 Sel 9 VCC 8 /OE 7 HSD1- HSD1+ Figure 2. FSUSB104 Pin Assignment 10L UMLP (Top Through View) Pin Definitions Pin # Name Description 1 D+ USB Data Bus 2 D- USB Data Bus 3 GND Ground 4 HSD2- Multiplexed Source inputs 5 HSD2+ Multiplexed Source inputs 6 HSD1- Multiplexed Source inputs 7 HSD1+ Multiplexed Source inputs 8 /OE Switch Enable 9 VCC Supply Voltage 10 Sel Switch Select FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Pin Assignments Truth Table Sel /OE Function X HIGH Disconnect LOW LOW D+, D-=HSD1+, HSD1- HIGH LOW D+, D-=HSD2+, HSD2- © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VCNTRL Parameter Supply Voltage DC Input Voltage (S, /OE) (1) VSW DC Switch I/O Voltage IIK DC Input Diode Current IOUT DC Output Current TSTG Storage Temperature ESD (1) Min. Max. Unit -0.5 +5.5 V -0.5 VCC V -0.5 VCC + 0.3 V -50 -65 Human Body Model, JEDEC: JESD22-A114 mA 50 mA +150 °C All Pins 7 I/O to GND 8 Power to GND 16 Charged Device Model, JEDEC: JESD22-C101 kV 2 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VCNTRL VSW TA Parameter Min. Max. Unit 3.0 4.3 V 0 VCC V Switch I/O Voltage -0.5 4.5 V Operating Temperature -40 +85 °C Supply Voltage Control Input Voltage (S, /OE) (2) FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Absolute Maximum Ratings Note: 2. The control input must be held HIGH or LOW and it must not float. © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 www.fairchildsemi.com 3 All typical value are at 25°C unless otherwise specified. Symbol Parameter Conditions VIK Clamp Diode Voltage VIH Input Voltage High VIL Input Voltage Low IIN Control Input Leakage VSW =0 to VCC 4.3 IOZ Off State Leakage 0 ≤ Dn, HSD1n, HSD2n ≤ 3.6V IOFF Power-Off Leakage Current (All I/O Ports) VSW =0V to 4.3V, VCC=0V Figure 4 RON HS Switch On Resistance ∆RON HS Delta Ron IIN=-18mA VCC (V) (3) (4) TA=- 40ºC to +85ºC Min. Typ. 3.0 Units Max. -1.2 V 3.0 to 3.6 1.3 V 4.3 1.7 V 3.0 to 3.6 0.5 V 4.3 0.7 V -1 1 µA 4.3 -2 2 µA 0 -2 2 µA 6.5 Ω VSW =0.4V, ION=-8mA Figure 3, 3.0 3.9 VSW =0.4V, ION=-8mA 3.0 0.65 Ω ICC Quiescent Supply Current VCNTRL=0 or VCC, IOUT=0 4.3 1.0 µA ICCT Increase in ICC Current per Control Voltage and VCC VCNTRL =2.6V, VCC=4.3V 4.3 10.0 µA VCNTRL =1.8V, VCC=4.3V 4.3 15.0 µA Notes: 3. Measured by the voltage drop between HSDn and Dn pins at the indicated current through the switch. On resistance is determined by the lower of the voltage on the two (HSDn or Dn ports). 4. Guaranteed by characterization. © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch DC Electrical Characteristics www.fairchildsemi.com 4 All typical value are for VCC=3.3V at 25°C unless otherwise specified. Symbol Parameter Conditions VCC (V) TA=- 40ºC to +85ºC Min. Typ. Max. Units tON Turn-On Time S, /OE to Output RL=50Ω, CL=5pF VSW =0.8V Figure 5, Figure 6 3.0 to 3.6 13 30 ns tOFF Turn-Off Time S, /OE to Output RL=50Ω, CL=5pF VSW =0.8V Figure 5, Figure 6 3.0 to 3.6 12 25 ns tPD Propagation Delay CL=5 pF, RL=50Ω Figure 5, Figure 7 3.3 0.25 tBBM Break-Before-Make RL=50Ω, CL=5pF VSW1=VSW2=0.8V Figure 9 3.0 to 3.6 OIRR Off Isolation RL=50Ω, f=240MHz Figure 11 3.0 to 3.6 -30 dB Xtalk Non-Adjacent Channel Crosstalk RL=50Ω, f=240MHz Figure 12 3.0 to 3.6 -45 dB 720 MHz 550 MHz BW (5) -3db Bandwidth RL=50Ω, CL=0pF Figure 10 2.0 ns 6.5 ns 3.0 to 3.6 RL=50Ω, CL=5pF Figure 10 Note: 5. Guaranteed by characterization. USB Hi-Speed-Related AC Electrical Characteristics Symbol Parameter Conditions Vcc (V) TA=- 40ºC to +85ºC Min. tSK(P) tJ Skew of Opposite Transitions (6) of the Same Output (6) Total Jitter Typ. Units Max. CL=5pF, RL=50Ω Figure 8 3.0 to 3.6 20 ps RL=50Ω, CL=5pf, tR=tF=500ps (10-90%) at 480Mbps 15 (PRBS=2 – 1) 3.0 to 3.6 200 ps FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch AC Electrical Characteristics Note: 6. Guaranteed by characterization. Capacitance Symbol Parameter Conditions TA=- 40ºC to +85ºC Min. Typ. CIN Control Pin Input Capacitance VCC=0V 1.5 CON D+/D- On Capacitance VCC=3.3V, /OE=0V, f=240MHz Figure 14 3.7 COFF D1n, D2n Off Capacitance VCC and /OE=3.3V See Figure 13 2.0 © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 Units Max. pF www.fairchildsemi.com 5 VON I Dn(OFF) NC HSDn A VSW Dn VSW Select GND I ON Select R ON = VON / ION V Sel = V Sel = GND Figure 4. Off Leakage tRISE = 2.5ns Dn VSW CL GND RS 0 orV V cc **Each switch port is tested separately 0 orV cc Figure 3. On Resistance HSDn GND RL tFALL = 2.5ns VCC V OUT Input – V/OE , VSel GND 10% GND V Sel VOH GND Output- VOUT RL , RS , and C L are functions of the application environment (see AC Tables for specific values) CL includes test fixture and stray capacitance. VOL Figure 5. AC Test Circuit Load 90% 90% VCC /2 VCC /2 90% tON 90% tOFF Figure 6. Turn-On / Turn-Off Waveforms tFALL = 500ps tRISE = 500ps 50% Input 0V 400mV +400mV tPHL - 400mV 90% 0V 50% tPLH 10% 10% FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Test Diagrams 90% 10% VOH Output 50% 50% Output VOL t PHL Figure 7. Propagation Delay (tRtF – 500ps) © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 t PLH Figure 8. Intra-Pair Skew Test tSK(P) www.fairchildsemi.com 6 tRISE = 2.5ns Vcc HSDn Dn VSW1 GND CL VSW2 RL 10% 0V VOUT VOUT GND GND 90% Vcc/2 Input - VSel 0.9*Vout 0.9*Vout RS tBBM VSel RL , RS , and C L are functions of the application environment (see AC Tables for specific values) CL includes test fixture and stray capacitance. GND Figure 9. Break-Before-Make Interval Timing Network Analyzer Network Analyzer RS GND RS V IN VS GND VSel GND VSel VOUT GND VS GND V OUT GND RS and RT are functions of the application environment (see AC Tables for specific values). GND V IN GND GND RT RS and RT are functions of the application environment (see AC Tables for specific values). GND RT RT GND Off isolation = 20 Log (V OUT / VIN) Figure 10. Bandwidth Figure 11. Channel Off Isolation Network Analyzer NC RS V IN GND VS VSel FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Test Diagrams (Continued) GND GND RT GND GND RS and RT are functions of the application environment (see AC Tables for specific values). V OUT RT GND Crosstalk = 20 Log (VOUT / VIN) Figure 12. Non-Adjacent Channel-to-Channel Crosstalk HSDn Capacitance Meter S Capacitance Meter S VSel = 0 or Vcc V Sel = 0 or Vcc HSDn HSDn Figure 13. Channel Off Capacitance © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 HSDn Figure 14. Channel On Capacitance www.fairchildsemi.com 7 0.15 C A 1.40 2X 1.700 B 9X 0.563 0.663 1 1.80 PIN #1 QUADRANT 2.100 0.400 0.15 C 2X 10X 0.225 TOP VIEW RECOMMENDED LAND PATTERN 0.55 MAX. 1.450 0.10 C 0.550 0.152 9X 0.450 SEATING PLANE 0.08 C 0.050 C 0.400 SIDE VIEW 1.850 10X 0.225 3 9X 0.35 0.45 0.45 0.55 OPTIONAL MINIMIAL TOE LAND PATTERN 0.40 6 1 10 0.500 0.15 10X 0.25 0.100 0.10 C A B 0.05 C 0.100 0.100 BOTTOM VIEW DETAIL A PIN #1 TERMINAL SCALE: 2X FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Physical Dimensions A. DIMENSIONS ARE IN MILLIMETERS. B. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C. DRAWING FILENAME: UMLP10Arev2 Figure 15. 10-Lead, Ultrathin Molded Leadless Package (UMLP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 www.fairchildsemi.com 8 FSUSB104 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch © 2008 Fairchild Semiconductor Corporation FSUSB104 • Rev. 1.0.2 www.fairchildsemi.com 9