RT9053A - Richtek

®
RT9053A
Low Dropout, 400mA Adjustable Linear Regulator
General Description
Features
The RT9053A is a high performance, 400mA LDO regulator
and ultra low dropout. The quiescent current is as low as
42μA, further prolonging the battery life. The RT9053A also
works with low ESR ceramic capacitors, reducing the
amount of board space necessary for power applications,
critical in handheld wireless devices.

Ordering Information
RT9053A
Package Type
B : SOT-23-5
QW : WDFN-6L 2x2 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
(for WDFN-6L 2x2 Only)
Note :
Wide Operating Voltage Ranges : 2.2V to 5.5V
 Low Dropout : 230mV at 400mA
 Ultra Fast Response in Line/Load Transient
 Current Limiting Protection
 Thermal Shutdown Protection
 Output Only 1μ
μF Capacitor Required for Stability
 RoHS Compliant and Halogen Free

Applications
Mega Sim Card
 CDMA/GSM Cellular Handsets
 Portable Information Appliances
 Laptop, Palmtops, Notebook Computers
 Hand-Held Instruments
 Mini PCI& PCI-Express Cards
 PCMCIA & New Cards

Pin Configurations
(TOP VIEW)
VOUT
FB
5
4
Richtek roducts are :

ments of IPC/JEDEC J-STD-020.

2
RoHS compliant and compatible with the current requireSuitable for use in SnPb or Pb-free soldering processes.
3
EN
1
GND
VIN
2
GND
The RT9053A consumes typically 0.7μA in shutdown
mode. The other features include low dropout voltage, high
output accuracy, and current limiting protection. The
RT9053A is available in SOT-23-5 and WDFN-6L 2x2
packages.
Adjustable Output Voltage Down to 0.8V
3
7
6
FB
5
NC
VOUT
4
VIN GND EN
SOT-23-5
WDFN-6L 2x2
Marking Information
RT9053AGB
RT9053AGQW
3Q= : Product Code
3Q=DNN
DNN : Date Code
JH : Product Code
JHW
W : Date Code
RT9053AZQW
J_H : Product Code
J_HW
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS9053A-03
September 2014
W : Date Code
is a registered trademark of Richtek Technology Corporation.
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1
RT9053A
Typical Application Circuit
RT9053A
VIN
VIN
CIN
1µF
VOUT
COUT
1µF
VOUT
R1
Chip Enable
EN
FB
R2
GND
Functional Pin Description
Pin No.
SOT-23-5 WDFN-6L 2x2
1
Pin Name
Pin Function
3
2, 7
(Exposed Pad)
VIN
3
1
EN
4
6
FB
Supply Input.
Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
Chip Enable (Active High). When the EN goes to a logic low, the
device will be shutdown mode.
Output Voltage Feedback.
5
--
4
5
VOUT
NC
Regulator Output.
No Internal Connection.
2
GND
Function Block Diagram
EN
POR
OTP
Current
Limit
VREF
FB
VIN
+
MOS
Driver
VOUT
GND
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RT9053A-03
September 2014
RT9053A
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage, VIN -----------------------------------------------------------------------------------------------EN Input Voltage ---------------------------------------------------------------------------------------------------------- Power Dissipation, PD @ TA = 25°C (Note 2)
SOT-23-5 -------------------------------------------------------------------------------------------------------------------WDFN-6L 2x2 ------------------------------------------------------------------------------------------------------------- Package Thermal Resistance
SOT-23-5, θJA --------------------------------------------------------------------------------------------------------------WDFN-6L 2x2, θJA --------------------------------------------------------------------------------------------------------WDFN-6L 2x2, θJC -------------------------------------------------------------------------------------------------------- Lead Temperature (Soldering 10sec.) ------------------------------------------------------------------------------- Junction Temperature ---------------------------------------------------------------------------------------------------- Storage Temperature Range ------------------------------------------------------------------------------------------- ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) ----------------------------------------------------------------------------------------------------

Recommended Operating Conditions



6V
6V
0.4W
0.606W
250°C/W
165°C/W
8.2°C/W
260°C
150°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 2.2V to 5.5V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.7V, CIN = COUT = 1μF, IOUT = 20mA, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
0.792
0.8
0.808
V
FB Reference Voltage
VFB
Output Voltage Accuracy
VOUT
IOUT = 10mA
1
0
1
%
Quiescent Current
IQ
IOUT = 0mA
--
35
50
A
Shutdown Current
ISHDN
--
0.7
1.5
A
Current Limit
ILIM
400
650
1000
mA
Dropout Voltage
VDROP
VEN = 0V
RLOAD = 0,
2.2V VIN < 5.5V
IOUT = 400mA
--
230
350
mV
Load Regulation
VLOAD
1mA < IOUT < 400mA
2.2V VIN < 5.5V
--
--
1
%
Line Regulation
VLINE
VIN = (VOUT + 0.5) to 5.5V,
IOUT = 1mA
--
0. 01
0.2
%/V
Logic-High
VIH
1.6
--
5.5
Logic-Low
VIL
0
--
0.6
Enable Pin Current
IEN
--
1
2
A
FB Pin Current
IFB
--
0.1
1
A
Thermal Shutdown
Temperature
TSD
--
150
--
°C
EN Threshold
Voltage
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September 2014
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RT9053A
Parameter
Symbol
Power Supply Rejection
Rate
PSRR
Output Noise Voltage
VON
Test Conditions
Min
Typ
Max
f = 1kHz, I OUT = 10mA
--
56
--
f = 10kHz, I OUT = 10mA
--
35
--
VOUT = 1.5V, COUT = 1F,
I OUT = 0mA
--
30
--
Unit
dB
VRMS
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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is a registered trademark of Richtek Technology Corporation.
RT9053A-03
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RT9053A
Typical Operating Characteristics
Reference Voltage vs. Temperature
Quiescent Current vs. Temperature
60
0.815
56
Quiescent Current (µA)
Reference Voltage (V)
0.810
0.805
0.800
0.795
0.790
0.785
52
48
44
40
36
32
28
24
VIN = VEN = 3.3V, No Load
0.780
VIN = VEN = 3.3V, No Load
20
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
75
100
125
EN Threshold Voltage vs. Temperature
Dropout Voltage vs. Load Current
1.5
TA = 125°C
TA = 25°C
0.30
0.25
0.20
TA = −40°C
0.15
0.10
0.05
EN Threshold Voltage (V)
1.4
0.35
Dropout Voltage (V)
50
Temperature (°C)
0.40
1.3
1.2
1.1
1.0
Rising
0.9
Falling
0.8
0.7
0.6
VEN = 3.3V, VOUT = 2.5V
0.00
VIN = 3.3V, No Load
0.5
0
50
100
150
200
250
300
350
400
-50
-25
0
25
50
75
100
125
Temperature (°C)
Load Current (mA)
Current Limit vs. Input Voltage
Current Limit vs. Temperature
0.90
0.90
0.85
0.85
0.80
0.80
Current Limit (A)
Current Limit (A)
25
0.75
0.70
0.65
0.75
0.70
0.65
0.60
0.60
0.55
0.55
VIN = 3.3V, VOUT = 1.8V
VOUT = 1.8V
0.50
0.50
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Input Voltage (V)
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RT9053A-03
September 2014
5.5
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT9053A
Load Transient Response
PSRR vs. Frequency
0
-10
VOUT
(5mV/Div)
PSRR (dB)
-20
-30
-40
-50
IOUT
(200mA/Div)
-60
-70
VIN = 3.3V, VOUT = 2.5V, ILOAD = 200mA
to 400mA, CIN = COUT = 1μF / X7R
VIN = 3.3V, VOUT = 2.5V
ILOAD = 10mA, CIN = COUT = 1μF/X7R
-80
10
100
1k
1000
10k
10000
100k
100000
1000000
1M
Time (100μs/Div)
Frequency (Hz)
Enable/Shutdown Response
Power On from EN
VEN
(2V/Div)
VEN
(5V/Div)
VOUT
(500mV/Div)
VOUT
(1V/Div)
VIN = 5V, VOUT = 2.5V, No Load
Time (5μs/Div)
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VIN = 5V, VOUT = 2.5V, ILOAD = 15mA
Time (500μs/Div)
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RT9053A
Application Information
Input Capacitor Selection
Enable Function
Like any low dropout linear regulator, the external
capacitors used with the RT9053A must be carefully
selected for stability and performance. The input
capacitance is recommended to be at least 1μF, and can
be increased without limit. The input capacitor must be
located at a distance of less than 0.5 inch from the input
pin of the IC and returned to a clean ground plane. Any
high-quality ceramic capacitor or tantalum capacitor can
be used for the input capacitor. Using input capacitor with
larger capacitance and lower ESR (Equivalent Series
Resistance) can obtain better PSRR and line transient
response.
The RT9053A features enable/shutdown function. The
voltage at the EN pin determines the enable/shutdown
state of the regulator. To ensure the regulator will switch
on, the enable control voltage must be greater than 1.6V.
The regulator will enter shutdown mode when the voltage
at the EN pin falls below 0.6V. If the enable function is not
needed, the EN pin should be pulled high or simply tied
to VIN to keep the regulator in an on state.
Output Capacitor Selection
The RT9053A is designed specifically to work with low
ESR ceramic output capacitor to save board space and
have better performance. The output capacitor is
recommended to be at least 1μF. Larger capacitance can
reduce noise and improve load transient response, stability
and PSRR. The RT9053A can operate with other types of
output capacitor due to its wide stable operation range.
The output capacitor should be placed less than 0.5 inch
from the VOUT pin and returned to a clean ground plane.
Output Voltage Setting
The output voltage divider R1 and R2 allows adjustment
of the output voltage for various application as shown in
Figure 1.
PSRR
RT9053A features high Power Supply Rejection Ratio
(PSRR), which is defined as the ratio of output voltage
change against input voltage change.
 VOUT 
PSRR  20  log 

 V IN 
A low dropout regulator with a higher PSRR can provide
better line transient performance.
Current Limit
The RT9053A implements an independent current limit
circuit, which monitors and controls the pass element’s
gate voltage to limit the output current at 650mA (typ.). If
the current limit condition lasts for a long time, the regulator
temperature may increase high enough to damage the
regulator itself. Therefore, the RT9053A implements
current limit function and thermal protection function to
prevent the regulator from damage when the output is
shorted to ground.
VOUT
R1
FB
RT9053A
R2
GND
Figure 1. Output Voltage Setting
The output voltage is set according to the following equation :
R1 

VOUT  VFB  1 

 R2 
where VFB is the feedback reference voltage (0.8V typical).
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
RT9053A-03
September 2014
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
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RT9053A
PD(MAX) = (125°C − 25°C) / (250°C/W) = 0.400W for
SOT-23-5 package
The thermal resistance θJA is determined by the package
architecture design and the PCB layout design. However,
the package architecture design had been already
designed. If possible, it's useful to increase thermal
performance by the PCB layout copper design. The thermal
resistance θJA can be decreased by adding copper area
under the exposed pad of WDFN series package.
As shown in Figure 2, we can find the relation between
the copper area and the thermal resistance θJA. The
thermal resistance will be reduced by adding more copper
area. When IC mounted to the standard footprint, the
thermal resistance θJA is 165°C/W. Adding copper area
of pad to 15mm2 under the package reduces the θJA to
150°C/W. Even further, increasing the copper area of pad
to 70mm2 reduces the θJA to 130°C/W.
Thermal Resistance (°C/W)
180
160
140
120
100
80
60
Maximum Power Dissipation (W)1
PD(MAX) = (125°C − 25°C) / (165°C/W) = 0.606W for
WDFN-6L 2X2 package
As shown in Figure 3, we can also find the WDFN-6L 2x2
maximum power dissipation improvement by different
copper area design at ambient temperature TA = 25°C
operation.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
10
30
40
50
60
70
Copper Area (mm )
Figure 3. Maximum Power Dissipation PD vs. PCB
Copper Area
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For the RT9053A packages, the derating
curves in Figure 4 allow the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
Copper Area
WDFN 2x2 70mm2
WDFN 2x2 15mm2
WDFN 2x2, Min. Layout
SOT-23-5, Min Layout
Single-Layer PCB
0
40
20
2
Maximum Power Dissipation (W)1
For recommended operating condition specifications of
the RT9053A, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For WDFN6L 2x2 packages, the thermal resistance, θJA, is 165°C/
W on a standard JEDEC 51-3 single-layer thermal test
board. For SOT-23-5 packages, the thermal resistance,
θJA, is 250°C/W on a standard JEDEC 51-3 single-layer
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by the following formulas :
25
50
75
100
125
Ambient Temperature (°C)
20
Figure 4. Derating Curves for RT9053A Packages
0
0
10
20
30
40
50
60
70
2
Copper Area (mm )
Figure 2. WDFN-6L 2x2 Thermal Resistance θJA vs. PCB
Copper Area
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RT9053A
Outline Dimension
H
D
L
B
C
b
A
A1
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.889
1.295
0.035
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.356
0.559
0.014
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-5 Surface Mount Package
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RT9053A
D2
D
L
E
E2
1
e
b
A
A1
SEE DETAIL A
2
1
2
1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.200
0.350
0.008
0.014
D
1.950
2.050
0.077
0.081
D2
1.000
1.450
0.039
0.057
E
1.950
2.050
0.077
0.081
E2
0.500
0.850
0.020
0.033
e
L
0.650
0.300
0.026
0.400
0.012
0.016
W-Type 6L DFN 2x2 Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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