RT8476 - Richtek

®
RT8476
Two-Stage Hysteretic LED Driver Controller
General Description
Features
The RT8476 is a two-stage controller with dual gate drivers
consist of a Boost converter (first stage) and a Buck
converter (second stage). The advantage of the two-stage
topology is highly compatible with ET (Electronic
Transformer) in MR16 / AR111 lighting market field
applications.

Two-Stage Topology (Boost + Buck)

Wide Input Voltage Range : 4.5V to 40V
Adjustable Peak Input Current Control
Adjustable Boost Output Voltage
Independent Dual Stage Function
Adjustable LED Current with ± 5% LED Current
Accuracy
Input Under Voltage Lockout Detection
Thermal Shutdown Protection
SOP-8 and SOP-8 (Exposed Pad) Packages
RoHS Compliant and Halogen Free
The first stage is a Boost converter for constant voltage
output with inductor peak current over current protection.
The second stage is a Buck converter for constant output
current by typical constant peak current regulation.

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The RT8476 is equipped with dual output gate drivers for
external power MOSFETs, suitable for higher power
applications.
Ordering Information
RT8476
The RT8476 is available in the SOP-8 and SOP-8 (Exposed
pad) packages.
Package Type
S : SOP-8
SP : SOP-8 (Exposed Pad-Option 1)
Applications
Lead Plating System
G : Green (Halogen Free and Pb Free)

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
Note :
MR16 Lighting
Signage and Decorative LED Lighting
Architectural Lighting
High Power LED Lighting
Low Voltage Industrial Lighting
Indicator and Emergency Lighting
Automotive LED Lighting
Richtek products are :

RoHS compliant and compatible with the current require-

Suitable for use in SnPb or Pb-free soldering processes.
ments of IPC/JEDEC J-STD-020.
Simplified Application Circuit
L1
D6
RSENSE
COUT
D1
D2
VL
AC 12V
RT8476
OVP
VCC
R5
CIN
VN
M1
GATE1
D3
ISN
CREG
CS
D4
R6
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R4
LED+
C3
M2
D7
C6
L2
LED-
GATE2
GND
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RT8476
Marking Information
Pin Configurations
RT8476GS
(TOP VIEW)
RT8476GS : Product Number
RT8476
GSYMDNN
8
GATE1
YMDNN : Date Code
GATE2
CS
2
7
CREG
OVP
GND
3
6
VCC
4
5
ISN
8
GATE2
RT8476GSP
SOP-8
RT8476GSP : Product Number
RT8476
GSPYMDNN
YMDNN : Date Code
GATE1
CS
2
OVP
GND
3
GND
7
CREG
6
VCC
5
ISN
9
4
SOP-8 (Exposed Pad)
Functional Pin Description
Pin No.
Pin Name
Pin Function
SOP-8
SOP-8
(Exposed Pad)
1
1
GATE1
Gate Driver Output for External MOSFET Switch in the First Stage.
2
2
CS
Current Sense Input for External MOSFET Switch.
3
3
OVP
Over Voltage Protection Sense Input.
4
4,
9 (Exposed Pad)
GND
Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
5
5
ISN
LED Current Sense Amplifier Negative Input.
6
6
VCC
Supply Voltage Input. For good bypass, place a ceramic capacitor
near the VCC pin.
7
7
CREG
Internal Regulator Output. Place an 1F capacitor between the
CREG and GND pins.
8
8
GATE2
Gate Driver Output for External MOSFET Switch in the Second
Stage.
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RT8476
Function Block Diagram
ISN VCC
-130mV
Regulator
V
CREG
VCC
+
-
UV
OVP
Core
Logic
EN2
CREG
EN1
CS
GATE2
EN2
EN1
GATE1
+
-
V
240mV
GND
Operation
The VCC of the RT8476 is supplied from the first stage
Boost output. The first stage is a constant output voltage
Boost topology. The CS pin senses the peak inductor
current for over current protection. The peak inductor
current level can be adjusted by the sense resistor
between MOSFET Source and GND pins.
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The second stage is a constant output current Buck
topology. The current sense voltage threshold between
the VCC and ISN pins is only 130mV to reduce power
loss.
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RT8476
Absolute Maximum Ratings

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
(Note 1)
Supply Input Voltage, VCC to GND ----------------------------------------------------------------------------------- −0.3V to 45V
CS, GATE1, GATE2, CREG, OVP to GND -------------------------------------------------------------------------- −0.3V to 6V
VCC to ISN ----------------------------------------------------------------------------------------------------------------- −1V to 3V
Power Dissipation, PD @ TA = 25°C
SOP-8 -----------------------------------------------------------------------------------------------------------------------SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8, θJA -----------------------------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) -----------------------------------------------------------------------------------------------------
Recommended Operating Conditions



0.53W
3.44W
188°C/W
29°C/W
2°C/W
150°C
260°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage, VCC ---------------------------------------------------------------------------------------------- 4.5V to 40V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VCC = 10V, No Load, CLOAD = 1nF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Voltage
CREG UVLO_ ON
V UVOL_ON
CS/OVP = 0V
4
4.3
4.6
V
CREG UVLO_ OFF
V UVOL_OFF
CS/OVP = 0V
--
4.2
--
V
VCC Shutdown Current
ISHDN
Before Start-Up, VCC = 3.5V
--
10
--
A
VCC Quiescent Current
IQ
After Start-Up, VCC = 5V, GATE1
and GATE2 Stand Still
--
1.5
--
mA
Internal Reference Voltage
V CREG
--
5
--
V
--
4.9
--
V
Supply Current
Internal Reference Voltage
ICREG = 20mA
Current Sense Comparator
CS Threshold Voltage
V CS
215
240
265
mV
CS Pin Leakage Current
ICS
--
1
--
A
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RT8476
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
OVP Threshold
OVP High Level
VOVP_H
1.71
1.9
2.09
V
OVP Low Level
VOVP_L
1.44
1.6
1.76
V
OVP Pin Leakage Current
IOVP
--
1
--
A
--
1.5
--
s
Gate Driver
GATE1 Duty Off-Time
UGATE1 Drive Sink
RUGATE1sk
Sink = 50mA
--
2
--

LGATE1 Drive Source
RLGATE1sr
Source = 50mA
--
1.25
--

--
90
--
k
123.5
130
136.5
mV
GATE1 Default Pull Down Resistor
Buck Converter
ISN Threshold
VISN
ISN Hysteresis
VISN
10
15
20
%
ISN Pin Leakage Current
IISN
--
1
--
A
UGATE2 Drive Sink
RUGATE2sk
Sink = 50mA
--
2
--

LGATE2 Drive Source
RLGATE2sr
Source = 50mA
--
1.25
--

--
90
--
k
140
155
170
C
--
35
--
C
GATE2 Default Pull Down Resistor
Temperature Protection
Thermal Shutdown Temperature
T SD
Thermal Shutdown Hysteresis
TSD
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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RT8476
Typical Application Circuit
L1
22µH
D1
R4
D2
VL
AC 12V
CIN
1µF
VN
D3
D4
RSENSE
280m
D6
R5
GATE1
CREG
CS
R6
120m
COUT
LED+
ISN
M1
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RT8476
VCC
OVP
C3
4.7µF
M2
D7
L2
120µH
C6
4.7µF
LED-
GATE2
GND
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RT8476
Typical Operating Characteristics
Quiescent Current vs. Temperature
4.0
1.7
3.5
Quiescent Current (mA)
Quiescent Current (mA)
Quiescent Current vs. VCC
1.8
1.6
1.5
1.4
1.3
1.2
1.1
3.0
2.5
2.0
1.5
1.0
0.5
VCC = 4.5V to 30V, Gate Capacitor = 100pF
VCC = 24V, Gate Capacitor = 100pF
1.0
0.0
4
9.2
14.4
19.6
24.8
-50
30
-25
0
VCC (V)
Operating Current vs. VCC
75
100
125
Operating Current vs. Temperature
4.0
2.5
3.5
Operating Current (mA)
Operating Current (mA)
50
Temperature (°C)
2.8
2.2
1.9
1.6
1.3
3.0
2.5
2.0
1.5
VCC = 4.5V to 30V, Gate Capacitor = 100pF
VCC = 24V, Gate Capacitor = 100pF
1.0
1.0
4
9.2
14.4
19.6
24.8
30
-50
-25
0
VCC (V)
25
50
75
100
125
Temperature (°C)
CREG Voltage vs. VCC
CREG Voltage vs. Temperature
7
5.4
5.3
CREG Voltage (V)
6
CREG Voltage (V)
25
5
ICREG = 0mA
ICREG = -20mA
4
3
5.2
5.1
ICREG = 0mA
ICREG = -20mA
5.0
4.9
VCC = 10V
VCC = 4.5V to 30V
2
4.8
4.5
9.6
14.7
19.8
24.9
VCC (V)
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30
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8476
CS Threshold vs. Temperature
280
250
260
CS Threshold (mV)
CS Threshold (mV)
CS Threshold vs. VCC
260
240
230
220
240
220
200
210
180
4.5
9.6
14.7
19.8
24.9
30
-50
-25
0
50
75
150
140
140
ISN Theshold (V)
150
130
120
110
100
125
130
120
110
100
VCC = 4.5V to 40V
VCC = 30V
90
90
4
8
12
16
20
24
28
32
36
40
-50
-25
0
25
50
75
100
125
Temperature (°C)
VCC (V)
OVP Hi/Low Level Voltage vs. Temperature
OVP Hi/Low Level Voltage vs. VCC
2.1
2.2
2.0
High
1.9
1.8
1.7
Low
1.6
1.5
VCC = 4.5V to 30V
OVP Hi/Low Level Voltage (V)
OVP Hi/Low Level Voltage (V)
100
ISN Threshold vs. Temperature
ISN Threshold vs. VCC
ISN Threshold (mV)
25
Temperature (°C)
VCC (V)
2.1
2.0
High
1.9
1.8
1.7
Low
1.6
1.5
1.4
VCC = 10V
1.3
1.4
4.5
9.6
14.7
19.8
24.9
VCC (V)
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30
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8476
LED Current vs. Input Voltage
LED Current vs. Output Voltage
450
440
437
440
LED Current (mA)
LED Current (mA)
434
430
420
410
400
431
428
425
422
419
416
390
413
VCC = 4.5V to 20V, Load = 4LED
380
Load = 1LED to 6LED
410
4.5
7.6
10.7
13.8
16.9
20
4.5
7.6
Input Voltage (V)
13.8
16.9
20
Output Voltage (V)
GATE1 Duty Off-Time vs. Temperature
GATE1 Rising/Falling Time vs. VCC
3.1
60
2.8
2.5
2.2
1.9
1.6
1.3
VCC = 10V
1.0
GATE1 Rising/Falling Time (ns)
GATE1 Duty Off-Time (µs)
10.7
55
50
Rising
45
40
35
Falling
30
25
VCC = 4.5V to 30V
20
-50
-25
0
25
50
75
100
125
4.5
9.6
14.7
19.8
24.9
Temperature (°C)
VCC (V)
Power On From VCC
Power Off From VCC
IOUT
(500mA/Div)
IOUT
(500mA/Div)
I IN
(2A/Div)
I IN
(2A/Div)
VOUT
(10V/Div)
V CC
(20V/Div)
VOUT
(10V/Div)
V CC
(20V/Div)
VCC = 10V, 4LEDs
Time (5ms/Div)
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VCC = 10V, 4LEDs
Time (5ms/Div)
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RT8476
Power On From AC-IN
Power Off From AC-IN
IOUT
(500mA/Div)
IOUT
(500mA/Div)
VOUT
(10V/Div)
VOUT
(10V/Div)
V CC
(20V/Div)
AC-IN
(50V/Div)
V CC
(20V/Div)
AC-IN
(50V/Div)
AC = 12V, 4LEDs
Time (5ms/Div)
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AC = 12V, 4LEDs
Time (10ms/Div)
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RT8476
Application Information
The RT8476 consists of a constant output current Buck
controller and a fixed off-time controlled Boost controller.
The Boost controller is based on a peak current, fixed offtime control architecture and designed to operate up to
800kHz to use a very small inductor for space constrained
applications. A high side current sense resistor is used to
set the output current of the Buck controller. A 1% sense
resistor performs a ±5% LED current accuracy for the best
performance.
Average Output Current Setting
The output current that flows through the LED string is
set by an external resistor, RSENSE, which is connected
between the VCC and ISN terminal. The relationship
between output current, IOUT, and R SENSE is shown
below :
IOUT = 130mV
RSENSE
LED Current Ripple Reduction
Under Voltage Lockout (UVLO)
The RT8476 includes an under voltage lookout function
with 100mV hysteresis. The internal MOSFET turns off
when VCC falls below 4.2V (typ.).
Higher LED current ripple will shorten the LED life time
and increase heat accumulation of LED. To reduce the
LED current ripple, an output capacitor in parallel with the
LED should be added. The typical value of output capacitor
is 4.7μF.
CREG Regulator
The CREG pin requires a capacitor for stable operation
and to store the charge for the large GATE switching
currents. Choose a 10V rated low ESR, X7R or X5R,
ceramic capacitor for best performance. A 4.7μF capacitor
will be adequate for many applications. Place the capacitor
close to the IC to minimize the trace length to the CREG
pin and to the IC ground. An internal current limit on the
CREG output protects the RT8476 from excessive onchip power dissipation.
The CREG pin has set the output to 4.3V (typ.) to protect
the external FETs from excessive power dissipation
caused by not being fully enhanced. If the CREG pin is
used to drive extra circuits beside RT8476, the extra loads
should be limited to less than 10mA.
VCC Voltage Setting
The VCC voltage setting is equipped with an Over Voltage
Protection (OVP) function. When the voltage at the OVP
pin exceeds threshold approximately 1.9V, the power
switch is turned off. The power switch can be turned on
again once the voltage at the OVP pin drops below 1.6V.
For Boost applications, the output voltage can be set by
the following equation :
VCC(MAX) = 1.9 x (1 + R4 / R5)
R4 and R5 are the voltage divider resistors from VOUT to
GND with the divider center node connected to the OVP
pin. For MR16 LED lamp application, the minimum voltage
of VCC should maintain above 25V for stable operation.
Step-Down Converter Inductor Selection
Gate Driver
There are two gate drivers, GATE1 and GATE2, in the
RT8476. The Gate driver consists of a CMOS buffer
designed to drive the external power MOSFET. It features
unbalanced source and sink capabilities to optimize switch
on and off performance without additional external
components. Whenever the IC supply voltage is lower than
the under voltage threshold, the Gate Driver is pulled low.
The RT8476 implemented a simple high efficiency,
continuous mode inductive step-down converter. The
inductance L2 in Buck converter is determined by the
following factors : inductor ripple current, switching
frequency, VOUT/VIN ratio, internal MOSFET, topology
specifications, and component parameter. The inductance
L2 is calculated according to the following equation :
L2 ≥ [VCC(MAX) − VOUT − VISN − (RDS2(ON) x IOUT)] x D / [fSW
x ΔIOUT]
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RT8476
where
where
fsw is switching frequency (Hz).
tOFF is Off-Time. The typical value is 1.5μs.
RDS2(ON) is the low side switch on-resistance of external
MOSFET (M2). The typical value is 0.35Ω.
ILIM is the input current. The typical value is 2A for MR16
application.
D is the duty cycle = VOUT / VIN
VCC is the supply input voltage (V)
IOUT is the required LED current (A)
VIN is the input voltage after bridge diodes (V)
ΔIOUT is the inductor peak-peak ripple current (internally
set to 0.3 x IOUT)
VF is the forward voltage (V)
VCC is the supply input voltage (V)
D = 1 − (VIN / VOUT)
VOUT is the total LED forward voltage (V)
fSW = (1 − D) / tOFF
VISN is the voltage cross current sense resistor (V)
where
L2 is the inductance (H)
D is the operation duty
The selected inductor must have saturation current higher
than the peak output LED current and continuous current
rating above the required average output LED current. In
general, the inductor saturation current should be 1.5
times the LED current. In order to minimize output current
ripple, higher values of inductance are recommended at
higher supply voltages. Because high values of inductance
has high line resistance, it will cause lower efficiency.
fSW is the switching frequency of Boost controller.
Step-Up Converter Inductor Selection
The RT8476 uses a constant off-time control to provide
high efficiency step-up converter. The resistor, R6, between
the Source of the external N-MOSFET and GND should
be selected to provide adequate switch maximum current
to drive the application. The current limit threshold on the
CS pin of the RT8476 is 240mV (typ.). When the CS pin
voltage is higher than the 240mV reference, the
comparator will disable the power section. The GATE1
will pull low after fixed delay time 1.5μs (typ.) and then
turn on again after OVP operation is removed. This cycle
repeats, keeping the output voltage within a small window.
Following the constant off-time mechanism, the inductance
L1 is calculated according to the following equation :
L1 is the inductance (H)
Check the ILIM setting satisfied the output LED current
request by the following equation :
(IOUT + ΔIOUT) < [2 x L1 x ILIM + tOFF x (VIN − VOUT − VF)] x
VIN / [2 x L1 x (VCC)]
Diode Selection
To obtain better efficiency, the Schottky diode is
recommended for its low reverse leakage current, low
recovery time and low forward voltage. With its low power
dissipation, the Schottky diode outperforms other silicon
diodes and increases overall efficiency.
Input Capacitor selection
Input capacitor has to supply peak current to the inductor
and flatten the current ripple on the input. The low ESR
condition is required to avoid increasing power loss. The
ceramic capacitor is recommended due to its excellent
high frequency characteristic and low ESR, which are
suitable for the RT8476. For maximum stability over the
entire operating temperature range, capacitors with better
dielectric are suggested.
L1 > tOFF x (VCC(MAX) − VIN(MIN) + VF) / ILIM
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RT8476
Thermal Protection
Maximum Power Dissipation (W)1
4.0
A thermal protection feature is to protect the RT8476 from
excessive heat damage. When the junction temperature
exceeds 150°C, the thermal protection will turn off the LX
terminal. When the junction temperature drops below
125°C, the RT8476 will turn on the LX terminal and return
to normal operation.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 package, the thermal resistance, θ JA , is
188°C/W on a standard JEDEC 51-7 four-layer thermal
test board. For SOP-8 (Exposed Pad) package, the
thermal resistance, θJA, is 29°C/W on a standard JEDEC
51-7 four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by the following
formula :
PD(MAX) = (125°C − 25°C) / (188°C/W) = 0.53W for
SOP-8 package
P D(MAX) = (125°C − 25°C) / (29°C/W) = 3.44W for
SOP-8 (Exposed Pad) package
Four-Layer PCB
SOP-8 (Exposed Pad)
3.5
3.0
2.5
2.0
1.5
1.0
SOP-8
0.5
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 1. Derating Curve of Maximum Power Dissipation
Layout Consideration
PCB layout is very important to design power switching
converter circuits. Some recommended layout guidelines
are suggested as follows :

The power components L1, D6, M1, CIN, and COUT must
be placed as close to each other as possible to reduce
the ac current loop area. The power components L2,
D7, and M2 must be placed as close to each other as
possible to reduce the ac current loop area. The PCB
trace between power components must be as short and
wide as possible due to large current flow through these
traces during operation.

The capacitor COUT, C6 and external resistor, RSENSE,
must be placed as close as possible to the VIN and
SENSE pins of the device respectively.

The GND should be connected to a strong ground plane.

Keep the main current traces as short and wide as
possible.
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 1 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS8476-01 March 2015
is a registered trademark of Richtek Technology Corporation.
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13
RT8476
D6
L1
VIN
VCC
R4
OVP
R5
COUT
RSENSE
C15
D7
D1
D2
GATE1
VL
VN
R11
D3
D4
L2
CIN
M1
R6
LED+
C6
GND
L3
C8
8
GATE2
CS
2
7
CREG
OVP
3
6
VCC
GND
4
5
ISN
LED-
M2
C5
C3
GND
Figure 2. PCB Layout Guide for SOP-8 Package
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
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14
is a registered trademark of Richtek Technology Corporation.
DS8476-01 March 2015
RT8476
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS8476-01 March 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
15
RT8476
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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16
DS8476-01 March 2015