® RT9146/7 20V, 1A, Rail-to-Rail Operational Amplifier General Description Features The RT9146/7 consists of a low power, high slew rate, single supply rail-to-rail input and output operational amplifier. z Rail-to-Rail Output Swing z Supply Voltage : 6V to 20V Peak Output Current : 1A High Slew Rate : 35V/μ μs Unity Gain Stable RoHS Compliant and Halogen Free The RT9146 contains a single amplifier and the RT9147 contains two amplifiers in one package. z z z z The RT9146/7 has a high slew rate (35V/μs), 1A peak output current and offset voltage below 15mV. The RT9146/ 7 is ideal for Thin Film Transistor Liquid Crystal Displays (TFT-LCD) . The RT9146 is available in the WDFN-8L 3x3 package, and the RT9147 is available in the WQFN-16L 4x4 package. The RT9146/7 are specified for operation over the full −40°C to 85°C temperature range. Applications z z z z TFT-LCD Panels Notebook Computers Monitors LCD TVs Pin Configurations (TOP VIEW) NC VINVIN+ VS- RT9146 Package Type QW : WDFN-8L 3x3 QWA : WDFN-8SL 3x3 7 3 6 4 9 5 Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) NC NC VOUTB NC Package Type QW : WQFN-16L 4x4 16 15 14 13 NC 1 12 VINB- 11 VINB+ 10 VS- 9 VINA+ NC 2 VS+ 3 NC 4 VS- 7 8 VINA- RoHS compliant and compatible with the current require- 6 NC NC 5 VOUTA 17 Richtek products are : ments of IPC/JEDEC J-STD-020. ` NC VS+ VOUT NC RT9146 RT9147 ` 8 2 WDFN-8L 3x3 / WDFN-8SL 3x3 Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) Note : 1 VS- Ordering Information Suitable for use in SnPb or Pb-free soldering processes. WQFN-16L 4x4 RT9147 Marking Information RT9146ZQW 85 YM DNN RT9146ZQWA RT9147ZQW 85 : Product Code 2W : Product Code YMDNN : Date Code YMDNN : Date Code 2W YM DNN Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9146/7-03 May 2013 43 : Product Code 43 YM DNN YMDNN : Date Code is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9146/7 Typical Application Circuit VS+ VS+ VINx+ VINx- + VOUTx RS* - TFT-LCD Capacitance VS- * : RS may be needed for some applications. Functional Pin Description RT9146 Pin No. WDFN-8L WDFN-8SL Pin Name 3x3 3x3 1, 5, 8 NC No Internal Connection. Pin Function 2 VIN− Negative Input. 3 VIN+ Positive Input. 4, 9 (Exposed Pad) VS− Negative Supply Input. The exposed pad must be soldered to a large PCB and connected to VS− for maximum power dissipation. 6 VOUT Output. 7 VS+ Positive Supply Input. Bypass VS+ to VS− with a 0.1μF capacitor placed as close as possible to the device. RT9147 Pin No. Pin Name 1, 2, 4, 5, 6, 13, 15, 16 NC Pin Function No Internal Connection. 3 VS+ Positive Supply Input. Bypass VS+ to VS− with a 0.1μF capacitor placed as close as possible to the device. 7 VOUTA Output of Amplifier A. 8 VINA− Positive Input of Amplifier A. 9 VINA+ Negative Input of Amplifier A. VS− Negative Supply Input. The exposed pad must be soldered to a large PCB and connected to VS− for maximum power dissipation. 11 VINB+ Positive Input of Amplifier B. 12 VINB− Negative Input of Amplifier B. 14 VOUTB Output of Amplifier B. 10, 17 (Exposed Pad) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS9146/7-03 May 2013 RT9146/7 Function Block Diagram VS+ VINVIN+ - VOUT + VS- RT9146 VOUTA VOUTB VINA- - - VINB- VINA+ VS+ + + VINB+ VS- RT9147 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9146/7-03 May 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9146/7 Absolute Maximum Ratings z z z z z z z z z (Note 1) Supply Voltage, (VS+ to VS−) ------------------------------------------------------------------------------------------- 24V VINx+, VINx− to VS− ------------------------------------------------------------------------------------------------------- −0.3V to 24V VINx+ to VINx− -------------------------------------------------------------------------------------------------------------- ±5V Power Dissipation, PD @ TA = 25°C WDFN-8L 3x3 ---------------------------------------------------------------------------------------------------------------- 3.22W WDFN-8SL 3x3 -------------------------------------------------------------------------------------------------------------- 3.22W WQFN-16L 4x4 -------------------------------------------------------------------------------------------------------------- 3.51W Package Thermal Resistance (Note 2) WDFN-8L 3x3, θJA ----------------------------------------------------------------------------------------------------------- 31°C/W WDFN-8L 3x3, θJC ----------------------------------------------------------------------------------------------------------- 8°C/W WDFN-8SL 3x3, θJA --------------------------------------------------------------------------------------------------------- 31°C/W WDFN-8SL 3x3, θJC -------------------------------------------------------------------------------------------------------- 8°C/W WQFN-16L 4x4, θJA --------------------------------------------------------------------------------------------------------- 28.5°C/W WQFN-16L 4x4, θJC -------------------------------------------------------------------------------------------------------- 7°C/W Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------------- 260°C Junction Temperature ------------------------------------------------------------------------------------------------------- 150°C Storage Temperature Range ---------------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Model) ------------------------------------------------------------------------------------------------ 2kV MM (Machine Model) ------------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions z z z (Note 4) Supply Voltage, VS− = 0V, VS+ ----------------------------------------------------------------------------------------- 6V to 20V Junction Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VS+ = 16V, VS− = 0V, VINx+ = VOUTx = VS+ / 2, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Characteristics Input Offset Voltage VOS VCM = VS+ / 2 -- 2 15 mV Input Bias Current IB VCM = VS+ / 2 -- 2 50 nA Load Regulation ΔVLOAD IOUTx = 0 to −80mA -- 0.1 -- IOUTx = 0 to 80mA -- −0.1 -- Common Mode Input Range CMIR 0.5 -- VS+ −0.5 V Common Mode Rejection Ratio CMRR 0.5V ≤ VOUTx ≤ VS+ − 0.5V -- 95 -- dB Open Loop Gain AVOL 0.5V ≤ VOUTx ≤ VS+ − 0.5V -- 118 -- dB Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 mV/mA is a registered trademark of Richtek Technology Corporation. DS9146/7-03 May 2013 RT9146/7 Parameter Symbol Test Conditions Min Typ Max Unit -- 0.6 1.5 V VS+ − 1.5 VS+ − 0.3 -- V 800 1000 1400 mA Output Characteristics Output Swing Low VOL IL = −50mA Output Swing High VOH IL = 50mA Transient Peak Output Current IPK Power Supply Power Supply Rejection Ratio Quiescent Current PSRR VS+ = 6V to 20V, VCM = VOUTx = VS+ / 2 -- 96 -- dB IDD No Load -- 4 -- mA SR 4V step, 20% to 80%, AV = 1 -- 35 -- V/μs Setting to ±0.1% (AV = 1) tS AV = 1, VOUTx = 2V step RL = 10kΩ, CL = 10pF -- 270 -- ns −3dB Bandwidth BW RL = 10kΩ, CL = 10pF -- 16 -- MHz Gain-Bandwidth Product GBWP RL = 10kΩ, CL = 10pF -- 12 -- MHz Phase Margin Thermal Shutdown Temperature Thermal Shutdown Hysteresis PM RL = 10kΩ, CL = 10pF -- 50° -- -- TS Temperature Rising -- 150 -- °C -- 20 -- °C Dynamic Performance Slew Rate ΔT S Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9146/7-03 May 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9146/7 Typical Operating Characteristics Supply Current vs. Temperature Supply Current vs. Supply Voltage 5 Supply Current (mA) Supply Current (mA) 5 4 3 2 4 3 2 1 Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V Unity Gain, VIN+ = VS+ / 2, VS+ = 6V to 20V, VS− = 0V 1 0 6 8 10 12 14 16 18 20 -50 -25 0 Input Offset Voltage vs. Supply Voltage 50 75 100 125 Input Offset Voltage vs. Temperature 0.0 1 Input Offset Voltage (mV) Input Offset Voltage (mV) 25 Temperature (°C) Supply Voltage (V) -0.5 -1.0 0 -1 -2 Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V Unity Gain, VIN+ = VS+ / 2, VS+ = 6V to 20V, VS− = 0V -1.5 -3 6 8 10 12 14 16 18 20 -50 -25 0 25 50 Supply Voltage (V) Temperature (°C) Output Voltage Swing vs. Supply Voltage Rail to Rail 75 100 125 Output Voltage Swing (V) 0.4 Swing Low, VIN+ = 0V, VIN− = 3V, ILOAD = −50mA 0.2 0.0 VIN+ (4V/Div) -0.2 Swing High, VIN+ = 3V, VIN− = 0V, ILOAD = 50mA VOUT (4V/Div) -0.4 Unity Gain, VIN+ = 0.5V to 15.5V, VS+ = 16V, VS− = 0V, f = 10kHz VS+ = 6V to 20V, VS− = 0V -0.6 6 8 10 12 14 16 18 20 Time (25μs/Div) Supply Voltage (V) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9146/7-03 May 2013 RT9146/7 Small Signal Response Large Signal Response VIN+_ac coupled (100mV/Div) VIN+_ac coupled (2V/Div) VOUT_ac coupled (100mV/Div) VOUT_ac coupled (2V/Div) Unity Gain, VIN+ = 6V to 10V, VS+ = 16V, VS− = 0V, f = 100kHz Unity Gain, VIN+ = 7.9V to 8.1V, VS+ = 16V, VS− = 0V, f = 100kHz Time (2.5μs/Div) Time (2.5μs/Div) Slew Rate Slew Rate Rising Falling VIN+ (5V/Div) VIN+ (5V/Div) VOUT (5V/Div) VOUT (5V/Div) Unity Gain, VIN+ = 4V to 8V, VS+ = 16V, VS− = 0V, f = 10kHz Time (50ns/Div) Time (50ns/Div) −3dB Bandwidth Gain Bandwidth Product Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V, RL = 10kΩ, CL = 10pF Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9146/7-03 May 2013 Unity Gain, VIN+ = 8V to 4V, VS+ = 16V, VS− = 0V, f = 10kHz Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V, RL = 10kΩ, CL = 10pF is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9146/7 Applications Information Operating Voltage The RT9146/7 total supply voltage range is guaranteed from 6V to 20V. The specifications are stable over both full supply range and operating temperatures from −40°C to 85°C. The output swing of the RT9146/7 typically extends to within 1.5V of positive/negative supply rails with 50mA load current source/sink. Decreasing the load current will obtain an output swing even closer to the supply rails. Short-Circuit Condition An internal short-circuit protection is implemented to protect the device from output short-circuit. The RT9146/ 7 limits the short-circuit current to ±1A if the output is directly shorted to positive/negative supply rails. LCD Panel Applications The RT9146/7 is mainly designed for LCD V-com buffer. The operational amplifier has 1A instantaneous source/ sink peak current. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WDFN-8L 3x3 package, the thermal resistance, θJA, is 31°C/W on a standard JEDEC 51-7 four-layer thermal test board. For WDFN-8SL 3x3 package, the thermal resistance, θJA, is 31°C/W on a standard JEDEC 51-7 four-layer thermal test board. For WQFN-16L 4x4 package, the thermal resistance, θJA, is 28.5°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : P D(MAX) = (125°C − 25°C) / (31°C/W) = 3.22W for WDFN-8L 3x3 package P D(MAX) = (125°C − 25°C) / (31°C/W) = 3.22W for WDFN-8SL 3x3 package PD(MAX) = (125°C − 25°C) / (28.5°C/W) = 3.51W for WQFN-16L 4X4 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 4.0 Maximum Power Dissipation (W)1 The RT9146/7 is a high performance operational amplifier capable of driving large loads for different applications. A high slew rates, rail-to-rail input and output capability, and low power consumption are the features which make the RT9146/7 ideal for LCD applications. The RT9146/7 also has wide bandwidth and phase margin to drive a load with 10kΩ resistance and 10pF capacitance. Four-Layer PCB WQFN-16L 4x4 3.5 3.0 WDFN-8L 3x3 2.5 WDFN-8SL 3x3 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 1. Derating Curve of Maximum Power Dissipation where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS9146/7-03 May 2013 RT9146/7 Layout Consideration PCB layout is very important for designing power converter circuits. The following layout guidelines should be strictly followed for best performance of the RT9146/7. ` Place the power components as close to the IC as possible. The traces should be wide and short, especially for the high current loop. ` A series resistance may be needed at the output for some applications. ` Connect a 0.1μF capacitor from VINx+ to ground and place it as close to the IC as possible for better performance. ` The exposed pad of the chip should be connected to a large PCB plane for maximum thermal consideration. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9146/7-03 May 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9146/7 Outline Dimension D2 D L E E2 1 e SEE DETAIL A b 2 1 2 1 A A1 A3 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 2.950 3.050 0.116 0.120 D2 2.100 2.350 0.083 0.093 E 2.950 3.050 0.116 0.120 E2 1.350 1.600 0.053 0.063 e L 0.650 0.425 0.026 0.525 0.017 0.021 W-Type 8L DFN 3x3 Package Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS9146/7-03 May 2013 RT9146/7 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 2.900 3.100 0.114 0.122 D2 2.250 2.350 0.089 0.093 E 2.900 3.100 0.114 0.122 E2 1.450 1.550 0.057 0.061 0.650 e L 0.300 0.026 0.400 0.012 0.016 W-Type 8SL DFN 3x3 Package Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9146/7-03 May 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9146/7 D SEE DETAIL A D2 L 1 E E2 e b A A1 A3 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.250 0.380 0.010 0.015 D 3.950 4.050 0.156 0.159 D2 2.000 2.450 0.079 0.096 E 3.950 4.050 0.156 0.159 E2 2.000 2.450 0.079 0.096 e L 0.650 0.500 0.026 0.600 0.020 0.024 W-Type 16L QFN 4x4 Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 12 DS9146/7-03 May 2013