SPECIFICATIONS FOR LCD MODULE

SPECIFICATIONS FOR
LCD MODULE
CUSTOMER
CUSTOMER PART NO.
AMPIRE PART NO.
APPROVED
AM480272H3TMQW-W2H
BY
DATE
† Approved For Specifications
† Approved For Specifications & Sample
AMPIRE CO., LTD.
2F., No.88, Sec. 1, Sintai 5th Rd., Sijhih City, Taipei County 221,
Taiwan (R.O.C.)台北縣汐止市新台五路一段 88 號 2 樓(東方科學園區 D 棟)
TEL:886-2-26967269 , FAX:886-2-26967196 or 26967270
APPROVED BY
Date : 2009/12/10
CHECKED BY
AMPIRE CO., LTD.
ORGANIZED BY
1
RECORD
Revision Date Page
2009/12/10
--
OF
REVISION
Contents
Editor
New Release
Kokai
4.3" one chip + 500cd/m2+80/16Bit MCU interface
+Controller Board+ RESET Resister R1=100K
Date : 2009/12/10
AMPIRE CO., LTD.
2
1 Features
4.3 inch Amorphous-TFT-LCD (Thin Film Transistor Liquid Crystal Display) module.
This module is composed of a 4.3” TFT-LCD panel, LCD controller, power driver circuit,
and backlight unit.
1.1 TFT Panel Feature :
(1) Construction: 4.3” a-Si color TFT-LCD, White LED Backlight and PCB.
(2) Resolution (pixel): 480(R.G.B) X 272
(3) Number of the Colors : 262K colors ( R , G , B 6 bit digital each)
(4) LCD type : Transmissive Color TFT LCD ( normally White)
(5) Interface: 40 pin pitch 0.5
(6) Power Supply Voltage: 3.3V single power input. Built-in power supply circuit.
(7) Viewing Direction: 6 O’clock ( The direction it’s hard to be discolored ):
1.2 LCD Controller Feature:
(1) MCU interface 8/9/16/18 bit 80&68 series MCU interface.
(2) Display RAM size : 640x320x3x6 bits. Ex : 320x240 two frame buffer with
262K colors.
(3) Arbitrary display memory start position selection.
(4) MCU interface : 8 bit / 9 bit / 16bit / 18 bits 80/68 MPU interface.
(5) 8 bit / 16 bit interface support 65K ( R5G6B5) /262K(R6G6B6) colors data
format.
(6) 9 bit / 18 bit interface support 262K(R6G6B6) colors data format only.
2 Physical specifications
Item
Specifications
Unit
Display resolution(dot)
480(R.G.B.) (W) x 272(H)
mm
Active area
95.04 (W) x 53.856 (H)
mm
Screen size
4.3 (Diagonal)
mm
Pixel size
0.198 (W) x 0.198 (H)
um
Color configuration
R.G.B stripe
Overall dimension
105.5(W) x 67.2(H) x 6.6(D)
mm
Weight
T.B.D
mg
Backlight unit
LED
Date : 2009/12/10
AMPIRE CO., LTD.
3
3 Default Setting & Option
z Interface :
The user can select the MCU interface by change the Jumper & Resister Array.
Setting
JP1
RA1
RA2
RA3
RA4
Remark
Interface Type
80-18Bit interface
80-16Bit interface
80-9Bit interface
80-8Bit interface
68-18Bit interface
68-16Bit interface
68-9Bit interface
68-8Bit interface
1,2 short
2,3 open
1,2 short
2,3 open
1,2 short
2,3 open
1,2 short
2,3 open
1,2 open
2,3 short
1,2 open
2,3 short
1,2 open
2,3 short
1,2 open
2,3 short
2K
OPEN OPEN OPEN
ohm
OPEN
2K
OPEN OPEN
ohm
OPEN OPEN
2K
OPEN
ohm
OPEN OPEN OPEN
2K
ohm
2K
OPEN OPEN OPEN
ohm
OPEN
2K
OPEN OPEN
ohm
OPEN OPEN
2K
OPEN
ohm
OPEN OPEN OPEN
2K
ohm
z LED Driver:
The user can select the LED driver built-in or not.
Pin Define
PIN3 LEDA/PWM
Interface Type
Without LED Driver
With LED Driver
LED Anode
PWM
The PWM pin combined enable and
brightness adjust function.
When PWM=High constantly, the LED
back-light is turn on.
When PWM=GND constantly, the LED
back-light is turn off.
When PWM signal (100Hz to 1KHz) input, the
LED Back-light brightness is relative to duty
cycle of the PWM signal.
Date : 2009/12/10
AMPIRE CO., LTD.
PIN4
LEDK
LED
Cathode
NC
Default
Remark
Default
This pin
must be
open
4
z Touch panel and Touch panel controller:
The user can select the with TP controller or without TP controller.
Pin Define
SK/X1 DO/X2
DI/Y1
TPCS/Y2
IRQ
Option
Without TP
NC
NC
NC
NC
NC
With TP / Without
X1
X2
Y1
Y2
NC
TP controller
With TP / With
SK
DO
DI
TPCS
IRQ
TP controller
Remark
Default
If user want to change the default setting for mass production, please contact with
Ampire. We’ll apply a new P/N for you.
Date : 2009/12/10
AMPIRE CO., LTD.
5
4 Electrical specification
4.1 Absolute max. ratings
4.1.1 Electrical Absolute max. ratings
Item
Symbol Condition
Power voltage
VDD
Input voltege
V in
B
VSS=0
B
Min.
Max.
Unit
-0.3
T.B.D
V
-0.3
VDD+0.3
V
Remark
Note 1
Note1: /CS,/WR,/RD,RS,DB0~DB17
4.1.2 Environmental Absolute max. ratings
OPERATING
STORAGE
Item
MIN
MAX
MIN
MAX
Temperature
-20
70
-30
80
Humidity
Note1
Note1
Corrosive Gas
Not Acceptable
Not Acceptable
Remark
Note2,3,4,5,6,7
Note1 : Ta <= 40℃ : 85% RH max
Ta > 40℃ : Absolute humidity must be lower than the humidity of 85%RH
at 40℃
Note2 : For storage condition Ta at -30℃ < 48h , at 80℃ < 100h
For operating condition Ta at -20℃ < 100h
Note3 : Background color changes slightly depending on ambient temperature.
This phenomenon is reversible.
Note4 : The response time will be slower at low temperature.
Note5 : Only operation is guarantied at operating temperature. Contrast ,
response time, another display quality are evaluated at +25℃
Note6 :
z LED BL : When LCM is operated over 40℃ ambient temperature, the I LED of
the LED back-light should be follow :
B
Date : 2009/12/10
AMPIRE CO., LTD.
6
B
Note7 : This is panel surface temperature, not ambient temperature.
Note8 :
z LED BL:When LCM be operated over than 40℃ , the life time of the LED
back-light will be reduced.
.
4.1.3 LED back-light Unit Absolute max. ratings
Item
Symbol
Ratings
Unit
Pulse Forward Current
IF
100
mA
Forward Current
IF
30
mA
Reverse Voltage
VR
35
V
Power Dissipation
Po
0.84
W
Date : 2009/12/10
AMPIRE CO., LTD.
Remark
7
4.2 Electrical characteristics
4.2.1 DC Electrical characteristic of the LCD
Typical operating conditions (VSS=0V)
Symbol
Min.
Typ.
Item
Power supply
Input Voltage
for logic
Output Voltage for
Logic
H Level
Max.
Unit
VDD
3.0
3.3
5.0
V
V IH
2.0
-
5.5
V
B
B
Remark
Note 1
L Level
V IL
H Level
V OH
B
B
B
B
VSS
-
0.8
V
2.4
-
VDD
V
Note 2
L Level
Power Supply current
V OL
VSS
IDD
-
B
B
0.4
V
-
mA
450
Note 3
Note1: With 5V Tolerance Input , /CS, /WR,/RD,RS,DB0~DB17
Note2: DB0~DB17
Note3: fV =60Hz , Ta=25℃ , Display pattern : All Black
4.2.2 Electrical characteristic of LED Back-light
Paramenter
Symbol
Min.
Typ.
Max.
Unit
LED voltage
LED forward current
V AK
B
B
--
23.1
--
V
I LED
--
20
--
mA
Ta=25℃
I LED
--
15
--
mA
Ta=60℃
B
B
B
Date : 2009/12/10
Condiction
I LED
=20mA,Ta=25℃
B
B
B
AMPIRE CO., LTD.
8
„
The constant current source is needed for white LED back-light driving.
When LCM is operated over 60℃ ambient temperature, the I LED of the LED back-light
B
B
should be adjusted to 15 mA.
Date : 2009/12/10
AMPIRE CO., LTD.
9
4.3
AC Timing characteristic of the Graphic TFT LCD controller
4.3.1 80 series Timing
Symbol
tcycle
PWHW
PWLW
tAS
tAH
tDSW
tHWR
tcsb-s
tcsb-h
Parameter
Enable cycle time
Enable high-level pulse width
Enable low-level pulse width
RS setup time
RS hold time
Write data setup time
Write data hold time
CSB setup time
CSB hold time
Date : 2009/12/10
Min
100
66
33
16
16
50
40
16
16
Typ
200
70
130
25
45
50
50
20
30
AMPIRE CO., LTD.
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Remark
10
5 Optical specification
5.1 Optical characteristic :
Item
Response
Time
Symbol
Rise
Fall
Contrast ratio
Top
Bottom
Viewing
Angle
Left
Right
Brightness
LED BL
Without TP
Brightness
LED BL
With TP
Conditon
Min.
Typ.
Max.
Unit
Remark
Tr
Tf
Θ=0°
---
15
35
20
50
ms
Note 1,2,3,5
CR
At optimized
viewing angle
150
250
--
CR≧10
-----
55
35
70
70
-----
deg.
Note1,2, 5,6
I LED =20mA,
25℃
500
--
cd/
m2
Note 7
I LED =20mA,
25℃
400
cd/
m2
Note 7
YL
B
B
YL
B
B
B
B
B
B
Note 1,2,4,5
P
--
P
P
P
XR
(0.585) (0.615) (0.645)
Note 7
YR
(0.314) (0.344) (0.374)
For reference
XG
(0.277) (0.307) (0.337)
Green chromaticity
only. These
YG
(0.532) (0.562) (0.592)
Θ=0°
data should
XB
(0.103) (0.133) (0.163)
be update
Blue chromaticity
YB
(0.120) (0.150) (0.180)
according the
XW
(0.279) (0.309) (0.339)
prototype.
White chromaticity
YW
(0.320) (0.350) (0.380)
( )For reference only. These data should be update according the prototype.
Note 1:
Red chromaticity
LED BL : Ambient temperature=25℃,and lamp current I LED =20mA.To be measured
in the dark room.
Note 2:To be measured on the center area of panel with a viewing cone of 1°by Topcon
luminance meter BM-7,after 10 minutes operation.
Note 3.Definition of response time:
The output signals of photo detector are measured when the input signals
are changed from “black“ to “white”(falling time) and from ”white” to “black”
(rising time),respectively. The response time is defined as the time interval
between the 10% and 90% of amplitudes. Refer to figure as below.
z
Date : 2009/12/10
B
AMPIRE CO., LTD.
B
11
Note 4.Definition of contrast ratio:
Contrast ratio is calculated with the following formula.
Contrast ratio(CR)=
Photo detector output when LCD is at ”White” state
Photo detector Output when LCD is at “Black” state
Note 5:White V i =V i50 +1.5V
B
B
B
B
Black V i =V i50 +2.0V
“±”means that the analog input signal swings in phase with V COM signal.
“ “ means that the analog input signal swings out of phase with V COM
signal.
B
B
B
B
B
B
B
B
V i50 : The analog input voltage when transmission is 50%.The 100%
Transmission is defined as the transmission of LCD panel when all the
Input terminals of module are electrically opened.
B
B
Note 6.Definition of viewing angle, Refer to figure as below.
Date : 2009/12/10
AMPIRE CO., LTD.
12
Note 7.Measured at the center area of the panel when all the input terminals of LCD
panel are electrically opened.
Ring light
Brightness gauge
BM-7 (Topcon)
LCD module
Metal halide lamp
Glass fiber
LIGHT:OFF, LIGHT:ON
LCD
Optical Detector
Brightness gauge
BM-7 (Topcon)
LED / CCFL
Date : 2009/12/10
LIGHT:ON, LIGHT:OFF
AMPIRE CO., LTD.
13
5.2 Optical characteristic of the LED Back-light
ITEM
MIN
TYP
MAX
UNIT
Condition
Bare Brightness
-4200
-Cd/m2
I LED = 20 mA,Ta=25℃
AVG. X of 1931 C.I.E.
(0.26)
(0.29)
(0.32)
-I LED = 20 mA,Ta=25℃
AVG. X of 1931 C.I.E.
(0.25)
(0.28)
(0.31)
-I LED = 20 mA,Ta=25℃
Brightness Uniformity
80
--%
I LED = 20 mA,Ta=25℃
( )For reference only. These data should be update according the prototype.
B
B
B
B
B
B
B
B
Note1 : Measurement after 10 minutes from LED BL operating.
Note2 : Measurement of the following 9 places on the display.
Note3: The Uniformity definition
(Min Brightness / Max Brightness) x 100%
Date : 2009/12/10
AMPIRE CO., LTD.
14
6 Interface specifications
6.1 Driving signals for the TFT panel
Pin no
Symbol
1~2
VSS
3
4
LED_A/PWM
LED_K
I/O
Description
Remark
GND
Without LED driver
LED Anode
With LED Driver
PWM
Without LED driver
LED Cathode
With LED Driver
Must be OPEN
5
/RESET
6
RS
7
/CS
30
NC
No connection
31
NC
No connection
32
NC
No connection
33
NC
No connection
34
NC
No connection
35 ~ 37
VDD
Power supply for the logic (3.3V)
38 ~ 40
VSS
GND
Default
Default
I Reset signal for TFT LCD controller
I Register and Data select for TFT LCD controller
I Chip select low active signal for TFT LCD controller
80mode : /WR low active signal for TFT LCD
8
/WR(E)
I controller
68mode : E signal latch on rising edge
80mode : /RD low active signal for TFT LCD
9
/RD(R/W)
I controller
68mode : R/W signal Hi: read Lo:Write
10 ~ 27 DB0 ~ DB17 I/O Data Bus
Select colors data format
28
65K/262K
I
H : 262K L : 65K
29
VSS
GND
Date : 2009/12/10
AMPIRE CO., LTD.
15
7 BLOCK DIAGRAM
Date : 2009/12/10
AMPIRE CO., LTD.
16
8 Interface Protocol
8.1 18Bit-80/68-Write to Command Register
8.2 18Bit-80/68-Write to Display RAM
Date : 2009/12/10
AMPIRE CO., LTD.
17
8.3 16Bit-80/68- Write to Command Register
8.4 16Bit-80/68-Write to Display RAM
/CS
80
mode
68
mode
/RD
/WR
E
R/W
RS
DB[15:0]
Note1
Display
RAM
Write Enable
0x000C1
Note2
Send
Data1
Note3
Send
Data2
Note4
Note5
Send
DataN
Display RAM
Write Disable
0x00080
Note1: DB[15:0] send 0x000C1 to Enable the Display RAM write.
Note2: DB[15:0] represent the writing Data1 to Display RAM
Note3: DB[15:0] represent the writing Data2 to Display RAM
Note4: DB[15:0] represent the writing DataN to Display RAM
Note5: DB[15:0] send 0x00080 to Disable the Display RAM write.
Date : 2009/12/10
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18
8.5 9Bit-80/68- Write to Command Register
8.6 9Bit-80/68-Write to Display RAM
/CS
80
mode
68
mode
/RD
/WR
E
R/W
RS
DB[8:0]
Note1
Display
RAM
Write Enable
0x000C1
Note2
Send
Data1
Note3
Send
Data2
Note4
Note5
Send
DataN
Display RAM
Write Disable
0x00080
Note1: DB[8:0] send 0x000C1 to Enable the Display RAM write.
Note2: DB[8:0] represent the writing Data1 to Display RAM
Note3: DB[8:0] represent the writing Data2 to Display RAM
Note4: DB[8:0] represent the writing DataN to Display RAM
Note5: DB[8:0] send 0x00080 to Disable the Display RAM write.
Date : 2009/12/10
AMPIRE CO., LTD.
19
8.7 8Bit-80/68- Write to Command Register
8.8 8Bit-80/68-Write to Display RAM
/CS
80
mode
68
mode
/RD
/WR
E
R/W
RS
DB[7:0]
Note1
Display
RAM
Write Enable
0x000C1
Note2
Send
Data1
Note3
Send
Data2
Note4
Note5
Send
DataN
Display RAM
Write Disable
0x00080
Note1: DB[7:0] send 0x000C1 to Enable the Display RAM write.
Note2: DB[7:0] represent the writing Data1 to Display RAM
Note3: DB[7:0] represent the writing Data2 to Display RAM
Note4: DB[7:0] represent the writing DataN to Display RAM
Note5: DB[7:0] send 0x00080 to Disable the Display RAM write.
Date : 2009/12/10
AMPIRE CO., LTD.
20
8.9 Data transfer order Setting
8.9.1 18 bit interface 262K color only (Pin28 65K/262K =High)
DB 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
R5
R4
R3
R2
R1
R0
G5
G4
G3
G2
G1
G0
B5
8.9.2 16 bit interface 65K color (Pin28 65K/262K =Low)
DB
15 14 13 12 11 10 9 8 7 6 5
R4
R3
R2
R1
R0
G5
G4
G3
G2
G1
G0
P
P
R3
R2
R1
R0
G5
G4
G3
G2
G1
G0
B5
0
B3
B2
B1
B0
4
3
2
1
0
B4
B3
B2
B1
B0
3
X
2
X
1
0
B3
B2
R5
B1
R4
B0
P
P
1
B4
8.9.3 16 bit interface 262K color (Pin28 65K/262K =High)
DB
15 14 13 12 11 10 9 8 7 6 5 4
st
1 data
X X X X X X X X X X X X
2 nd data
2
B4
8.9.4 9 bit interface 262K color only (Pin28 65K/262K =High)
DB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 st data
X X X X X X X R5 R4 R3 R2 R1 R0 G5 G4 G3
2 nd data
X X X X X X X G2 G1 G0 B5 B4 B3 B2 B1 B0
P
P
P
P
8.9.5 8 bit interface 65K color (Pin28 65K/262K =Low)
DB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 st data
X X X X X X X X R4 R3 R2 R1 R0 G5 G4 G3
2 nd data
X X X X X X X X G2 G1 G0 B4 B3 B2 B1 B0
P
P
P
P
8.9.6 8 bit interface 262K color (Pin28 65K/262K =High)
DB
15 14 13 12 11 10 9 8 7 6 5 4 3 2
st
1 data
X X X X X X X X
2 nd data
X X X X X X X X R3 R2 R1 R0 G5 G4
rd
3 data
X X X X X X X X G1 G0 B5 B4 B3 B2
P
P
P
P
P
P
Date : 2009/12/10
AMPIRE CO., LTD.
1
0
R5
G3
B1
R4
G2
B0
21
9 Register Depiction
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
MSB of X-axis start position
00
00
Description set the horizontals start position of display active region
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
LSB of X-axis start position
01
00
Description set the horizontals start position of display active region
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
MSB of X-axis end position
02
01
Description set the horizontals end position of display active region
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
LSB of X-axis end position
03
3F
Description set the horizontals end position of display active region
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
MSB of Y-axis start position
04
00
Description set the vertical start position of display active region
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
LSB of Y-axis start position
05
00
Description Set the vertical start position of display active region
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
MSB of Y-axis end position
06
00
Description set the vertical end position of display active region
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
LSB of Y-axis end position
07
EF
Description Set the vertical end position of display active region
To simplify the address control of display RAM access, the window area address
function allows for writing data only within a window area of display RAM specified by
registers REG[00]~REG[07] .
After writing data to the display RAM, the Address counter will be increased within
setting window address-range which is specified by
Date : 2009/12/10
AMPIRE CO., LTD.
22
MIN X address (REG[0] & REG[1])
MAX X address (REG[2] & REG[3])
MIN Y address (REG[4] & REG[5])
MAX Y address (REG[6] & REG[7])
Therefore, data can be written consecutively without thinking the data address.
Register
Address
(Hex)
08
Default
DB7 DB6 DB5 DB4
(Hex)
01
X
X
X
X
DB3
DB2
X
X
DB1
DB0
Remark
_PanelXSize
H_Byte[1:0]
Description Set the panel X size
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1
(Hex)
(Hex)
09
40
_PanelXSize L_Byte[7:0]
Description Set the panel X size
DB0
Remark
The register REG[08] and REG[09] is use to calculate the RAM address. If you want to
use the TFT as Landscape mode (320x240), the REG[08] & RGE[09 must set to 320. If
you want to use the TFT as Portrait mode (240x320), the REG[08] & RGE[09] must set
to 240.
Date : 2009/12/10
AMPIRE CO., LTD.
23
Register
Address
(Hex)
Default
(Hex)
0A
00
DB7 DB6 DB5 DB4
X
X
X
X
DB3
DB2 DB1
DB0
[17:16] bits of
memory write start
address
X
Description Memory write start address
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
[15:8] bits of memory write start address
0B
00
Description Memory write start address
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
[7:0] bits of memory write start address
0C
00
Description Memory write start address
Register
Address
(Hex)
0x10
Default
(Hex)
DB7
DB6
DB5 DB4
Remark
DB3
DB2
Remark
Remark
DB1 DB0 Remark
BUS_SEL
Blanking P/S_SEL
CLK_SEL
0x0D Bit_SWAP OUT_TEST
"0x10_Clk_sel[1:0]" : The TFT controller built-in 40Mhz PLL clock. These bits
are for select the TFT panel dot clock frequency.
00 : 20Mhz 01: 10Mhz 02: 5 Mhz
"0x10_ps_sel[2]" : The TFT controller support parallel and serial RGB
interface. These bits are for select the output timing.
0 : serial Panel 1: Parallel panel
"0x10_blanking_tmp[3]"
0 : OFF (blanking) 1: ON ( normal operation)
Description
"0x10_bus_sel[5:4]" : It only for serial Panel
00=R , 01=G , 10=B
"0x10_out_test[6]" : Self test
0 : normal operation 1: for test (don’t use for normal operation)
When set the bit to “1” , the Rout=(Reg 2a[6:0]) Gout=(Reg 2b[6:0])
Bout=(Reg 2c[6:0])
"0x10_bit_swap[7]" : 0-normal
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7
DB6
DB5 DB4 DB3
DB2 DB1 DB0 Remark
(Hex)
(Hex)
X
X
EVEN
_ODD
0x11
00
" Even line of serial panel data out sequence or data bus order of parallel
Description panel
000: RGB
Date : 2009/12/10
AMPIRE CO., LTD.
24
001: RBG
010: GRB
011: GBR
100: BRG
101: BGR
Others: reserved
Odd line of serial panel data out sequence
000: RGB
001: RBG
010: GRB
011: GBR
100: BRG
101: BGR
Others: reserved
Must Set to 0x05 for AM320240N1
Register
Address
(Hex)
0x12
Default
(Hex)
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
00
Hsync_stH_Byte[3:0]
For TFT output timing adjust:
Description Hsync start position H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x13
00
Hsync_stL_Byte[7:0]
For TFT output timing adjust:
Description Hsync start position L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x14
00
Hsync_pwH_Byte[3:0]
For TFT output timing adjust:
Description Hsync pulse width H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x15
10
Hsync_pwL_Byte[7:0]
For TFT output timing adjust:
Description Hsync pulse width L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x16
00
Hact_stH_Byte[3:0]
Date : 2009/12/10
AMPIRE CO., LTD.
25
For TFT output timing adjust:
Description DE pulse start position H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x17
38
Hact_stL_Byte[7:0]
For TFT output timing adjust:
Description DE pulse start position L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x18
01
Hact_pwH_Byte[3:0]
For TFT output timing adjust:
Description DE pulse width H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x19
40
Hact_pwL_Byte[7:0]
For TFT output timing adjust:
Description DE pulse width L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Address
(Hex)
0x1A
Default
(Hex)
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
01
HtotalH_Byte[3:0]
For TFT output timing adjust:
Description Hsync total clocks H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x1B
B8
HtotalL_Byte[7:0]
For TFT output timing adjust:
Description Hsync total clocks H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x1C
00
Vsync_stH_Byte[3:0]
For TFT output timing adjust:
Description Vsync start position H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Date : 2009/12/10
AMPIRE CO., LTD.
26
Register
Address
(Hex)
0x1D
Default
(Hex)
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
00
Vsync_stL_Byte[7:0]
For TFT output timing adjust:
Description Vsync start position L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x1E
00
Vsync_pwH_Byte[3:0]
For TFT output timing adjust:
Description Vsync pulse width H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x1F
08
Vsync_pwL_Byte[7:0]
For TFT output timing adjust:
Description Vsync pulse width L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x20
00
Vact_stH_Byte[3:0]
For TFT output timing adjust:
Description Vertical DE pulse start position H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x21
12
Vact_stL_Byte[7:0]
For TFT output timing adjust:
Description Vertical DE pulse start position L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x22
00
Vact_pwH_Byte[3:0]
For TFT output timing adjust:
Description Vertical Active width H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x23
F0
Vact_pwL_Byte[7:0]
For TFT output timing adjust:
Description Vertical Active width H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Date : 2009/12/10
AMPIRE CO., LTD.
27
Register
Address
(Hex)
0x24
Default
(Hex)
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
01
VtotalH_Byte[3:0]
For TFT output timing adjust:
Description Vertical total width H-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
(Hex)
(Hex)
0x25
09
VtotalL_Byte[7:0]
For TFT output timing adjust:
Description Vertical total width L-Byte
The default setting is suitable for AM320240N1. Don’t need to modify it.
Register
Address
(Hex)
Default
(Hex)
26
00
DB7 DB6 DB5 DB4
X
X
X
X
DB3
X
DB2 DB1
DB0
[17:16] bits of
memory read start
address
Description Memory read start address
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
[15:8] bits of memory write start address
27
00
Description Memory read start address
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
[7:0] bits of memory write start address
28
00
Description Memory read start address
Register
Address
(Hex)
29
Default
(Hex)
DB7 DB6 DB5 DB4
DB3
Remark
DB2 DB1
DB0
Remark
Remark
Remark
[7:1] Reversed
00
[0] Load output timing related setting (H sync., V sync. and DE) to take
Description
effect
Register
Address
(Hex)
0x2A
Default
(Hex)
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
00
X
TestPatternRout[6:0]
When " REG[0x10]_out_test[6]" : Self test =1 ;
Description
The Rout data equal to TestPatternRout[6:0]
Date : 2009/12/10
AMPIRE CO., LTD.
28
Register
Address
(Hex)
0x2B
Default
(Hex)
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Remark
00
X
TestPatternGout[6:0]
When " REG[0x10]_out_test[6]" : Self test =1 ;
Description
The Gout data equal to TestPatternGout[6:0]
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
0x2C
00
X
TestPatternBout[6:0]
When " REG[0x10]_out_test[6]" : Self test =1 ;
Description
The Bout data equal to TestPatternBout[6:0]
Remark
If you set the " REG[0x10]_out_test[6]" : Self test =1 , the TFT controller will skip the
connect of the display RAM. The Output port will send the REG[2A] ,REG[2B],REG[2C]
data.
Register
Address
(Hex)
Default
DB7 DB6 DB5 DB4 DB3
(Hex)
DB2
DB1 DB0 Remark
Rising/falling
_rotate
edge[2]
[1:0]
[3] Output pin X_DCON level control ; TFT Power ON/OFF control
0: TFT POWER circuit OFF
1: TFT POWER circuit ON
Rising/falling edge[2] :
0: The RGB out put data are on the Rising edge of the DCLK.
Description 1: The RGB out put data are on the Falling edge of the DCLK.
_rotate [1:0]:
00 : rotate 0 degree
01 : rotate90 degree
10 : rotate 270 degree
11 : rotate 180 degree
0x2D
00
Register
Address
(Hex)
Default
(Hex)
30
00
X
X
X
X
DB7 DB6 DB5 DB4
X
X
X
X
[3]
DB3
DB2 DB1 DB0
X
_H byte
H-Offset[3:0]
Remark
Description Set the Horizontal offset
Date : 2009/12/10
AMPIRE CO., LTD.
29
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
31
00
_L byte H-Offset[7:0]
Description Set the Horizontal offset
Register
Address
(Hex)
Default
(Hex)
32
00
DB7 DB6 DB5 DB4
X
X
X
X
DB3
DB2 DB1 DB0
X
_H byte
V-Offset[3:0]
Description Set the Vertical offset
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
33
00
_L byte V-Offset[7:0]
Description Set the Vertical offset
Register
Address
(Hex)
34
Default
(Hex)
DB7 DB6 DB5 DB4
DB3
DB2 DB1 DB0
36
Remark
Remark
Remark
_H byte
H-def[3:0]
[3:0] MSB of image horizontal physical resolution in memory
00
[7:4] Reserved
Description
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
35
40
_L byte H-def[7:0]
Description [7:0] LSB of image horizontal physical resolution in memory
Register
Address
(Hex)
Remark
Default
(Hex)
DB7 DB6 DB5 DB4
DB3
DB2 DB1 DB0
Remark
Remark
_H byte
V-def[3:0]
[3:0] MSB of image vertical physical resolution in memory
01
[7:4] Reserved
Description
Register
Default
Address
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(Hex)
(Hex)
37
E0
_L byte V-def[7:0]
Description [7:0] LSB of image vertical physical resolution in memory
Remark
The total RAM size is 640x240x18bit. The user can arrange the Horizontal ram size by
REG[34],REG[35] and the Vertical ram size by REG[36],REG[37].
EX: 320x480x18bit REG[34]=0x01 , REG[35]=0x40 , REG[36]=0x01 , REG[37]=0xE0
EX: 640x240x18bit. REG[34]=0x02 , REG[35]=0x80 , REG[36]=0x00 , REG[37]=0xF0
Date : 2009/12/10
AMPIRE CO., LTD.
30
DISPLAYED COLOR AND INPUT DATA
Color &
Gray
Scale
Black
Red(0)
Green(0)
DATA SIGNAL
R5
0
1
0
R4
0
1
0
Date : 2009/12/10
R3
0
1
0
R2
0
1
0
R1
0
1
0
R0
0
1
0
G5
0
0
1
G4
0
0
1
G3
0
0
1
G2
0
0
1
G1
0
0
1
AMPIRE CO., LTD.
G0
0
0
1
B5
0
0
0
B4
0
0
0
B3
0
0
0
B2
0
0
0
B1
0
0
0
31
B0
0
0
0
10 QUALITY AND RELIABILITY
10.1 TEST CONDITIONS
Tests should be conducted under the following conditions :
Ambient temperature : 25 ± 5°C
Humidity
: 60 ± 25% RH.
10.2 SAMPLING PLAN
Sampling method shall be in accordance with MIL-STD-105E , level II, normal
single sampling plan .
10.3 ACCEPTABLE QUALITY LEVEL
A major defect is defined as one that could cause failure to or materially
reduce the usability of the unit for its intended purpose. A minor defect is one that does
not materially reduce the usability of the unit for its intended purpose or is an
infringement from established standards and has no significant bearing on its effective
use or operation.
10.4 APPEARANCE
An appearance test should be conducted by human sight at approximately 30
cm distance from the LCD module under flourescent light. The inspection area of LCD
panel shall be within the range of following limits.
Date : 2009/12/10
AMPIRE CO., LTD.
32
10.5 INSPECTION QUALITY CRITERIA
No.
Item
1
Non display
2
Irregular
operation
Class Accept
of
able
Defect level
Criterion for defects
No non display is allowed
Major
0.4
No irregular operation is allowed
Major
0.4
3
Short
No short are allowed
Major
0.4
4
Open
Any segments or common patterns that don’t activate
are rejectable.
Major
0.4
Minor
1.5
Minor
1.5
Major
0.4
Minor
1.5
Minor
1.5
5
Black/White
spot (I)
Size D (mm)
D < 0.1
0.1 < D < 0.15
0.15 < D
Acceptable number
Ignore
2
※1
0
※1: The distance of two defects must be more than 20mm.
6
Dot Defect
7
Back Light
8
Display pattern
Bright dot
1
Dark dot
N≦3
Total dot defect
N≦4
(Bright dot + Dark dot)
Minimum distance between
0.1＜D≦0.3mm,N≦2
dark dot and dark dot
1. No Lighting is rejectable
2. Flickering and abnormal lighting are rejectable
Unit:mm
A+B
≤ 0.30 0 < C
2
D+E
F+G
≤ 0.25
≤ 0.25
2
2
Note: 1. Acceptable up to 3 damages
2. NG if there’re to two or more pinholes per dot
Blemish &
Foreign matters
9
Size:
A+ B
D=
2
Size D (mm)
D < 0.15
0.15 < D < 0.20
0.20 < D < 0.30
0.30 < D
Date : 2009/12/10
Acceptable number
Ignore
3
2
0
AMPIRE CO., LTD.
33
Scratch on
Polarizer
10
Width (mm)
W<0.03
Length (mm)
L < 2.0
Acceptable number
2
Minor
1.5
Minor
1.5
12 LCD panel
Stains that cannot be removed even when wiped lightly
Minor
with a soft cloth or similar cleaning too are rejectable.
1.5
13
Rust which is visible in the bezel is rejectable.
Minor
1.5
Evident crevices which is visible are rejectable.
Minor
1.5
Note: The distance of two defects must be more than 20mm.
Bubble in
11 polarizer
Stains on
surface
Rust in Bezel
Defect of
land surface
14 contact (poor
soldering)
Parts
15 mounting
Parts
16 alignment
Conductive
foreign matter
17 (Solder ball,
Solder chips)
Faulty PCB
18 correction
Zone A Active area : No bubble are allowed.
Zone B Viewing area: < 0.05mm2, N< 1
Major
Major
Major
1. LSI, IC lead width is more than 50% beyond pad Minor
1. Failure to mount parts
2. Parts not in the specifications are mounted
3. Polarity, for example, is reversed
outline.
2. Chip component is off center and more than 50% of
the leads is off the pad outline.
1. 0.45<φ
,N≧1
2. 0.30<φ<0.45 ,N≧1
φ:Average diameter of solder ball (unit: mm)
3. 0.50<L
,N≧1
L: Average length of solder chip (unit: mm)
1. Due to PCB copper foil pattern burnout, the pattern is
connected, using a jumper wire for repair; 2 or more
places are corrected per PCB.
2. Short circuited part is cut, and no resist coating has
been performed.
Date : 2009/12/10
AMPIRE CO., LTD.
0.4
1.5
Minor
Major
Minor
0.4
1.5
Minor
1.5
Minor
1.5
Minor
34
11 RELIABILITY TEST CONDITIONS
ITEM
HIGH TEMPERATURE
OPERATION
HIGH TEMPERATURE AND
HIGH HUMIDITY OPERATION
CONDITIONS
70℃ , 240Hrs
60℃ , 90%RH , 240Hrs
HIGH TEMPERATURE
STORAGE
80℃ , 240Hrs
LOW TEMPERATURE
OPERATION
-20℃ , 240Hrs
LOW TEMPERATURE
STORAGE
-30℃ , 240Hrs
THERMAL SHOCK
Date : 2009/12/10
NOTE
-30℃(1Hr) ~80℃(1Hr)
AMPIRE CO., LTD.
200Cycle
35
12 USE PRECAUTIONS
12.1 Handling precautions
1) The polarizing plate may break easily so be careful when handling it. Do not touch,
press or rub it with a hard-material tool like tweezers.
2) Do not touch the polarizing plate surface with bare hands so as not to make it dirty. If
the surface or other related part of the polarizing plate is dirty, soak a soft cotton cloth
or chamois leather in benzine and wipe off with it. Do not use chemical liquids such
as acetone, toluene and isopropyl alcohol. Failure to do so may bring chemical
reaction phenomena and deteriorations.
3) Remove any spit or water immediately. If it is left for hours, the suffered part may
deform or decolorize.
4) If the LCD element breaks and any LC stuff leaks, do not suck or lick it. Also if LC
stuff is stuck on your skin or clothing, wash thoroughly with soap and water
immediately.
12.2 Installing precautions
1) The PCB has many ICs that may be damaged easily by static electricity. To prevent
breaking by static electricity from the human body and clothing, earth the human
body properly using the high resistance and discharge static electricity during the
operation. In this case, however, the resistance value should be approx. 1MΩ and the
resistance should be placed near the human body rather than the ground surface.
When the indoor space is dry, static electricity may occur easily so be careful. We
recommend the indoor space should be kept with humidity of 60% or more. When a
soldering iron or other similar tool is used for assembly, be sure to earth it.
2) When installing the module and ICs, do not bend or twist them. Failure to do so may
crack LC element and cause circuit failure.
3) To protect LC element, especially polarizing plate, use a transparent protective plate
(e.g., acrylic plate, glass etc) for the product case.
4) Do not use an adhesive like a both-side adhesive tape to make LCD surface
(polarizing plate) and product case stick together. Failure to do so may cause the
polarizing plate to peel off.
12.3 Storage precautions
1) Avoid a high temperature and humidity area. Keep the temperature between 0°C and
35°C and also the humidity under 60%.
2) Choose the dark spaces where the product is not exposed to direct sunlight or
fluorescent light.
3) Store the products as they are put in the boxes provided from us or in the same
Date : 2009/12/10
AMPIRE CO., LTD.
36
conditions as we recommend.
12.4 Operating precautions
1) Do not boost the applied drive voltage abnormally. Failure to do so may break ICs.
When applying power voltage, check the electrical features beforehand and be
careful. Always turn off the power to the LC module controller before removing or
inserting the LC module input connector. If the input connector is removed or inserted
while the power is turned on, the LC module internal circuit may break.
2) The display response may be late if the operating temperature is under the normal
standard, and the display may be out of order if it is above the normal standard. But
this is not a failure; this will be restored if it is within the normal standard.
3) The LCD contrast varies depending on the visual angle, ambient temperature, power
voltage etc. Obtain the optimum contrast by adjusting the LC dive voltage.
4) When carrying out the test, do not take the module out of the low-temperature space
suddenly. Failure to do so will cause the module condensing, leading to malfunctions.
5) Make certain that each signal noise level is within the standard (L level: 0.2Vdd or
less and H level: 0.8Vdd or more) even if the module has functioned properly. If it is
beyond the standard, the module may often malfunction. In addition, always connect
the module when making noise level measurements.
6) The CMOS ICs are incorporated in the module and the pull-up and pull-down function
is not adopted for the input so avoid putting the input signal open while the power is
ON.
7) The characteristic of the semiconductor element changes when it is exposed to light
emissions, therefore ICs on the LCD may malfunction if they receive light emissions.
To prevent these malfunctions, design and assemble ICs so that they are shielded
from light emissions.
8) Crosstalk occurs because of characteristics of the LCD. In general, crosstalk occurs
when the regularized display is maintained. Also, crosstalk is affected by the LC drive
voltage. Design the contents of the display, considering crosstalk.
12.5 Other
1) Do not disassemble or take the LC module into pieces. The LC modules once
disassembled or taken into pieces are not the guarantee articles.
2) The residual image may exist if the same display pattern is shown for hours. This
residual image, however, disappears when another display pattern is shown or the
drive is interrupted and left for a while. But this is not a problem on reliability.
Date : 2009/12/10
AMPIRE CO., LTD.
37
3) AMIPRE will provide one year warrantee for all products and three months warrantee
for all repairing products.
13 OUTLINE DIMENSION
Date : 2009/12/10
AMPIRE CO., LTD.
38