CEC8218

CEC8218
Dual N-Channel Enhancement Mode Field Effect Transistor
FEATURES
D
20V, 7A, RDS(ON) = 20mΩ @VGS = 4.5V.
D
RDS(ON) = 28mΩ @VGS = 2.5V.
Super High dense cell design for extremely low RDS(ON).
G1
*1K
*1K
G2
High power and current handing capability.
Lead free product is acquired.
S1
*Typical value by design
S2
D D D D
5
6
8
7
Bottom View
DFN3*3
ABSOLUTE MAXIMUM RATINGS
4
3
2
1
G2 S2 G1 S1
TA = 25 C unless otherwise noted
Symbol
Limit
Drain-Source Voltage
VDS
20
Units
V
Gate-Source Voltage
VGS
±12
V
ID
7
A
IDM
28
A
PD
1.5
W
TJ,Tstg
-55 to 150
C
Symbol
Limit
Units
RθJA
83
C/W
Parameter
Drain Current-Continuous
Drain Current-Pulsed
a
Maximum Power Dissipation
Operating and Store Temperature Range
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Ambient b
Rev 2. 2015.Jan
http://www.cetsemi.com
Details are subject to change without notice .
1
CEC8218
Electrical Characteristics
Parameter
TA = 25 C unless otherwise noted
Symbol
Test Condition
Min
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = 250µA
20
Zero Gate Voltage Drain Current
IDSS
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
Typ
Max
Units
VDS = 20V, VGS = 0V
1
µA
IGSSF
VGS = 12V, VDS = 0V
10
µA
IGSSR
VGS = -12V, VDS = 0V
-10
µA
Off Characteristics
V
On Characteristics c
Gate Threshold Voltage
VGS(th)
Static Drain-Source
RDS(on)
On-Resistance
VGS = VDS, ID = 250µA
1.2
V
VGS = 4.5V, ID = 5A
0.5
16
20
mΩ
VGS = 2.5V, ID = 4A
21
28
mΩ
VDS = 10V, ID = 5A
17
Dynamic Characteristics d
Forward Transconductance
gFS
S
Switching Characteristics d
Turn-On Delay Time
td(on)
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
VDD = 10V, ID = 1A,
VGS = 4.5V, RGEN = 6Ω
0.34
0.68
µs
0.86
1.72
µs
3.60
7.5
µs
Turn-Off Fall Time
tf
2
4
µs
Total Gate Charge
Qg
4.2
5.6
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS = 10V, ID = 5A,
VGS = 4.5V
1.2
nC
2.5
nC
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current b
IS
Drain-Source Diode Forward Voltage
VSD
c
VGS = 0V, IS = 1.5A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
2
6.5
A
1.2
V
CEC8218
25
15
ID, Drain Current (A)
15
10
VGS=2.0V
5
2.2
1.9
0
1
2
3
3
TJ=125 C
0.0
-55 C
1
2
3
4
5
VGS, Gate-to-Source Voltage (V)
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
1.3
1.0
0.7
1.2
6
VDS, Drain-to-Source Voltage (V)
1.6
1.3
9
0
ID=5A
VGS=4.5V
0.4
-100
12
4
IS, Source-drain current (A)
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)
25 C
20
0
VTH, Normalized
Gate-Source Threshold Voltage
VGS=2.5V
-50
0
50
100
150
200
VGS=0V
10
1
10
0
10
-1
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 3. On-Resistance Variation
with Temperature
Figure 4. Body Diode Forward Voltage
Variation with Source Current
VDS=VGS
10
2
10
1
10
0
10
-1
10
-2
ID=250µA
ID, Drain Current (A)
ID, Drain Current (A)
VGS=4.5,4,3V
1.1
1.0
0.9
0.8
0.7
0.6
-50
-25
0
25
50
75
100
125
150
RDS(ON)Limit
1ms
10ms
100ms
1s
DC
TA=25 C
TJ=150 C
Single Pulse
10
-2
10
-1
10
0
10
1
TJ, Junction Temperature( C)
VDS, Drain-Source Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Maximum Safe
Operating Area
3
10
2
VGS, Gate to Source Voltage (V)
CEC8218
5 V =10V
DS
ID=5A
t on
toff
tr
td(on)
4
td(off)
tf
90%
90%
VOUT
3
10%
INVERTED
10%
2
90%
VIN
1
50%
50%
10%
PULSE WIDTH
0
0
1
2
3
4
5
6
Qg, Total Gate Charge (nC)
Figure 7. Gate Charge
Figure 8. Switching Waveforms
VDD
V IN
RL
D
VGS
RGEN
VOUT
G
S
Figure 9. Switching Test Circuit
r(t),Normalized Effective
Transient Thermal Impedance
10
0
D=0.5
10
0.2
-1
0.1
0.05
10
PDM
0.02
0.01
-2
t1
1. RθJA (t)=r (t) * RθJA
2. RθJA=See Datasheet
3. TJM-TA = P* RθJA (t)
4. Duty Cycle, D=t1/t2
Single Pulse
10
-3
10
-4
t2
10
-3
10
-2
10
-1
10
0
Square Wave Pulse Duration (sec)
Figure 10. Normalized Thermal Transient Impedance Curve
4
10
1
10
2