TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die Introduction Technical Note SDRAM I/O Characteristics Comparison of 54nm to 130nm Die Introduction This technical note compares the I/O characteristics of the 54nm to the 130nm single data rate (SDR) synchronous dynamic random access memory (SDRAM) die. It includes the following graphical representations: pull-up and pull-down I/V curves and transient analysis simulations representing the 130nm SDRAM product and comparing this data to the more recently released 54nm product. Note: The graphs and diagrams in this technical note are for general reference only. We suggest that customers use simulations to ensure that their systems are not adversely affected by the differences in I/O characteristics between 54nm and 130nm devices. The models referenced in this technical note are available at: www.micron.com. SDRAM Process Shrink Micron SDR SDRAM devices built with the 130nm process have been available and in use for many years. However, it has become necessary to migrate these devices to a smaller 54nm process to take advantage of the latest manufacturing processes and technology. The SDRAM devices built with the 54nm process are fully compatible with those built with the 130nm process. However, there are differences in the I/O (driver and receiver) characteristics between the 54nm and 130nm devices. Pull-Up/Pull-Down I-V Curves The graphs for pull-up/pull-down characteristics are derived from the specific IBIS models for each SDRAM device. The red curves represent the fast, typical, and slow corners for the 130nm devices; the blue curves represent 54nm devices. Simulations The 130nm and 54nm SDRAM models were optimized to work with an industry-standard controller model. Transient analysis simulations were performed using IBIS models in two industry-standard simulators using a pulse stimulus. A PRBS pattern was used as a stimulus in the second simulator to generate eye diagrams. Technology Comparisons by Density The following sections compare the 54nm technology to the 130nm technology by density: • I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/Y16Y) • I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/Y15W) • I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/Y14W) PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/ Y16Y) I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/Y16Y) Pull-Up/Pull-Down I-V Curves – 256Mb 54nm/130nm (Y66A/Y16Y) Figure 1: Pull-Up I-V Curves – 256Mb 54nm/130nm (Y66A/Y16Y) 0.00 –0.05 –0.10 Current (Amps) –0.15 –0.20 –0.25 –0.30 –0.35 Y66A (MAX) Y66A (TYP) Y66A (MIN) Y16Y (MAX) Y16Y (TYP) Y16Y (MIN) –0.40 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 Voltage (Volts) Notes: 1. Blue curves represent fast, typical, and slow corners for the 54nm pull-up I-V curves. 2. Red curves represent fast, typical, and slow corners for the 130nm pull-up I-V curves. PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 2 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/ Y16Y) Figure 2: Pull-Down I-V Curves – 256Mb 54nm/130nm (Y66A/Y16Y) 0.18 0.16 0.14 Curr ent (Amps) 0.12 0.10 0.08 0.06 0.04 0.02 0.00 0.00 0.50 Notes: 1.00 Y66A (MAX) Y66A (TYP) Y66A (MIN) Y16Y (MAX) Y16Y (TYP) Y16Y (MIN) 1.50 2.00 2.50 Voltage (Volts) 3.00 3.50 4.00 4.50 1. Blue curves represent fast, typical, and slow corners for the 54nm pull-down I-V curves. 2. Red curves represent fast, typical, and slow corners for the 130nm pull-down I-V curves. PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/ Y16Y) Test Procedure – 256Mb 54nm/130nm (Y66A/Y16Y) The following setup and test procedures were used to perform transient and eye diagram simulations: 1. The Y16Y device was optimized to work in a test setup with a customer controller. 2. Transient and eye diagram simulations were performed using the Y16Y device in the system. 3. The Y16Y device was replaced with the Y66A device while the rest of the system remained unchanged. 4. Transient and eye diagram simulations were performed using the Y66A device in the system. 5. Test results for the Y66A and Y16Y devices were compared. Figure 3: Test Setup – 256Mb 54nm/130nm (Y66A/Y16Y) Y16Y.1 R1 39.8Ω MT48LC16M16A2FG DQ0 Y66A.1 R2 39.8Ω MT48LC16M16A2BG DQ0 PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN Controller.1 TL1 60Ω 447.547ps Simple Controller.2 TL2 60Ω 447.547ps Simple 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/ Y16Y) Figure 4: Transient Analysis 1 – 256Mb 54nm/130nm (Y66A/Y16Y) 4000.0 3500.0 3000.0 Voltage (mV) 2500.0 2000.0 1500.0 1000.0 500.0 0.00 –500.0 0.00 2.00 4.00 6.00 8.00 10.00 Time (ns) Pulse with 50% duty cycle Frequency = 83.35 MHz IC modeling is typical PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 5 12.00 14.00 16.00 18.00 V [Y16Y.1 (at pin)] V [Y66A.1 (at pin)] V [Ctrl_100S.1 (at die)] V [Ctrl_60S.1 (at die)] Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/ Y16Y) Figure 5: Transient Analysis 2 – 256Mb 54nm/130nm (Y66A/Y16Y) 4.0 3.5 3.0 2.5 Volts 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 335 340 345 350 355 360 365 t (ns) v(ibis_out_pin)_DRAM_60S v(ibis_rcvr_pad)_ctrl_60S v(ibis_out_pin)_DRAM_100S v(ibis_rcvr_pad)_ctrl_100S PRBS pattern was used as a stimulus PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 256Mb 54nm/130nm (Y66A/ Y16Y) Figure 6: Eye Diagram – 256Mb 54nm/130nm (Y66A/Y16Y) 4.0 3.5 3.0 2.5 (V) 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 0.0 2 4 8 6 10 12 14 t (ns) eye(v(ibis_rcvr_pad))_ctrl_100S eye(v(ibis_rcvr_pad))_ctrl_60S PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 7 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/ Y15W) I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/Y15W) Pull-Up/Pull-Down I-V Curves – 128Mb 54nm/130nm (Y65A/Y15W) The two figures below show pull-up and pull-down current-versus-voltage curves for the Y65A and Y15W devices. Figure 7: Pull-Up I-V Curves – 128Mb 54nm/130nm (Y65A/Y15W) 0.00 –0.05 Curr ent (Amps) –0.10 –0.15 –0.20 –0.25 –0.30 –0.35 0.00 0.50 Notes: 1.00 Y65A (MAX) Y65A (TYP) Y65A (MIN) Y15W (MAX) Y15W (TYP) Y15W (MIN) 1.50 2.00 2.50 Voltage (Volts) 3.00 3.50 4.00 4.50 1. Blue curves represent fast, typical, and slow corners for the 54nm pull-up I-V curves. 2. Red curves represent fast, typical, and slow corners for the 130nm pull-up I-V curves. PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 8 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/ Y15W) Figure 8: Pull-Down I-V Curves – 128Mb 54nm/130nm (Y65A/Y15W) 0.16 0.14 0.12 Curr ent (Amps) 0.10 0.08 0.06 0.04 0.02 0.00 0.00 0.50 Notes: 1.00 Y65A (MAX) Y65A (TYP) Y65A (MIN) Y15W (MAX) Y15W (TYP) Y15W (MIN) 1.50 2.00 2.50 Voltage (Volts) 3.00 3.50 4.00 4.50 1. Blue curves represent fast, typical, and slow corners for the 54nm pull-down I-V curves. 2. Red curves represent fast, typical, and slow corners for the 130nm pull-down I-V curves. PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 9 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/ Y15W) Test Procedure – 128Mb 54nm/130nm (Y65A/Y15W) The following setup and test procedures were used to perform transient and eye diagram simulations: 1. The Y15W device was optimized to work in a test setup with a customer controller. 2. Transient and eye diagram simulations were performed using the Y15W device in the system. 3. The Y15W device was replaced with the Y65A device while the rest of the system remained unchanged. 4. Transient and eye diagram simulations were performed using the Y65A device in the system. 5. Test results for the Y65A and Y15W devices were compared. Figure 9: Test Setup – 128Mb 54nm/130nm (Y65A/Y15W) Y15W.1 R1 38.8Ω MT48LC16M8A2FB DQ0 Y65A.1 R2 38.8Ω MT48LC16M8A2BB DQ0 PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN TL1 Ctrl_100S.1 60Ω 447.547ps Simple TL2 Ctrl_60S.1 60Ω 447.547ps Simple 10 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/ Y15W) Figure 10: Transient Analysis 1 – 128Mb 54nm/130nm (Y65A/Y15W) 4000.0 3500.0 3000.0 Voltage (mV) 2500.0 2000.0 1500.0 1000.0 500.0 0.00 –500.0 0.00 2.00 4.00 Pulse with 50% duty cycle Frequency = 83.35 MHz IC modeling is typical PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 6.00 8.00 10.00 Time (ns) 11 12.00 14.00 16.00 18.00 V [Y16Y.1 (at pin)] V [Y66A.1 (at pin)] V [Ctrl_100S.1 (at die)] V [Ctrl_60S.1 (at die)] Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/ Y15W) Figure 11: Transient Analysis 2 – 128Mb 54nm/130nm (Y65A/Y15W) 4.0 3.5 3.0 2.5 Volts 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 240 250 260 270 280 t (ns) v(ibis_out_pin)_DRAM_60S v(ibis_rcvr_pad)_ctrl_60S v(ibis_out_pin)_DRAM_100S v(ibis_rcvr_pad)_ctrl_100S PRBS pattern was used as a stimulus PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 12 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 128Mb 54nm/130nm (Y65A/ Y15W) Figure 12: Eye Diagram – 128Mb 54nm/130nm (Y65A/Y15W) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 0.0 2 4 8 6 10 12 14 t (ns) eye(v(ibis_rcvr_pad))_ctrl_100S eye(v(ibis_rcvr_pad))_ctrl_60S PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 13 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/ Y14W) I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/Y14W) Pull-Up/Pull-Down I-V Curves – 64Mb 54nm/130nm (Y64A/Y14W) The two figures below show pull-up and pull-down current-versus-voltage curves for the Y64A and Y14W devices. Figure 13: Pull-Up I-V Curves – 64Mb 54nm/130nm (Y64A/Y14W) 0.00 –0.05 –0.10 Curr ent (Amps) –0.15 –0.20 –0.25 –0.30 –0.35 –0.40 0.00 0.50 Notes: 1.00 Y64A (MAX) Y64A (TYP) Y64A (MIN) Y14A (MAX) Y14A (TYP) Y14A (MIN) 1.50 2.00 2.50 Voltage (Volts) 3.00 3.50 4.00 4.50 1. Blue curves represent fast, typical, and slow corners for the 54nm pull-up I-V curves. 2. Red curves represent fast, typical, and slow corners for the 130nm pull-up I-V curves. PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 14 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/ Y14W) Figure 14: Pull-Down I-V Curves – 64Mb 54nm/130nm (Y64A/Y14W) 0.18 0.16 0.14 Curr ent (Amps) 0.12 0.10 0.08 0.06 0.04 0.02 0.00 0.00 0.50 Notes: 1.00 Y64A (MAX) Y64A (TYP) Y64A (MIN) Y14W (MAX) Y14W (TYP) Y14W (MIN) 1.50 2.00 2.50 Voltage (Volts) 3.00 3.50 4.00 4.50 1. Blue curves represent fast, typical, and slow corners for the 54nm pull-down I-V curves. 2. Red curves represent fast, typical, and slow corners for the 130nm pull-down I-V curves. PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 15 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/ Y14W) Test Procedure – 64Mb 54nm/130nm (Y64A/Y14W) The following setup and test procedures were used to perform transient and eye diagram simulations: 1. The Y14W device was optimized to work in a test setup with a customer controller. 2. Transient and eye diagram simulations were performed using the Y14W device in the system. 3. The Y14W device was replaced with the Y64A device while the rest of the system remained unchanged. 4. Transient and eye diagram simulations were performed using the Y64A device in the system. 5. Test results for the Y64A and Y14W devices were compared. Figure 15: Test Setup – 64Mb 54nm/130nm (Y64A/Y14W) Y14Y.1 R1 40.1Ω MT48LC2M32B2B5 DQ0 Y64A.1 R2 40.1Ω MT48LC2M32B2B5 DQ0 PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN TL1 Ctrl_100S.1 60Ω 447.547ps Simple TL2 Ctrl_60S.1 60Ω 447.547ps Simple 16 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/ Y14W) Figure 16: Transient Analysis 1 – 64Mb 54nm/130nm (Y64A/Y14W) 4000.0 3500.0 3000.0 Voltage (mV) 2500.0 2000.0 1500.0 1000.0 500.0 0.00 –500.0 0.00 2.00 4.00 Pulse with 50% duty cycle Frequency = 83.35 MHz IC modeling is typical PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 6.00 8.00 10.00 Time (ns) 17 12.00 14.00 16.00 18.00 V [Y16Y.1 (at pin)] V [Y66A.1 (at pin)] V [Ctrl_100S.1 (at die)] V [Ctrl_60S.1 (at die)] Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/ Y14W) Figure 17: Transient Analysis 2 – 64Mb 54nm/130nm (Y64A/Y14W) 4.0 3.5 3.0 2.5 Volts 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 50 60 70 80 90 100 t (ns) v(ibis_out_pin)_DRAM_60S v(ibis_rcvr_pad)_ctrl_60S v(ibis_out_pin)_DRAM_100S v(ibis_rcvr_pad)_ctrl_100S PRBS pattern was used as a stimulus PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 18 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die I/O Characteristics Comparison – 64Mb 54nm/130nm (Y64A/ Y14W) Figure 18: Eye Diagram – 64Mb 54nm/130nm (Y64A/Y14W) 4.0 3.5 3.0 2.5 (V) 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 0.0 2 4 8 6 10 12 14 t (ns) eye(v(ibis_rcvr_pad))_ctrl_100S eye(v(ibis_rcvr_pad))_ctrl_60S PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 19 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-00-24: SDRAM I/O Characteristics of 54nm/130nm Die Conclusion Conclusion It is important for system designers to understand the difference in I/O characteristics between 130nm and 54nm die. Micron strongly recommends that customers simulate the memory interface of their system in order to ensure that signal integrity will be maintained as 54nm SDRAM are introduced into their systems. 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 09005aef84632e08 tn0024_sdram_io_char_54_130nm_die.pdf - Rev. A 05/11 EN 20 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved.