Power Management Switch ICs for PCs and Digital Consumer Products Load Switch IC for Portable Equipment BD6524HFV No.11029ECT13 ●Description Power switch for memory card Slot (BD6524HFV) is a high side switch IC having one circuit of N-channel Power MOS FET. The switch realizes 200mΩ (Typ.) ON resistance. Operations from low input voltage (VIN ≥ 3.0V) can be made for use for various switch applications. The switch turns on slowly by the built-in charge pump, therefore, it is possible to reduce inrush current at switch on. There is no parasitic diode between the drain and the source, reverse current flow at switch off is prevented. Further, it has a discharge circuit that discharges electric charge from capacitive load at switch off. The BD6524HFV is available in a space-saving HVSOF6 package. ●Features 1) Low on resistance (200mΩ, Typ.) N-MOS switch built in 2) Maximum output current : 500mA 3) Soft start circuit 4) Under voltage lockout (UVLO) circuit 5) Discharge circuit built in : operations at switch off, UVLO 6) Reverse current flow blocking at switch off ●Applications Memory card slots of notebook PC, digital still camera, portable music player, compact portable devices such as PDA and so forth ●Absolute Maximum Ratings Parameter Symbol Ratings Unit VIN -0.3 to 6.0 V Control input voltage VEN -0.3 to VIN + 0.3 V Switch output voltage VOUT -0.3 to 6.0 V Storage temperature TSTG -55 to 150 ℃ Pd 510 *1 mW Supply Voltage Power dissipation *1 * * Derating : 4.08mW/℃ for operation above Ta = 25℃. This product is not designed for protection against radioactive rays. Operation is not guaranteed. ●Operation conditions Parameter Symbol Ratings Unit VIN 3.0 to 5.5 V Operating Temperature TOPR -25 to 75 ℃ Switch current IOUT 500 mA Supply voltage www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/9 2011.06 - Rev.C Technical Note BD6524HFV ●Electrical characteristics Unless otherwise specified, Ta = 25℃, VIN = 5V, IDD ISTB Min. - Limits Typ. 50 0.1 Max. 75 1 EN input leak current VENH VENL IEN 0.7 -1 0.01 Switch on resistance RON Switch leak current ILEAK - Switch rise time Switch rise delay time Switch fall time Switch fall delay time TON1 TON2 TOFF1 TOFF2 UVLO threshold voltage Discharge resistance Discharge current Parameter Operating current Standby current EN input voltage Symbol Unit Condition µA µA VEN = 5V, VOUT = Open VEN = 0V, VOUT = Open 2.5 1 V V µA High level input voltage Low level input voltage 200 250 - 255 335 10 mΩ mΩ µA VIN = 5V VIN = 3.3V At switch OFF - 0.4 0.5 1 2 0.8 1.0 2 4 ms ms us us RL=10Ω. Refer to the timing diagram in Fig. 2. RL=10Ω. Refer to the timing diagram in Fig. 2. RL=10Ω. Refer to the timing diagram in Fig. 2. RL=10Ω. Refer to the timing diagram in Fig. 2. VUVLO 1.9 1.8 2.2 2.1 2.5 2.4 V V RDISC IDISC 0.8 200 1.8 350 - Ω mA VIN increasing VIN decreasing VEN = 0V, IL = 1mA VEN = 0V,VIN = VOUT = 1.8V ●Measurement circuit VIN VOUT VIN VOUT RL CL GND EN Fig.1 Measurement circuit ●Timing diagram TOFF1 TON1 VOUT 90% 90% 10% 10% TON2 TOFF2 VEN 50% 50% Fig.2 Timing diagram www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/9 2011.06 - Rev.C Technical Note BD6524HFV ●Typical characteristics 0.10 2.5 40 35 30 25 20 15 10 From above :VIN=3.0V,5.0V,5.5V 5 EN INPUT VOLTAGE:VENH[V] 45 STAND-BY CURRENT:ISTB[uA] 0.08 0.06 0.04 0.02 -25 0 25 50 0.5 0 25 50 75 -25 1.5 1.0 From above: VIN=5.5V,5.0V,3.0V 0 25 50 250 200 150 100 From above: VIN=3.0V,5.0V,5.5V 50 TURN OFF TIME1:TOFF1[us] 0.8 0.7 0.6 0.5 0.4 0.3 From above: VIN=3.0V,5.0V,5.5V 0 25 50 0.2 From above: VIN=3.0V,4.0V,5.0V,5.5V -25 25 50 3.5 3.0 3.0 2.5 2.0 From above: VIN=3.0V,4.0V,5.0V,5.5V 1.5 1.0 2.5 2.0 1.5 1.0 0.5 From above: VIN=3.0V,4.0V,5.0V,5.5V 0.0 -25 0 25 50 75 AMBIENT TEMPERATURE:Ta[℃] AMBIENT TEMPERATURE:Ta[℃] Fig.9 Switch rise delay time -25 0 25 50 AMBIENT TEMPERATURE:Ta[℃] Fig.10 Switch fall time Fig.11 Switch fall delay time 250 2.5 DISCHARGE RESI STANCE:RDISC [Ω ] 3.0 VIN increasing VIN decreasing 2.0 1.5 1.0 0.5 200 150 100 50 From above: VIN=3.0V,4.0V,5.0V,5.5V 0 0.0 -25 0 25 50 75 AMBIENT TEMPERATURE:Ta[℃] Fig.12 UVLO threshold voltage www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 75 Fig.8 Switch rise time 3.5 75 0 AMBIENT TEMPERATURE:Ta[℃] 0.0 0.0 50 0.3 75 0.5 0.1 25 0.4 Fig.7 Switch on resistance 0.9 0 0.5 AMBIENT TEMPERATURE:Ta[℃] Fig.6 EN threshold voltage (Low level input voltage) -25 0.6 0 AMBIENT TEMPERATURE:Ta[℃] 0.2 0.7 0.1 -25 75 75 0.8 0 -25 50 0.9 300 0.0 25 Fig.5 EN threshold voltage (High level input voltage) TURN ON TIME1:TON1[ms] ON RESISTANCE:RON [mO] 2.0 0 AMBIENT TEMPETRATURE:Ta[℃] 350 0.5 From above: VIN=5.5V,5.0V,3.0V Fig.4 Standby current 2.5 EN INPUT VOLTAGE:VENL[V] 1.0 AMBIENT TEMPERATURE:Ta[℃] Fig.3 Operating current TURN ON TIME2:TON2[ms] 1.5 0.0 -25 75 AMBIENT TEMPERATURE:Ta[℃] UVLO THRESHOLD:VUVLO[V] 2.0 0.00 0 TURN OFF TIME2:TOFF2[us] OPERATING CURRENT:IDD[uA] 50 -25 0 25 50 75 AMBIENT TEMPERATURE:Ta[℃] Fig.13 Discharge resistance 3/9 2011.06 - Rev.C 75 Technical Note BD6524HFV 50 2.5 350 35 30 25 20 15 10 VENH 1.5 VENL 1.0 0.5 5 0 0.0 3.0 3.5 4.0 4.5 5.0 5.5 3.5 4 4.5 5 3.0 TON2 0.4 TON1 0.2 0.0 2.5 TOFF2 2.0 1.5 1.0 TOFF1 INPUT VOLTAGE:VIN[V] Fig.17 Switch rise time www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4.5 5.0 5.5 200 150 100 50 0 0.0 5.5 4.0 250 0.5 0.1 3.5 Fig.16 Switch on resistance DISCHARGE RESISTANCE:RDISC[Ω] TURN OFF TIME:TOFF[us] 0.6 5 50 INPUT VOLTAGE:VIN[V] 3.0 0.7 4 100 5.5 3.5 0.8 3 150 Fig.15 EN threshold voltage 0.9 0.3 200 INPUT VOLTAGE:VIN[V] Fig.14 Operating current 0.5 250 0 3 INPUT VOLTAGE:VIN[V] TURN ON TIME:TON[ms] 300 2.0 ON RESISTANCE:RON[m Ω] 40 EN INPUT VOLTAGE:VEN[V] OPERATING CURRENT:IDD[uA] 45 3 4 5 INPUT VOLTAGE:VIN[V] Fig.18 Switch fall time 4/9 5.5 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE:VIN[V] Fig.19 Discharge resistance 2011.06 - Rev.C Technical Note BD6524HFV ●Waveform data VIN = 5V VOUT (1V/div) VOUT (1V/div) EN (5V/div) VIN = 5V CL = 10uF EN (5V/div) VOUT (1V/div) VIN = 3V Fig.22 Switch rise time Fig.21 Switch fall time Fig.20 Switch rise time RL=10Ω, CL=10uF Time (200us/div) Time (500us/div) Time (200us/div) VIN = 3V 0.74ms 1.05ms 0.42ms EN (1V/div) RL=10Ω, CL=10uF RL=10Ω, CL=10uF EN (1V/div) VIN = 5V EN (1V/div) EN (1V/div) RL=10Ω, CL=10uF VIN = 3V CL = 4.7uF CL = 10uF Time (500us/div) Time (100us/div) Fig.23 Switch fall time Time (100us/div) Fig.25 Inrush current VIN (1V/div) Fig.24 Inrush current CL = 4.7uF CL = 1uF VOUT (1V/div) VOUT (1V/div) VIN (1V/div) CL = 1uF Irush (50mA/div) VOUT (1V/div) Irush (50mA/div) 1.10ms 50ms Time (20ms/div) Fig.26 UVLO CL = 10uF www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5ms Time (20ms/div) Fig.27 UVLO CL = 1uF 5/9 2011.06 - Rev.C Technical Note BD6524HFV ●Block diagram GND VIN 1 6 VOUT VIN 2 5 VOUT EN 4 GND 3 VIN 1,2 4 charge pump EN control logic 3 Fig.28 Pin configuration ●Pin description Pin No. VOUT 5,6 Fig.29 Block diagram Symbol Pin Function 1 2 VIN Switch input pin. At use, connect each pin outside. 3 EN Switch control input pin (hysteresis input) Switch ON at High. 4 GND Ground 5 6 VOUT Switch output pin At use, connect each pin outside. ●I/O circuit VIN VIN EN VOUT Fig.30 I/O circuit www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/9 2011.06 - Rev.C Technical Note BD6524HFV ●Functional description 1. Input / output VIN pin and VOUT pin are connected to the drain and the source of N-MOS switch respectively. And the VIN pin is used also as power source input to internal control circuit. When EN input is set to High level and the switch is turned on, VIN pin and VOUT pin are connected by a 200mΩ switch. In a normal condition, current flows from VIN to VOUT. If voltage of VOUT is higher than VIN, current flows from VOUT to VIN, since the switch is bidirectional. There is not a parasitic diode between the drain and the source, it is possible to prevent current from flowing reversely from VOUT pin to VIN pin when the switch is disabled. 2. Discharge circuit When the switch between the VIN and the VOUT is OFF, the 200Ω(Typ.) discharge switch between VOUT and GND turns on. By turning on this switch, electric charge at capacitive load is discharged. 3. Under voltage lockout (UVLO) The UVLO circuit monitors the voltage of the VIN pin, when the EN input is active. UVLO circuit prevents the switch from turning on until the VIN exceeds 2.2V(Typ.). If the VIN drops below 2.1V(Typ.) while the switch turns on, then UVLO shuts off the switch. While the switch between the VIN pin and VOUT pin is OFF owing to UVLO operations, the switch of the discharge circuit turns on. However, when the voltage of VIN declines extremely, then the VOUT pin becomes Hi-Z. 2.1V(Typ.) VIN 2.2V(Typ.) VEN VOUT Discharge circuit 放電回路 ON OFF ON OFF ON OFF Fig.31 Operation timing ●Typical application circuit VIN VOUT VIN VOUT EN GND LOAD 0.1～1uF EN Fig.32 Typical application circuit www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/9 2011.06 - Rev.C Technical Note BD6524HFV ●Notes for use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (12) Thermal design Perform thermal design in which there are adequate margins by taking into account the power dissipation (Pd) in actual states of use. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/9 2011.06 - Rev.C Technical Note BD6524HFV ●Ordering part number B D 6 Part No. 5 2 4 Part No. 6524 H F V - Package HFV: HVSOF6 T R Packaging and forming specification TR: Embossed tape and reel (HVSOF6) HVSOF6 <Tape and Reel information> (1.5) (0.45) 6 5 4 Tape Embossed carrier tape Quantity 3000pcs Direction of feed (1.4) 1 2 3 TR The direction is the 1pin of product is at the upper right when you hold ( reel on the left hand and you pull out the tape on the right hand (0.15) (1.2) ) 1pin 0.145±0.05 0.75Max. 3.0±0.1 2.6±0.1 (MAX 2.8 include BURR) 1.6±0.1 (MAX 1.8 include BURR) S 0.1 S 0.22±0.05 Direction of feed 0.5 Reel (Unit : mm) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/9 ∗ Order quantity needs to be multiple of the minimum quantity. 2011.06 - Rev.C Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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