ADA4522-2 (Rev. 0)

55 V, EMI Enhanced, Zero Drift, Ultralow Noise,
Rail-to-Rail Output Operational Amplifier
ADA4522-2
Data Sheet
PIN CONNECTION DIAGRAM
Low offset voltage: 5 µV maximum
Extremely low offset drift: 22 nV/°C maximum
Low voltage noise: 5.8 nV/√Hz typical
117 nV p-p from 0.1 Hz to 10 Hz typical
Low input bias current: 50 pA typical
Unity-gain crossover: 3 MHz
Single-supply operation: input voltage range includes
ground and rail-to-rail output
Wide range of operating voltages
Single-supply operation: 4.5 V to 55 V
Dual-supply operation: ±2.25 V to ±27.5 V
Integrated EMI filters
Unity-gain stable
OUT A 1
–IN A 2
+IN A 3
V– 4
ADA4522-2
TOP VIEW
(Not to Scale)
8
V+
7
OUT B
6
–IN B
5
+IN B
13168-001
FEATURES
Figure 1. 8-Lead MSOP (RM Suffix) and 8-Lead SOIC (R Suffix)
Pin Configuration
APPLICATIONS
LCR meter/megohmmeter front-end amplifiers
Load cell and bridge transducers
Magnetic force balance scales
High precision shunt current sensing
Thermocouple/RTD sensors
PLC input and output amplifiers
100
The ADA4522-2 performance is specified at 5.0 V, 30 V, and 55 V
power supply voltages and it operates over the range of 4.5 V to
55 V. It is an excellent selection for applications using single-ended
supplies of 5 V, 10 V, 12 V, and 30 V, or for applications using
higher single supplies and dual supplies of ±2.5 V, ±5 V, and
±15 V. The ADA4522-2 uses on-chip filtering to achieve high
immunity to electromagnetic interference (EMI).
The ADA4522-2 is fully specified over the extended industrial
temperature range of −40°C to +125°C and is available in 8-lead
MSOP and 8-lead SOIC packages.
VOLTAGE NOISE DENSITY (nV/√Hz)
The ADA4522-2 is a dual channel, zero drift op amp with low
noise and power, ground sensing inputs, and rail-to-rail output,
optimized for total accuracy over time, temperature, and voltage
conditions. The wide operating voltage and temperature ranges,
as well as the high open-loop gain and very low dc and ac errors
make the device well suited for amplifying very small input
signals and for accurately reproducing larger signals in a wide
variety of applications.
10
1
0.1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 2. Voltage Noise Density, VSY = ±15 V
Table 1. Zero Drift Op Amps (<0.1 µV/°C)
Supply Voltage
Single
Dual
Quad
Rev. 0
5V
30V
55V
AV = +100
13168-165
GENERAL DESCRIPTION
5V
ADA4528-1
AD8628
AD8538
ADA4051-1
ADA4528-2
AD8629
AD8539
ADA4051-2
AD8630
16 V
AD8638
AD8639
30 V
ADA4638-1
55 V
ADA4522-2
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ADA4522-2
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
On-Chip Input EMI Filter and Clamp Circuit ....................... 20
Applications ....................................................................................... 1
Thermal Shutdown .................................................................... 21
Pin Connection Diagram ................................................................ 1
Input Protection ......................................................................... 21
General Description ......................................................................... 1
Single Supply and Rail-to-Rail Output .................................... 21
Revision History ............................................................................... 2
Large Signal Transient Response .............................................. 22
Specifications..................................................................................... 3
Noise Considerations ................................................................. 22
Electrical Characteristics—5.0 V Operation ............................ 3
EMI Rejection Ratio .................................................................. 24
Electrical Characteristics—30 V Operation ............................. 4
Single-Supply Instrumentation Amplifier .............................. 24
Electrical Characteristics—55 V Operation ............................. 5
Load Cell/Strain Gage Sensor Signal Conditioning .............. 25
Absolute Maximum Ratings ............................................................ 7
Precision Low-Side Current Shunt Sensor.............................. 26
Thermal Resistance ...................................................................... 7
Printed Circuit Board Layout ................................................... 26
ESD Caution .................................................................................. 7
Comparator Operation .............................................................. 27
Pin Configuration and Function Descriptions ............................. 8
Outline Dimensions ....................................................................... 28
Typical Performance Characteristics ............................................. 9
Ordering Guide .......................................................................... 28
Applications Information .............................................................. 20
Theory of Operation .................................................................. 20
REVISION HISTORY
5/15—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
Data Sheet
ADA4522-2
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5.0 V OPERATION
VSY = 5.0 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Test Conditions/Comments
VOS
VCM = VSY/2
−40°C ≤ TA ≤ +125°C
Offset Voltage Drift
Input Bias Current
ΔVOS/ΔT
IB
Min
Typ
Max
Unit
0.7
5
6.5
15
150
500
2
250
350
500
3.5
µV
µV
nV/°C
pA
pA
nA
pA
pA
pA
V
dB
dB
dB
dB
2.5
50
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
80
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
IVR
CMRR
Large Signal Voltage Gain
AVO
Input Resistance
Differential Mode
Common Mode
Input Capacitance
Differential Mode
Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
VCM = 0 V to 3.5 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VOUT = 0.5 V to 4.5 V
−40°C ≤ TA ≤ +125°C
0
135
130
125
125
30
100
kΩ
GΩ
CINDM
CINCM
7
35
pF
pF
4.98
V
V
mV
mV
mA
mA
mA
mA
mA
Ω
VOH
VOL
Continuous Output Current
Short-Circuit Current Source
IOUT
ISC+
Short-Circuit Current Sink
ISC−
RL = 10 kΩ to VSY/2
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VSY/2
−40°C ≤ TA ≤ +125°C
Dropout voltage = 1 V
4.97
4.95
20
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Unity-Gain Crossover
−3 dB Closed-Loop Bandwidth
Phase Margin
Settling Time to 0.1%
Channel Separation
ZOUT
PSRR
ISY
SR+
SR−
GBP
UGC
f−3dB
ΦM
tS
CS
TA = 125°C
f = 1 MHz, AV = +1
VSY = 4.5 V to 55 V
−40°C ≤ TA ≤ +125°C
IOUT = 0 mA
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, CL = 50 pF, AV = 1
RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 100
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 1
VIN = 1 V step, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 1 V p-p, f = 10 kHz, RL = 10 kΩ, CL = 50 pF
Rev. 0 | Page 3 of 28
30
50
14
22
15
29
19
4
TA = 125°C
Supply Current per Amplifier
145
RINDM
RINCM
Output Voltage Low
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
155
150
145
160
830
1.4
1.3
2.7
3
6.5
64
4
98
900
950
dB
dB
µA
µA
V/µs
V/µs
MHz
MHz
MHz
Degrees
µs
dB
ADA4522-2
Parameter
EMI Rejection Ratio of +IN x
NOISE PERFORMANCE
Total Harmonic Distortion + Noise
Bandwidth (BW) = 80 kHz
BW = 500 kHz
Peak-to-Peak Voltage Noise
Voltage Noise Density
Peak-to-Peak Current Noise
Current Noise Density
Data Sheet
Symbol
EMIRR
Test Conditions/Comments
VIN = 100 mVPEAK, f = 400 MHz
VIN = 100 mVPEAK, f = 900 MHz
VIN = 100 mVPEAK, f = 1800 MHz
VIN = 100 mVPEAK, f = 2400 MHz
THD + N
AV = +1, f = 1 kHz, VIN = 0.6 V rms
eN p-p
eN
iN p-p
iN
Min
Typ
72
80
83
85
Max
0.001
0.02
117
5.8
16
0.8
AV = 100, f = 0.1 Hz to 10 Hz
AV = 100, f = 1 kHz
AV = 100, f = 0.1 Hz to 10 Hz
AV = 100, f = 1 kHz
Unit
dB
dB
dB
dB
%
%
nV p-p
nV/√Hz
pA p-p
pA/√Hz
ELECTRICAL CHARACTERISTICS—30 V OPERATION
VSY = 30 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
Symbol
Test Conditions/Comments
VOS
VCM = VSY/2
−40°C ≤ TA ≤ +125°C
Min
ΔVOS/ΔT
IB
Typ
Max
Unit
1
5
7.2
22
150
500
3
300
400
500
28.5
µV
µV
nV/°C
pA
pA
nA
pA
pA
pA
V
dB
dB
dB
dB
4
50
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
80
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
IVR
CMRR
Large Signal Voltage Gain
AVO
Input Resistance
Differential Mode
Common Mode
Input Capacitance
Differential Mode
Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
VCM = 0 V to 28.5 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VOUT = 0.5 V to 29.5 V
−40°C ≤ TA ≤ +125°C
0
145
140
140
135
160
150
RINDM
RINCM
30
400
kΩ
GΩ
CINDM
CINCM
7
35
pF
pF
29.89
V
V
mV
mV
mA
mA
mA
mA
mA
Ω
VOH
Output Voltage Low
VOL
Continuous Output Current
Short-Circuit Current Source
IOUT
ISC+
Short-Circuit Current Sink
ISC−
Closed-Loop Output Impedance
ZOUT
RL = 10 kΩ to VSY/2
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VSY/2
−40°C ≤ TA ≤ +125°C
Dropout voltage = 1 V
TA = +125°C
TA = +125°C
f = 1 MHz, AV = +1
Rev. 0 | Page 4 of 28
29.87
29.80
110
14
21
15
33
22
4
130
200
Data Sheet
Parameter
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Unity-Gain Crossover
−3 dB Closed-Loop Bandwidth
Phase Margin
Settling Time to 0.1%
Settling Time to 0.01%
Channel Separation
EMI Rejection Ratio of +IN x
NOISE PERFORMANCE
Total Harmonic Distortion + Noise
BW = 80 kHz
BW = 500 kHz
Peak-to-Peak Voltage Noise
Voltage Noise Density
Peak-to-Peak Current Noise
Current Noise Density
ADA4522-2
Symbol
Test Conditions/Comments
Min
Typ
PSRR
VSY = 4.5 V to 55 V
−40°C ≤ TA ≤ +125°C
IOUT = 0 mA
−40°C ≤ TA ≤ +125°C
150
145
160
ISY
SR+
SR−
GBP
UGC
f−3 dB
ΦM
tS
tS
CS
EMIRR
RL = 10 kΩ, CL = 50 pF, AV = 1
RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 100
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO =1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 1
VIN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 V p-p, f = 10 kHz, RL = 10 kΩ, CL = 50 pF
VIN = 100 mVPEAK, f = 400 MHz
VIN = 100 mVPEAK, f = 900 MHz
VIN = 100 mVPEAK, f = 1800 MHz
VIN = 100 mVPEAK, f = 2400 MHz
THD + N
AV = +1, f = 1 kHz, VIN = 6 V rms
eN p-p
eN
iN p-p
iN
830
AV = 100, f = 0.1 Hz to 10 Hz
AV = 100, f = 1 kHz
AV = 100, f = 0.1 Hz to 10 Hz
AV = 100, f = 1 kHz
Max
Unit
900
950
dB
dB
µA
µA
1.8
0.9
2.7
3
6.5
64
12
14
98
72
80
83
85
V/µs
V/µs
MHz
MHz
MHz
Degrees
µs
µs
dB
dB
dB
dB
dB
0.0005
0.004
117
5.8
16
0.8
%
%
nV p-p
nV/√Hz
pA p-p
pA/√Hz
ELECTRICAL CHARACTERISTICS—55 V OPERATION
VSY = 55 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified.
Table 4.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
Symbol
Test Conditions/Comments
VOS
VCM = VSY/2
−40°C ≤ TA ≤ +125°C
Min
ΔVOS/ΔT
IB
Typ
Max
Unit
1.5
7
10
30
150
500
4.5
300
400
500
53.5
µV
µV
nV/°C
pA
pA
nA
pA
pA
pA
V
dB
dB
dB
dB
6
50
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
80
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
IVR
CMRR
Large Signal Voltage Gain
AVO
Input Resistance
Differential Mode
Common Mode
RINDM
RINCM
VCM = 0 V to 53.5 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VOUT = 0.5 V to 54.5 V
−40°C ≤ TA ≤ +125°C
0
140
135
135
125
144
137
30
1000
Rev. 0 | Page 5 of 28
kΩ
GΩ
ADA4522-2
Parameter
Input Capacitance
Differential Mode
Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
Data Sheet
Symbol
Test Conditions/Comments
Min
CINDM
CINCM
VOH
Output Voltage Low
VOL
Continuous Output Current
Short-Circuit Current Source
IOUT
ISC+
Short-Circuit Current Sink
ISC−
RL = 10 kΩ to VSY/2
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VSY/2
−40°C ≤ TA ≤ +125°C
Dropout voltage = 1 V
54.75
54.65
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Unity-Gain Crossover
−3 dB Closed-Loop Bandwidth
Phase Margin
Settling Time to 0.1%
Settling Time to 0.01%
Channel Separation
EMI Rejection Ratio of +IN x
NOISE PERFORMANCE
Total Harmonic Distortion + Noise
BW = 80 kHz
BW = 500 kHz
Peak-to-Peak Voltage Noise
Voltage Noise Density
Peak-to-Peak Current Noise
Current Noise Density
ZOUT
PSRR
ISY
SR+
SRGBP
UGC
f−3 dB
ΦM
tS
tS
CS
EMIRR
RL = 10 kΩ, CL = 50 pF, AV = 1
RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 100
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AVO = 1
VIN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1
VIN = 10 V p-p, f = 10 kHz, RL = 10 kΩ, CL = 50 pF
VIN = 100 mVPEAK, f = 400 MHz
VIN = 100 mVPEAK, f = 900 MHz
VIN = 100 mVPEAK, f = 1800 MHz
VIN = 100 mVPEAK, f = 2400 MHz
THD + N
AV = +1, f = 1 kHz, VIN = 10 V rms
eN p-p
eN
iN p-p
iN
AV = 100, f = 0.1 Hz to 10 Hz
AV = 100, f = 1 kHz
AV = 100, f = 0.1 Hz to 10 Hz
AV = 100, f = 1 kHz
Rev. 0 | Page 6 of 28
150
145
Unit
pF
pF
54.8
V
V
mV
mV
mA
mA
mA
mA
mA
Ω
250
350
14
21
15
32
22
4
TA = 125°C
f = 1 MHz, AV = +1
VSY = 4.5 V to 55 V
−40°C ≤ TA ≤ +125°C
IOUT = 0 mA
−40°C ≤ TA ≤ +125°C
Max
7
35
200
TA = 125°C
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Typ
160
830
900
950
dB
dB
µA
µA
1.7
0.8
2.7
3
6.5
64
12
14
98
72
80
83
85
V/µs
V/µs
MHz
MHz
MHz
Degrees
µs
µs
dB
dB
dB
dB
dB
0.0007
0.003
117
5.8
16
0.8
%
%
nV p-p
nV/√Hz
pA p-p
pA/√Hz
Data Sheet
ADA4522-2
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 5.
Parameter
Supply Voltage
Input Voltage
Input Current1
Differential Input Voltage
Output Short-Circuit
Duration to Ground
Temperature Range
Storage
Operating
Junction
Lead Temperature (Soldering,
60 sec)
1
Rating
60 V
(V−) − 300 mV to (V+) + 300 mV
±10 mA
±5 V
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
θJA is specified for the worst case conditions, that is, a device
soldered in a circuit board for surface-mount packages using a
standard 4-layer JEDEC board.
Table 6. Thermal Resistance
Package Type
8-Lead MSOP (RM-8)
8-Lead SOIC (R-8)
ESD CAUTION
The input pins have clamp diodes to the power supply pins. Limit the input
current to 10 mA or less whenever input signals exceed the power supply
rail by 0.3 V.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. 0 | Page 7 of 28
θJA
190
158
θJC
44
43
Unit
°C/W
°C/W
ADA4522-2
Data Sheet
OUT A 1
–IN A 2
+IN A 3
V– 4
ADA4522-2
TOP VIEW
(Not to Scale)
8
V+
7
OUT B
6
–IN B
5
+IN B
13168-002
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
OUT A
−IN A
+IN A
V−
+IN B
−IN B
OUT B
V+
Description
Output, Channel A
Inverting Input, Channel A
Noninverting Input, Channel A
Negative Supply Voltage
Noninverting Input, Channel B
Inverting Input, Channel B
Output, Channel B
Positive Supply Voltage
Rev. 0 | Page 8 of 28
Data Sheet
ADA4522-2
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
30
60
50
40
30
20
–3
–2
–1
0
1
2
3
4
5
VOS (µV)
0
5
10
15
20
25
30
Figure 7. Input Offset Voltage Drift Distribution, VSY = ±2.5 V
35
VSY = ±15V
VCM = VSY/2
600 CHANNELS
MEAN = 0.31µV
STD DEV. = 0.62µV
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
–5
TCVOS (nV/°C)
50
40
30
20
VSY = ±15V
–40°C ≤ TA ≤ +125°C
160
CHANNELS
30
MEAN = –2.48nV/°C
STD DEV. = 2.65nV/°C
25
20
15
10
5
10
–4
–3
–2
–1
0
1
2
3
4
5
VOS (µV)
0
–30 –25 –20 –15 –10
13168-004
0
–5
0
5
10
15
20
25
30
30
Figure 8. Input Offset Voltage Drift Distribution, VSY = ±15 V
35
70
NUMBER OF AMPLIFIERS
VSY = ±27.5V
VCM = VSY/2
60 600 CHANNELS
MEAN = 0.69µV
STD DEV. = 0.81µV
50
40
30
20
VSY = ±27.5V
–40°C ≤ TA ≤ +125°C
30 160 CHANNELS
MEAN = –4.54nV/°C
STD DEV. = 4.01nV/°C
25
20
15
10
5
–4
–3
–2
–1
0
1
2
3
4
VOS (µV)
5
13168-005
10
0
–5
–5
TCVOS (nV/°C)
Figure 5. Input Offset Voltage Distribution, VSY = ±15 V
NUMBER OF AMPLIFIERS
10
0
–30 –25 –20 –15 –10
Figure 4. Input Offset Voltage Distribution, VSY = ±2.5 V
60
15
13168-006
–4
13168-003
0
–5
70
20
5
10
80
25
13168-007
70
VSY = ±2.5V
–40°C ≤ TA ≤ +125°C
160 CHANNELS
MEAN = –1.19nV/°C
STD DEV. = 1.82nV/°C
13168-008
NUMBER OF AMPLIFIERS
80
35
VSY = ±2.5V
VCM = VSY/2
600 CHANNELS
MEAN = 0.10µV
STD DEV. = 0.59µV
NUMBER OF AMPLIFIERS
90
Figure 6. Input Offset Voltage Distribution, VSY = ±27.5 V
0
–30 –25 –20 –15 –10
–5
0
5
10
15
20
25
TCVOS (nV/°C)
Figure 9. Input Offset Voltage Drift Distribution, VSY = ±27.5 V
Rev. 0 | Page 9 of 28
ADA4522-2
2000
1500
1
1000
+125°C
+85°C
+25°C
–40°C
IB (pA)
3
VSY = 5V
–1
500
–3
0
–5
0
1.0
2.0
3.0
3.5
VCM (V)
Figure 10. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = 5 V
5
–500
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VCM (V)
13168-012
VSY = 5V
20 CHANNELS
13168-009
VOS (µV)
5
Data Sheet
Figure 13. Input Bias Current (IB) vs. Common-Mode Voltage (VCM), VSY = 5 V
3000
VSY = 30V
20 CHANNELS
VSY = 30V
2500
3
1
IB (pA)
VOS (µV)
2000
–1
+125°C
+85°C
+25°C
–40°C
1500
1000
500
–3
0
5.0
10.0
15.0
20.0
25.0
28.5
VCM (V)
Figure 11. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM),
VSY = 30 V
5
–500
13168-010
–5
0
5.0
10.0
15.0
20.0
25.0
28.5
VCM (V)
13168-013
0
Figure 14. Input Bias Current (IB) vs. Common-Mode Voltage (VCM), VSY = 30 V
5000
VSY = 55V
20 CHANNELS
VSY = 55V
4500
4000
3
+125°C
+85°C
+25°C
–40°C
3000
1
IB (pA)
VOS (µV)
3500
–1
2500
2000
1500
1000
–3
500
5.0
10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 53.5
VCM (V)
Figure 12. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM),
VSY = 55 V
Rev. 0 | Page 10 of 28
–500
0
5.0
10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 53.5
VCM (V)
Figure 15. Input Bias Current (IB) vs. Common-Mode Voltage (VCM),
VSY = 55 V
13168-014
0
13168-011
0
–5
Data Sheet
IB+
I B–
IOS
1200
1000
2500
200
500
0
0
–200
–500
–25
0
25
50
75
100
125
TEMPERATURE (°C)
–1000
–50
25
50
75
100
1.0
VSY = ±15V
VCM = VSY/2
IB+
I B–
IOS
0.8
ISY PER AMP (mA)
1000
500
0.6
0.4
0.2
0
–25
0
25
50
75
100
125
TEMPERATURE (°C)
0
13168-017
–500
–50
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
10k
1k
100
10
0.1
ILOAD (mA)
1
10
100
13168-024
1
0.01
0
5
10
15
20
25
30
35
40
45
50
55
60
Figure 20. Supply Current (ISY) per Amplifier vs. Supply Voltage (VSY)
+125°C
+85°C
+25°C
–40°C
VSY = ±2.5V TO ±27.5V
+125°C
+85°C
+25°C
–40°C
VSY (V)
Figure 17. Input Bias Current (IB) vs. Temperature, VSY = ±15 V
0.1
0.001
125
Figure 19. Input Bias Current (IB) vs. Temperature, VSY = ±27.5 V
1500
IB (pA)
0
TEMPERATURE (°C)
Figure 16. Input Bias Current (IB) vs. Temperature, VSY = ±2.5 V
2000
–25
13168-016
IB (pA)
1000
–400
–50
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
1500
400
13168-015
IB (pA)
2000
600
100k
IB+
I B–
IOS
3000
800
2500
VSY = ±27.5V
VCM = VSY/2
3500
13168-025
1400
4000
VSY = ±2.5V
VCM = VSY/2
Figure 18. Output Voltage High (VOH) to Supply Rail vs. Load Current (ILOAD)
100k
+125°C
+85°C
+25°C
–40°C
VSY = ±2.5V TO ±27.5V
10k
1k
100
10
1
0.1
0.001
0.01
0.1
1
ILOAD (mA)
10
100
13168-027
1600
ADA4522-2
Figure 21. Output Voltage Low (VOL) to Supply Rail vs. Load Current (ILOAD)
Rev. 0 | Page 11 of 28
75
50
RL = 10kΩ
25
0
–50
–25
0
25
50
75
100
125
150
TEMPERATURE (°C)
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
175
150
RL = 10kΩ
125
100
75
50
RL = 100kΩ
25
0
–50
–25
0
25
50
75
100
125
150
TEMPERATURE (°C)
VSY = ±27.5V
300
250
RL = 10kΩ
200
150
100
50
0
–50
RL = 100kΩ
–25
0
25
50
75
TEMPERATURE (°C)
100
125
150
RL = 10kΩ
25
0
–50
–25
0
25
50
75
100
125
150
200
VSY = ±15V
175
150
RL = 10kΩ
125
100
75
50
RL = 100kΩ
25
0
–50
–25
0
25
50
75
100
125
150
Figure 26. Output Voltage Low (VOL) to Supply Rail vs. Temperature, VSY = ±15 V
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
350
50
TEMPERATURE (°C)
13168-020
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
Figure 23. Output Voltage High (VOH) to Supply Rail vs. Temperature, VSY = ±15 V
75
Figure 25. Output Voltage Low (VOL) to Supply Rail vs. Temperature,
VSY = ±2.5 V
13168-019
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
VSY = ±15V
RL = 2kΩ
100
TEMPERATURE (°C)
Figure 22. Output Voltage High (VOH) to Supply Rail vs. Temperature,
VSY = ±2.5 V
200
125
13168-021
RL = 2kΩ
100
VSY = ±2.5V
13168-022
125
150
Figure 24. Output Voltage High (VOH) to Supply Rail vs. Temperature,
VSY = ±27.5 V
Rev. 0 | Page 12 of 28
350
VSY = ±27.5V
300
RL = 10kΩ
250
200
150
100
50
0
–50
RL = 100kΩ
–25
0
25
50
75
100
125
150
TEMPERATURE (°C)
Figure 27. Output Voltage Low (VOL) to Supply Rail vs. Temperature,
VSY = ±27.5 V
13168-023
VSY = ±2.5V
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
150
Data Sheet
13168-018
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
ADA4522-2
Data Sheet
ADA4522-2
140
140
VSY = ±2.5V TO ±27.5V
120
120
100
80
PSRR (dB)
80
60
60
40
40
20
20
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
–20
100
13168-030
0
10
1k
AV = +100
AV = +10
AV = +1
100M
5V
30V
55V
0.835
0.830
1
0.1
0.825
0.820
0.815
0.01
10k
100k
1M
10M
100M
FREQUENCY (Hz)
0.805
–50
13168-031
1k
PHASE
60
45
40
GAIN
0
0
1k
10k
75
100
125
150
AV = +100
AV = +10
AV = +1
VSY = ±2.5V TO ±27.5V
40
30
20
10
0
–10
VSY = ±2.5V TO ±27.5V
RL = 10kΩ
100k
1M
10M
–45
FREQUENCY (Hz)
13168-026
20
50
50
90
80
60
135
CLOSED-LOOP GAIN (dB)
100
25
Figure 32. Supply Current (ISY) per Amplifier vs. Temperature
PHASE MARGIN (Degrees)
CL = 50pF
CL = 100pF
CL = 50pF
CL = 100pF
0
TEMPERATURE (°C)
Figure 29. Closed-Loop Output Impedance vs. Frequency
120
–25
13168-028
0.810
0.001
100
OPEN-LOOP GAIN (dB)
10M
0.840
VSY = ±2.5V TO ±27.5V
10
–40
100
1M
Figure 31. PSRR vs. Frequency
ISY PER AMP (mA)
OUTPUT IMPEDANCE (Ω)
100
100k
FREQUENCY (Hz)
Figure 28. CMRR vs. Frequency
1k
10k
13168-032
0
–20
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 33. Closed-Loop Gain vs. Frequency
Figure 30. Open-Loop Gain and Phase Margin vs. Frequency
Rev. 0 | Page 13 of 28
10M
13168-029
CMRR (dB)
100
–20
PSRR+
PSRR–
VSY = ±2.5V TO ±27.5V
ADA4522-2
Data Sheet
1.0
0.5
0.04
0
–0.5
0
–0.02
–1.5
–0.06
13168-034
–0.04
TIME (4µs/DIV)
–0.08
TIME (400ns/DIV)
Figure 37. Small Signal Transient Response, VSY = ±2.5 V
Figure 34. Large Signal Transient Response, VSY = ±2.5 V
15
0.08
VSY = ±15V
VIN = 20V p-p
AV = +1
RL = 10kΩ
CL = 100pF
RS_IN+ = 100Ω
RS_IN– = 100Ω
5
VSY = ±15V
VIN = 100mV p-p
AV = +1
RL = 10kΩ
CL = 100pF
0.06
0.04
VOLTAGE (V)
10
VOLTAGE (V)
0.02
–1.0
–2.0
VSY = ±2.5V
VIN = 100mV p-p
AV = +1
RL = 10kΩ
CL = 100pF
0.06
VOLTAGE (V)
1.5
VOLTAGE (V)
0.08
VSY = ±2.5V
VIN = 2V p-p
AV = +1
RL = 10kΩ
CL = 100pF
RS_IN+ = 100Ω
RS_IN– = 100Ω
13168-037
2.0
0
–5
0.02
0
–0.02
–0.04
–10
–15
TIME (10µs/DIV)
–0.08
TIME (400ns/DIV)
Figure 35. Large Signal Transient Response, VSY = ±15 V
30
0.08
VSY = ±27.5V
VIN = 100mV p-p
AV = +1
RL = 10kΩ
CL = 100pF
0.06
0.04
VOLTAGE (V)
10
0
–10
0.02
0
–0.02
–0.04
–20
–30
TIME (10µs/DIV)
–0.08
TIME (400ns/DIV)
Figure 39. Small Signal Transient Response, VSY = ±27.5 V
Figure 36. Large Signal Transient Response, VSY = ±27.5 V
Rev. 0 | Page 14 of 28
13168-039
–0.06
13168-036
VOLTAGE (V)
Figure 38. Small Signal Transient Response, VSY = ±15 V
VSY = ±27.5V
VIN = 50V p-p
AV = +1
RL = 10kΩ
CL = 100pF
RS_IN+ = 100Ω
RS_IN– = 100Ω
20
13168-038
13168-035
–0.06
Data Sheet
–20
35
OS+
30
25
OS–
20
15
10
1000
LOAD CAPACITANCE (pF)
CHANNEL SEPARATION (dB)
OVERSHOOT (%)
OS+
25
20
OS–
15
10
100
1000
LOAD CAPACITANCE (pF)
–40
–60
–80
–100
CHANNEL SEPARATION (dB)
–20
35
30
OS+
25
20
OS–
15
10
10
100
VIN = 10V p-p
VIN = 30V p-p
VIN = 50V p-p
VSY = ±27.5V
AV = –10
RL = 10kΩ
–40
–60
–80
–100
–120
100
LOAD CAPACITANCE (pF)
1000
13168-042
5
0
10
1
Figure 44. Channel Separation vs. Frequency, VSY = ±15 V
0
VSY = ±27.5V
RL = 10kΩ
AV = +1
VIN = 100mV p-p
0.1
FREQUENCY (kHz)
Figure 41. Small Signal Overshoot vs. Load Capacitance, VSY = ±15 V
OVERSHOOT (%)
100
VIN = 5V p-p
VIN = 10V p-p
VIN = 25V p-p
VSY = ±15V
AV = –10
RL = 10kΩ
–140
0.01
13168-041
0
10
40
10
–120
5
45
1
Figure 43. Channel Separation vs. Frequency, VSY = ±2.5 V
–20
30
0.1
FREQUENCY (kHz)
0
VSY = ±15V
RL = 10kΩ
AV = +1
VIN = 100mV p-p
35
50
–100
–140
0.01
Figure 40. Small Signal Overshoot vs. Load Capacitance, VSY = ±2.5 V
40
–80
13168-043
100
13168-040
0
10
45
–60
–120
5
50
–40
13168-044
OVERSHOOT (%)
40
VIN = 0.5V p-p
VIN = 1V p-p
VIN = 2V p-p
VSY = ±2.5V
AV = –10
RL = 10kΩ
Figure 42. Small Signal Overshoot vs. Load Capacitance, VSY = ±27.5 V
Rev. 0 | Page 15 of 28
–140
0.01
0.1
1
10
100
FREQUENCY (kHz)
Figure 45. Channel Separation vs. Frequency, VSY = ±27.5 V
13168-045
45
0
VSY = ±2.5V
RL = 10kΩ
AV = +1
VIN = 100mV p-p
CHANNEL SEPARATION (dB)
50
ADA4522-2
ADA4522-2
Data Sheet
100
1
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
10
0.1
THD + N (%)
THD + N (%)
1
0.1
0.01
0.01
0.001
0.0001
0.001
0.01
0.1
1
AMPLITUDE (V rms)
0.0001
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 49. THD + N vs. Frequency, VSY = ±2.5 V
Figure 46. THD + N vs. Amplitude, VSY = ±2.5 V
100
VSY = ±2.5V
AV = +1
RL = 10kΩ
VIN = 0.6V rms
13168-053
VSY = ±2.5V
AV = +1
FREQUENCY = 1kHz
RL = 10kΩ
13168-050
0.001
1
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
10
0.1
THD + N (%)
THD + N (%)
1
0.1
0.01
0.01
0.001
0.0001
0.001
0.01
0.1
1
10
AMPLITUDE (V rms)
0.0001
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 50. THD + N vs. Frequency, VSY = ±15 V
Figure 47. THD + N vs. Amplitude, VSY = ±15 V
100
VSY = ±15V
AV = +1
RL = 10kΩ
VIN = 6V rms
13168-054
VSY = ±15V
AV = +1
FREQUENCY = 1kHz
RL = 10kΩ
13168-051
0.001
1
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
10
0.1
THD + N (%)
THD + N (%)
1
0.1
0.01
0.01
0.001
0.0001
0.001
0.01
0.1
1
AMPLITUDE (V rms)
10
0.0001
10
VSY = ±27.5V
AV = +1
RL = 10kΩ
VIN = 10V rms
100
1k
10k
FREQUENCY (Hz)
Figure 51. THD + N vs. Frequency, VSY = ±27.5 V
Figure 48. THD + N vs. Amplitude, VSY = ±27.5 V
Rev. 0 | Page 16 of 28
100k
13168-055
VSY = ±27.5V
AV = +1
FREQUENCY = 1kHz
RL = 10kΩ
13168-052
0.001
Data Sheet
ADA4522-2
–1.2
–1.4
2
1
0
TIME (1µs/DIV)
–1
–0.4
–0.6
–1
–1.0
–2
–1.2
–3
–8
–10
VSY = ±15V
VIN = 2V p-p
RL = 10kΩ
CL = 100pF
AV = –10
VOUT
–14
20
30
4
15
25
2
20
15
10
5
0
–2
–4
TIME (4µs/DIV)
–5
–3
–8
VSY = ±27.5V
VIN = 4V p-p
RL = 10kΩ
CL = 100pF
AV = –10
–10
–12
–14
TIME (10µs/DIV)
–10
–15
TIME (2µs/DIV)
–20
6
40
60
4
30
50
2
40
30
20
10
VOUT
–5
VOUT
–10
INPUT VOLTAGE (V)
–4
0
70
0
–2
–4
–6
–10
20
VIN
VSY = ±27.5V
VIN = 4V p-p
RL = 10kΩ
CL = 100pF
AV = –10
–10
Figure 54. Positive Overload Recovery, VSY = ±27.5 V
–10
VOUT
–20
–30
TIME (4µs/DIV)
Figure 57. Negative Overload Recovery, VSY = ±27.5 V
Rev. 0 | Page 17 of 28
10
0
–8
0
13168-058
INPUT VOLTAGE (V)
–2
5
Figure 56. Negative Overload Recovery, VSY = ±15 V
OUTPUT VOLTAGE (V)
0
VIN
VSY = ±15V
VIN = 2V p-p
RL = 10kΩ
CL = 100pF
AV = –10
–8
Figure 53. Positive Overload Recovery, VSY = ±15 V
2
10
VIN
–6
0
–12
–3
6
INPUT VOLTAGE (V)
–4
TIME (1µs/DIV)
35
13168-057
INPUT VOLTAGE (V)
–2
0
Figure 55. Negative Overload Recovery, VSY = ±2.5 V
OUTPUT VOLTAGE (V)
0
VIN
1
–0.8
Figure 52. Positive Overload Recovery, VSY = ±2.5 V
2
VOUT
2
13168-060
VOUT
3
VSY = ±2.5V
VIN = 350mV p-p
RL = 10kΩ
CL = 100pF
AV = –10
–0.2
–40
13168-061
–1.0
4
3
OUTPUT VOLTAGE (V)
–0.8
0
4
13168-059
–0.6
VSY = ±2.5V
VIN = 350mV p-p
RL = 10kΩ
CL = 100pF
AV = –10
5
VIN
OUTPUT VOLTAGE (V)
–0.4
0.2
5
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
–0.2
6
INPUT VOLTAGE (V)
VIN
0.4
13168-056
0
7
OUTPUT VOLTAGE (V)
0.2
ADA4522-2
100
10
1
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
10
1
0.1
10
100
VSY = ±15V
AV = +1
10k
100k
1M
VSY = ±15V AND ±27.5V
AV = +100
PEAK-TO-PEAK NOISE = 117nV p-p
INPUT REFERRED VOLTAGE (nV)
75
10
50
25
0
–25
–50
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
–100
TIME (1s/DIV)
Figure 59. Voltage Noise Density, VSY = ±15 V
100
VSY = ±27.5V
AV = +1
CURRENT NOISE DENSITY (pA/√Hz)
100
Figure 62. 0.1 Hz to 10 Hz Noise
1
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
100M
13168-064
10
VSY = ±2.5V
VSY = ±15V
VSY = ±27.5V
RS = 100kΩ
AV = +100
10
1
10
100
1k
10k
FREQUENCY (Hz)
Figure 63. Current Noise Density
Figure 60. Voltage Noise Density, VSY = ±27.5 V
Rev. 0 | Page 18 of 28
100k
13168-067
100
13168-066
–75
1
10
VOLTAGE NOISE DENSITY (nV/√Hz)
1k
Figure 61. Voltage Noise Density, Av = +100
13168-063
VOLTAGE NOISE DENSITY (nV/√Hz)
100
FREQUENCY (Hz)
Figure 58. Voltage Noise Density, VSY = ±2.5 V
100
5V
30V
55V
AV = +100
13168-065
VOLTAGE NOISE DENSITY (nV/√Hz)
VSY = ±2.5V
AV = +1
13168-062
VOLTAGE NOISE DENSITY (nV/√Hz)
100
Data Sheet
ADA4522-2
INPUT VOLTAGE (1V/DIV)
VSY = ±2.5V
RL = 10kΩ
CL = 50pF
DUT AV = –1
+1V
0
INPUT
0
–1V
OUTPUT
OUTPUT
+10mV
0
–10mV
+10mV
0
–10mV
ERROR BAND
POST GAIN = 10
13168-046
ERROR BAND
POST GAIN = 10
TIME (2µs/DIV)
TIME (2µs/DIV)
Figure 67. Positive Settling Time to 0.1%, VSY = ±2.5 V
INPUT VOLTAGE (5V/DIV)
INPUT VOLTAGE (5V/DIV)
Figure 64. Negative Settling Time to 0.1%, VSY = ±2.5 V
VSY = ±15V AND ±27.5V
RL = 10kΩ
CL = 50pF
DUT AV = –1
+5V
0
INPUT
–5V
VSY = ±2.5V
RL = 10kΩ
CL = 50pF
DUT AV = –1
OUTPUT
ERROR BAND
POST GAIN = 10
+50mV
VSY = ±15V AND ±27.5V
RL = 10kΩ
CL = 50pF
DUT AV = –1
+5V
0
–5V
INPUT
OUTPUT
ERROR BAND
POST GAIN = 10
0
13168-047
TIME (4µs/DIV)
40
VIN = ±13.5V
VSY = ±15.0V
20
10
0
100
VIN = ±1.0V
VSY = ±2.5V
1k
10k
100k
1M
FREQUENCY (Hz)
10M
13168-033
OUTPUT VOLTAGE SWING (V p-p)
RL = 10kΩ
AV = –1
50
30
0
TIME (4µs/DIV)
Figure 68. Positive Settling Time to 0.1%, VSY = ±15 V and ±27.5 V
Figure 65. Negative Settling Time to 0.1%, VSY = ±15 V and ±27.5 V
VIN = ±26.0V
VSY = ±27.5V
+50mV
–50mV
–50mV
60
13168-048
–1V
INPUT
+1V
Figure 66. Output Voltage Swing vs. Frequency
Rev. 0 | Page 19 of 28
13168-049
INPUT VOLTAGE (1V/DIV)
Data Sheet
ADA4522-2
Data Sheet
APPLICATIONS INFORMATION
The ADA4522-2 has wide operating voltages from ±2.25 V (or
4.5 V) to ±27.5 V (or 55 V). It is a single supply amplifier, where
its input voltage range includes the lower supply rail. It also offers
low broadband noise of 5.8 nV/√Hz (at f = 1 kHz, AV = 100) and
reduced 1/f noise component. These features are ideal for the
amplification of low level signals in high precision applications.
A few examples of such applications are weigh scales, high
precision current sensing, high voltage buffers, signal conditioning
for temperature sensors, among others.
THEORY OF OPERATION
Figure 69 shows the ADA4522-2 architecture block diagram. It
consists of an input EMI filter and clamp circuitry, three gain
stages (Gm1, Gm2, and Gm3), input and output chopping networks
(CHOPIN and CHOPOUT), a clock generator, offset and ripple
correction loop circuitry, frequency compensation capacitors
(C1, C2, and C3), and thermal shutdown circuitry.
An EMI filter and clamp circuit is implemented at the input
front end to protect the internal circuitry against electrostatic
discharge (ESD) stresses and high voltage transients. The ability
of the amplifier to reject EMI is explained in detail in the EMI
Rejection Ratio section.
CHOPIN and CHOPOUT are controlled by a clock generator and
operate at 4.8 MHz. The input baseband signal is initially
modulated by CHOPIN. Next, CHOPOUT demodulates the input
signal and modulates the millivolt-level input offset voltage and
1/f noise of the input transconductance amplifier, Gm1, to the
chopping frequency at 4.8 MHz. The chopping networks
remove the low frequency errors, but in return, the networks
introduce chopping artifacts at the chopping frequency.
Therefore, a patented offset and ripple correction loop,
operating at 800 kHz, is used. This frequency is the switching
frequency of the amplifier. This patented circuitry reduces
chopping artifacts, allowing the ADA4522-2 to have a high
chopping frequency with minimal artifacts.
CHOPIN
C1
CHOPOUT
EMI
FILTER
–INx
AND
CLAMP
Gm1
Gm3
OUT
C3
OFFSET
AND RIPPLE
CORRECTION
LOOP
CLOCK
GENERATOR
C2
Gm2
THERMAL
SHUTDOWN
13168-068
+INx
4.8MHz CLOCKS
800kHz CLOCKS
Figure 69. ADA4522-2 Block Diagram
ON-CHIP INPUT EMI FILTER AND CLAMP CIRCUIT
Figure 70 shows the input EMI filter and clamp circuit. The
ADA4522-2 has internal ESD protection diodes (D1, D2, D3,
and D4) that are connected between the inputs and each supply
rail. These diodes protect the input transistors in the event of
electrostatic discharge and are reverse biased during normal
operation. This protection scheme allows voltages as high as
approximately 300 mV beyond the rails to be applied at the
input of either terminal without causing permanent damage.
See Table 5 in the Absolute Maximum Ratings section for more
information.
The EMI filter is composed of two 200 Ω input series resistors
(RS1 and RS2), two common-mode capacitors (CCM1 and CCM2),
and a differential capacitor (CDM). These RC networks set the
−3 dB low-pass cutoff frequencies at 50 MHz for commonmode signals, and at 33 MHz for differential signals. After the
EMI filter, back to back diodes (D5 and D6) are added to protect
internal circuit devices from high voltage input transients. Each
diode has about 1 V of forward turn on voltage. See the Large
Signal Transient Response section for more information on the
effect of high voltage input transient on the ADA4522-2.
As specified in the Absolute Maximum Ratings table (Table 5), the
maximum input differential voltage is limited to ±5 V. If more than
±5 V is applied, a continuous current larger than ±10 mA flows
through one of the back to back diodes. This compromises long
term reliability and can cause permanent damage to the device.
The thermal shutdown circuit shuts down the circuit when the
die is overheated; this is explained further in the Thermal
Shutdown section.
Rev. 0 | Page 20 of 28
V+
RS1
200Ω
D1
+INx
D2
D3
–INx
V–
D4
CCM1
RS2
C
200Ω DM
D5
D6
CCM2
Figure 70. Input EMI Filter and Clamp Circuit
13168-069
The ADA4522-2 is a dual, ultralow noise, high voltage, zero
drift, rail-to-rail output operational amplifier. It features a
patented chopping technique that offers an ultralow input offset
voltage of 5 µV and an input offset voltage drift of 22 nV/°C
maximum. Offset voltage errors due to common-mode voltage
swings and power supply variations are also corrected by the
chopping technique, resulting in a superb typical CMRR figure
of 160 dB and a PSRR figure of 160 dB at a 30 V supply voltage.
Data Sheet
ADA4522-2
THERMAL SHUTDOWN
INPUT PROTECTION
The ADA4522-2 has internal thermal shutdown circuitry for
each channel of the amplifier. The thermal shutdown circuitry
prevents internal devices from being damaged by an overheat
condition in the die. Overheat can occur due to a high ambient
temperature, a high supply voltage, and/or high output currents.
As specified in Table 5, care must be taken to maintain the
junction temperature below 150°C.
When either input of the ADA4522-2 exceeds one of the supply
rails by more than 300 mV, the ESD diodes mentioned in the
On-Chip Input EMI Filter and Clamp Circuit section become
forward-biased and large amounts of current begin to flow
through them. Without current limiting, this excessive fault
current causes permanent damage to the device. If the inputs
are expected to be subject to overvoltage conditions, insert a
resistor in series with each input to limit the input current to
±10 mA maximum. However, consider the resistor thermal
noise effect on the entire circuit.
where θJA is the thermal resistance between the die and the
ambient environment, as shown in Table 6.
The total power dissipation is the sum of quiescent power of the
device and the power required to drive a load for all channels of
an amplifier. The power dissipation per amplifier (PD_PER_AMP)
for sourcing a load is shown in Equation 2.
PD_PER_AMP = (VSY+ − VSY−) × ISY_PER_AMP + IOUT × (VSY+ − VOUT) (2)
When sinking current, replace (VSY+ − VOUT) in Equation 2 with
(VOUT − VSY−).
Also, take note to include the power dissipation of both
channels of the amplifier when calculating the total power
dissipation for the ADA4522-2.
The thermal shutdown circuitry does not guarantee that the device
is to be free of permanent damage if the junction temperature
exceeds 150°C. However, the internal thermal shutdown function
may help avoid permanent damage or reduce the degree of damage.
Each amplifier channel has thermal shutdown circuitry, composed
of a temperature sensor with hysteresis.
As soon as the junction temperature reaches 190°C, the thermal
shutdown circuitry shuts down the amplifier. Note that either
one of the two thermal shutdown circuitries are activated; this
activation disables the channel. When the amplifier is disabled, the
output becomes open state and the quiescent current of the channel
decreases to 0.1 mA. When the junction temperature cools down to
160°C, the thermal shutdown circuitry enables the amplifier and
the quiescent current increases to its typical value.
SINGLE-SUPPLY AND RAIL-TO-RAIL OUTPUT
The ADA4522-2 is a single-supply amplifier, where its input
voltage range includes the lower supply rail. This is ideal for
applications where the input common-mode voltage is at the
lower supply rail, for example, ground sensing. On the other
hand, the amplifier output is rail-to-rail. Figure 71 shows the
input and output waveforms of the ADA4522-2 configured as a
unity-gain buffer with a supply voltage of ±15 V. With an input
voltage of ±15 V, the low output voltage tracks the input voltage,
whereas the high output swing clamps/distorts when the input
goes out of the input voltage range (−15 V ≤ IVR ≤ +13.5 V).
However, the device does not exhibit phase reversal.
20
15
VIN
VSY = ±15V
AV = +1
20
15
10
10
5
5
0
0
VOUT
–5
–5
–10
–10
–15
–15
–20
When overheating in the die is caused by an undesirable excess
amount of output current, the thermal shutdown circuit repeats
its function. The junction temperature keeps increasing until it
reaches 190°C and one of the channels is disabled. Then, the
junction temperature cools down until it reaches 160°C, and the
channel is enabled again. The process then repeats.
Rev. 0 | Page 21 of 28
TIME (400s/DIV)
Figure 71. No Phase Reversal
–20
OUTPUT VOLTAGE (V)
(1)
13168-070
TJ = PD × θJA + TA
At ±15 V supply voltage, the broadband voltage noise of the
ADA4522-2 is approximately 7.3 nV/√Hz (at unity gain), and a
1 kΩ resistor has thermal noise of 4 nV/√Hz. Adding a 1 kΩ
resistor increases the total noise to 8.3 nV/√Hz.
INPUT VOLTAGE (V)
Two conditions affect junction temperature (TJ): the total power
dissipation of the device (PD) and the ambient temperature
surrounding the package (TA). Use the following equation to
estimate the approximate junction temperature:
ADA4522-2
Data Sheet
30
VSY = ±27.5V
20
VSY+
ADA4522-2
VOUT
100pF
RS_IN+
100Ω VSY–
10kΩ
VOLTAGE (V)
RS_IN–
100Ω
10
0
–10
VIN = 50V p-p
–30
TIME (10µs/DIV)
13168-071
–20
Figure 72. Large Signal Transient Response Example
LARGE SIGNAL TRANSIENT RESPONSE
When the ADA4522-2 is configured in a closed-loop configuration
with a large input transient (for example, a step input voltage), the
internal back to back diodes may turn on. Consider a case where
the amplifier is in unity-gain configuration with a step input
waveform. This is shown in Figure 72.
The noninverting input is driven by an input signal source and
the inverting input is driven by the output of the amplifier. The
maximum amplifier output current depends on the input step
function and the external source resistance at the input
terminals of the amplifier.
Case 1
If the external source resistance is low (for example, 100 Ω in
Figure 72) or if the input step function is large, the maximum
amplifier output current is limited to the output short-circuit
current as specified in the Specifications section. The maximum
differential voltage between the input signal and the amplifier
output is then limited by the maximum amplifier output current
multiplied by the total input resistance (internal and external)
and the turn on voltage of the back to back diode (see Figure 70
for the input EMI filter and clamp circuit architecture). When
the noninverting input voltage changes with a step signal, the
inverting input voltage (and, therefore, the output voltage)
follows the change quickly until it reaches the maximum
differential voltage between the input signal and amplifier
output possible. The inverting input voltage then starts slewing
with the slew rate specified in the Specifications section until it
reaches its desired output. Therefore, as seen in Figure 72, there are
two distinctive sections of the rising and falling edge of the
output waveform. With this test condition, the amount and
duration of the input/output current is limited and, therefore,
does not damage the amplifier.
Case 2
If the external source resistance is high or if the input step
function is small, the maximum output current is limited to the
instantaneous difference between the input signal and amplifier
output voltage (which is the change in the step function) divided by
the source resistance. This maximum output current is less than
the amplifier output short-circuit current. The maximum
differential voltage between the input signal and the amplifier
output is then equal to the step function. The output voltage
slews until it reaches its desired output.
Therefore, if desired, reduce the input current by adding a
larger external resistor between the signal source and the
noninverting input. Similarly, to reduce output current, add an
external resistor to the feedback loop between the inverting
input and output. This large signal transient response issue is
typically not a problem when the amplifier is configured in
closed-loop gain, where the input signal source is usually much
smaller and the gain and feedback resistors limit the current.
Back to back diodes are also implemented in many other
amplifiers; these amplifiers show similar slewing behavior.
NOISE CONSIDERATIONS
1/f Noise
1/f noise, also known as pink noise or flicker noise, is inherent
in semiconductor devices and increases as frequency decreases.
At a low frequency, 1/f noise is a major noise contributor and
causes a significant output voltage offset when amplified by the
noise gain of the circuit. However, because the low frequency
1/f noise appears as a slow varying offset to the ADA4522-2, it
is effectively reduced by the chopping technique. This allows
the ADA4522-2 to have a much lower noise at dc and low
frequency in comparison to standard low noise amplifiers that
are susceptible to 1/f noise. Figure 62 shows the 0.1 Hz to 10 Hz
noise to be only 117 nV p-p of noise.
Source Resistance
The ADA4522-2 is one of the lowest noise high voltage zero
drift amplifiers with 5.8 nV/√Hz of broadband noise at 1 kHz
(AV = 100). Therefore, it is important to consider the input
source resistance of choice to maintain a total low noise. The
total input referred broadband noise (eN total) from any
amplifier is primarily a function of three types of noise: input
voltage noise, input current noise, and thermal (Johnson) noise
from the external resistors.
Rev. 0 | Page 22 of 28
Data Sheet
ADA4522-2
eN RMS = eN total BW
where BW is the bandwidth in hertz.
This analysis is valid for broadband noise calculation up to a
decade before the switching frequency. If the bandwidth of
concern includes the switching frequency, more complicated
calculations must be made to include the effect of the increase
in noise at the switching frequency.
With a low source resistance of RS < 1 kΩ, the voltage noise of
the amplifier dominates. As the source resistance increases, the
thermal noise of RS dominates. As the source resistance further
increases, where RS > 50 kΩ, the current noise becomes the
main contributor of the total input noise.
Residual Ripple
As shown in Figure 58, Figure 59, and Figure 60, the ADA4522-2
has a flat noise spectrum density at lower frequencies and exhibits
spectrum density bumps and peaks at higher frequencies.
The largest noise bump is centered at 6 MHz; this is due to the
decrease in the input gain at higher frequencies. This is a typical
phenomenon and can also be seen in other amplifiers. In addition
to the noise bump, a sharp peak due to the chopping networks is
seen at 4.8 MHz. However, this magnitude is significantly reduced
by the offset and ripple correction loop. Its magnitude may be
different with different amplifier units or with different circuitries
around the amplifier. This peak can potentially be hidden by the
noise bump and, therefore, may not be detected.
The offset and ripple correction loop, designed to reduce the
4.8 MHz switching artifact, also creates a noise bump centered
at 800 kHz and a noise peak on top of this noise bump. Although
the magnitude of the bump is mostly constant, the magnitude of
the 800 kHz peak is different from unit to unit. Some units may
not exhibit the 800 kHz noise peak, however, for other units,
peaks occur at multiple integrals of 800 kHz, such as 1.6 MHz or
2.4 MHz.
These noise peaks, albeit small in magnitude, can be significant
when the amplifier has a closed-loop frequency that is higher
than the chopping frequency. To suppress the noise spike to a
desired level, one can either configure the amplifier in high gain
configuration or apply a post filter at the output of the amplifier.
VSY = ±15V
AV = +1
10
AV = +10
AV = +100
1
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
13168-072
The total equivalent rms noise over a specific bandwidth is
expressed as
100
Figure 73. Voltage Noise Density with Various Gains
Figure 74 shows the voltage noise density of the ADA4522-2
without and with post filters at different frequencies. The post
filter serves to roll off the bandwidth before the switching
frequency. In this example, the noise peak at 800 kHz is about
38 nV/√Hz. With a post filter at 80 kHz, the noise peak is
reduced to 4.1 nV/√Hz. With a post filter at 8 kHz, the noise
peak is lower than the noise floor and cannot be detected.
100
AV = +1
AV = +1 (POST FILTER AT 80kHz)
AV = +1 (POST FILTER AT 8kHz)
10
1
1k
10k
100k
1M
10M
FREQUENCY (Hz)
100M
13168-073
where:
eN is the input voltage noise density of the amplifier (V/√Hz).
k is the Boltzmann’s constant (1.38 × 10−23 J/K).
T is the temperature in Kelvin (K).
RS is the total input source resistance (Ω).
iN is the input current noise density of the amplifier (A/√Hz).
VOLTAGE NOISE DENSITY (nV/√Hz)
eN total = [eN2 + 4 kTRS + (iN × RS)2]1/2
Figure 73 shows the voltage noise density of the ADA4522-2 in
different gain configurations. Note that the higher the gain, the
lower the available bandwidth is. The earlier bandwidth roll-off
effectively filters out the higher noise spectrum.
VOLTAGE NOISE DENSITY (nV/√Hz)
These uncorrelated noise sources can be summed up in a root
sum squared (rss) manner by using the following equation:
Figure 74. Voltage Noise Density with Post Filters
Current Noise Density
Figure 75 shows the current noise density of the ADA4522-2 at
unity gain. At 1 kHz, current noise density is about 1.3 pA/√Hz.
Current noise density is determined by measuring the voltage
noise due to current noise flowing through a resistor. Due to the
low current noise density of the amplifier, the voltage noise is
usually measured with a high value resistor; in this case, a
100 kΩ source resistor is used. However, the source resistor
interacts with the input capacitance of the amplifier and board,
causing bandwidth to roll off. Note that Figure 75 shows the
current noise density rolling off much earlier than the unitygain bandwidth; this is expected.
Rev. 0 | Page 23 of 28
ADA4522-2
CAPACITIVE LOAD STABILITY
1
100
1k
10k
100k
FREQUENCY (Hz)
Figure 75. Current Noise Density at Gain = 1
EMI REJECTION RATIO
Circuit performance is often adversely affected by high frequency
EMI. When the signal strength is low and transmission lines are
long, an op amp must accurately amplify the input signals. However, all op amp pins—the noninverting input, inverting input,
positive supply, negative supply, and output pins—are susceptible to
EMI signals. These high frequency signals are coupled into an op
amp by various means, such as conduction, near field radiation, or
far field radiation. For example, wires and PCB traces can act as
antennas and pick up high frequency EMI signals.
Amplifiers do not amplify EMI or RF signals due to their
relatively low bandwidth. However, due to the nonlinearities of
the input devices, op amps can rectify these out of band signals.
When these high frequency signals are rectified, they appear as
a dc offset at the output.
The ADA4522-2 has integrated EMI filters at its input stage. To
describe the ability of the ADA4522-2 to perform as intended in
the presence of electromagnetic energy, the electromagnetic
interference rejection ratio (EMIRR) of the noninverting pin is
specified in Table 2, Table 3, and Table 4 of the Specifications
section. A mathematical method of measuring EMIRR is
defined as follows:
A quick and easy way to stabilize the op amp for capacitive load
drive is by adding a series resistor, RISO, between the amplifier
output terminal and the load capacitance, as shown in Figure 77.
RISO isolates the amplifier output and feedback network from
the capacitive load. However, with this compensation scheme,
the output impedance as seen by the load increases, and this
reduces gain accuracy.
+VSY
VIN
ADA4522-2
CL
Figure 78 shows the effect on overshoot with different values of
RISO.
60
VSY = ±15V
55 RL = 10kΩ
AV = +1
50 V = 100mV p-p
IN
OS+ (RISO = 0Ω)
OS– (RISO = 0Ω)
OS+ (RISO = 25Ω)
OS– (RISO = 25Ω)
OS+ (RISO = 50Ω)
OS– (RISO = 50Ω)
45
40
35
30
25
20
15
10
5
0
10
90
100
LOAD CAPACITANCE (pF)
80
1k
Figure 78. Small Signal Overshoot vs. Load Capacitance with Various Output
Isolating Resistors
70
60
SINGLE-SUPPLY INSTRUMENTATION AMPLIFIER
50
The extremely low offset voltage and drift, high open-loop gain,
high common-mode rejection, and high power supply rejection
of the ADA4522-2 make it an excellent op amp choice as a
discrete, single-supply instrumentation amplifier.
40
30
20
55V
30V
5V
10
100M
1G
FREQUENCY (Hz)
10G
13168-075
EMIRR (dB)
VOUT
Figure 77. Stability Compensation with Isolating Resistor, RISO
VIN = 100mV p-p
0
10M
RISO
–VSY
EMIRR = 20log(VIN_PEAK/∆VOS)
100
1/2
13168-077
0.1
10
The ADA4522-2 can safely drive capacitive loads of up to
250 pF in any configuration. As with most amplifiers, driving
larger capacitive loads than specified may cause excessive
overshoot and ringing, or even oscillation. A heavy capacitive
load reduces phase margin and causes the amplifier frequency
response to peak. Peaking corresponds to overshooting or
ringing in the time domain. Therefore, it is recommended that
external compensation be used if the ADA4522-2 must drive a
load exceeding 250 pF. This compensation is particularly
important in the unity-gain configuration, which is the worst
case for stability.
13168-076
VSY = ±2.5V
VSY = ±15V
VSY = ±27.5V
OVERSHOOT (%)
RS = 100kΩ
AV = +1
13168-074
CURRENT NOISE DENSITY (pA/√Hz)
10
Data Sheet
Figure 76. EMIRR vs. Frequency
Rev. 0 | Page 24 of 28
Data Sheet
ADA4522-2
Figure 79 shows the classic 3-op-amp instrumentation amplifier
using the ADA4522-2. The key to high CMRR for the instrumentation amplifier are resistors that are well matched for both the
resistive ratio and relative drift. For true difference amplification, matching of the resistor ratio is very important, where
R5/R2 = R6/R4. The resistors are important in determining the
performance over manufacturing tolerances, time, and temperature. Assuming a perfect unity-gain difference amplifier with
infinite common-mode rejection, a 1% tolerance resistor
matching results in only 34 dB of common-mode rejection.
Therefore, at least 0.01% or better resistors are recommended.
A1
RG1
R2
R3
R4
A3
RG2
VIN2
R1
A2
The ADA4522-2, with its ultralow offset, drift, and noise, is well
suited to signal condition low level sensor output with high gain
and accuracy. A weigh scale/load cell is an example of an
application with such requirements. Figure 80 shows a configuration for a single supply, precision, weigh scale measurement
system. The ADA4522-2 is used at the front end for amplification
of the low level signal from the load cell.
VOUT
R6
RG1 = RG2, R1 = R3, R2 = R4, R5 = R6
VOUT = (VIN2 – VIN1) (1 + R1/RG1) (R5/R2)
Figure 79. Discrete 3-Op Amp Instrumentation Amplifier
To build a discrete instrumentation amplifier with external
resistors without compromising on noise, pay close attention to
the resistor values chosen. RG1 and RG2 each have thermal noise
that is amplified by the total noise gain of the instrumentation
amplifier and, therefore, must be chosen sufficiently low to
reduce thermal noise contribution at the output while still
providing an accurate measurement. Table 8 shows the external
resistors noise contribution referred to the output (RTO).
Table 8. Thermal Noise Contribution Example
Resistor
RG1
RG2
R1
R2
R3
R4
R5
R6
Value
(kΩ)
0.4
0.4
10
10
10
10
20
20
Resistor Thermal
Noise (nV/√Hz)
2.57
2.57
12.83
12.83
12.83
12.83
18.14
18.14
Understanding how noise impacts a discrete instrumentation
amplifier or a difference amplifier (the second stage of a 3-opamp instrumentation amplifier) is important, because they are
commonly used in many different applications. The Load
Cell/Strain Gage Sensor Signal Conditioning section and the
Precision Low-Side Current Shunt Sensor section show the
ADA4522-2 used as a discrete instrumentation or difference
amplifier in an application.
LOAD CELL/STRAIN GAGE SENSOR SIGNAL
CONDITIONING
R5
13168-078
VIN1
as important. Note that the input offset voltage and the input
voltage noise of the amplifiers are also amplified by the overall
noise gain.
Thermal Noise
RTO (nV/√Hz)
128.30
128.30
25.66
25.66
25.66
25.66
18.14
18.14
Note that A1 and A2 have a high gain of 1 + R1/RG1. Therefore,
use a high precision, low offset voltage and low noise amplifier
for A1 and A2, such as the ADA4522-2. On the other hand, A3
operates at a much lower gain and has a different set of op amp
requirements. Its input noise, referred to the overall instrumentation amplifier input, is divided by the first stage gain and is not
Current flowing through a PCB trace produces an IR voltage
drop; with longer traces, this voltage drop can be several
millivolts or more, introducing a considerable error. A 1 inch
long, 0.005 inch wide trace of 1 oz copper has a resistance of
approximately 100 mΩ at room temperature. With a load
current of 10 mA, the resistance can introduce a 1 mV error.
Therefore, a 6-wire load cell is used in the circuit. It has two
sense pins, in addition to excitation, ground, and two output
connections. The sense pins are connected to the high side
(excitation pin) and low side (ground pin) of the Wheatstone
bridge. The voltage across the bridge can then be accurately
measured regardless of voltage drop due to wire resistance. The
two sense pins are also connected to the ADC reference inputs
for a ratiometric configuration that is immune to low frequency
changes in the power supply excitation voltage.
The ADA4522-2 is configured as the first stage of a 3-op-amp
instrumentation amplifier. It amplifies the low level amplitude
signal from the load cell by a factor of 1 + 2R1/RG. Capacitors
C1 and C2 are placed in the feedback loops of the amplifiers
and interact with R1 and R2 to perform low-pass filtering. This
limits the amount of noise entering the Σ-∆ ADC. In addition,
C3, C4, C5, R3, and R4 provide further common-mode and
differential mode filtering to reduce noise and unwanted signals.
Rev. 0 | Page 25 of 28
ADA4522-2
Data Sheet
+5V
V+
100pF
1/2
1µF
R1 11.3kΩ
RG
60.4Ω
VEXC
SENSE+
R4
1kΩ
C2 3.3µF
OUT+
OUT–
C1 3.3µF
R2 11.3kΩ
C3
1µF
100pF
REFIN–
DIN
DOUT/
RDY
AD7791
AIN+
SCLK
C5
10µF
CS
AIN–
C4
1µF
GND
1/2
SENSE–
13168-079
LOAD
CELL
R3
1kΩ
VDD
REFIN+
ADA4522-2
Figure 80. Precision Weigh Scale Measurement System
PRECISION LOW-SIDE CURRENT SHUNT SENSOR
PRINTED CIRCUIT BOARD LAYOUT
Many applications require the sensing of signals near the
positive or negative rails. Current shunt sensors are one such
application and are mostly used for feedback control systems.
They are also used in a variety of other applications, including
power metering, battery fuel gauging, and feedback controls in
industrial applications. In such applications, it is desirable to use
a shunt with very low resistance to minimize series voltage
drop. This not only minimizes wasted power, but also allows the
measurement of high currents while saving power.
The ADA4522-2 is a high precision device with ultralow offset
voltage and noise. Therefore, take care in the design of the
printed circuit board (PCB) layout to achieve optimum
performance of the ADA4522-2 at the board level.
A typical shunt may be 100 mΩ. At a measured current of 1 A,
the voltage produced from the shunt is 100 mV, and the
amplifier error sources are not critical. However, at low
measured current in the 1 mA range, the 100 µV generated
across the shunt demands a very low offset voltage and drift
amplifier to maintain absolute accuracy. The unique attributes
of a zero drift amplifier provide a solution. Figure 81 shows a
low-side current sensing circuit using the ADA4522-2. The
ADA4522-2 is configured as a difference amplifier with a gain
of 1000. Although the ADA4522-2 has high common-mode
rejection, the CMR of the system is limited by the external
resistors. Therefore, as mentioned in the Single-Supply
Instrumentation Amplifier section, the key to high CMR for the
system is resistors that are well matched from both the resistive
ratio and relative drift, where R1/R2 = R3/R4.
I
VOUT*
RS
0.1Ω
I
A potential source of offset error is the Seebeck voltage on the
circuit board. The Seebeck voltage occurs at the junction of two
dissimilar metals and is a function of the temperature of the
junction. The most common metallic junctions on a circuit board
are solder to board traces and solder to component leads.
Figure 82 shows a cross section of a surface-mount component
soldered to a PCB. A variation in temperature across the board
(where TA1 ≠ TA2) causes a mismatch in the Seebeck voltages at the
solder joints, thereby resulting in thermal voltage errors that
degrade the performance of the ultralow offset voltage of the
ADA4522-2.
COMPONENT
LEAD
RL
VSC1 +
R1
100Ω
R2
100kΩ
Properly bypassing the power supplies and keeping the supply
traces short minimizes power supply disturbances caused by
output current variation. Connect bypass capacitors as close as
possible to the device supply pins. Stray capacitances are a
concern at the outputs and the inputs of the amplifier. It is
recommended that signal traces be kept at a distance of at least
5 mm from supply lines to minimize coupling.
SURFACE-MOUNT
COMPONENT
VTS1 +
VSY
R4
100kΩ
VSC2
SOLDER
+ VTS2
PC BOARD
TA1
1/2
COPPER
TRACE
R3
100Ω
*VOUT = AMPLIFIER GAIN × VOLTAGE ACROSS RS
= 1000 × RS × I
= 100 × I
TA2
IF TA1 ≠ TA2, THEN
VTS1 + VSC1 ≠ VTS2 + VSC2
Figure 82. Mismatch in Seebeck Voltages Causes Seebeck Voltage Error
13168-080
ADA4522-2
+
Figure 81. Low-Side Current Sensing
Rev. 0 | Page 26 of 28
13168-081
VSY
To avoid leakage currents, keep the surface of the board clean
and free of moisture.
Data Sheet
ADA4522-2
+VSY
To minimize these thermocouple effects, orient resistors so that
heat sources warm both ends equally. Where possible, it is
recommended that the input signal paths contain matching
numbers and types of components to match the number and type
of thermocouple junctions. For example, dummy components,
such as zero value resistors, can be used to match the thermoelectric error source (real resistors in the opposite input path).
Place matching components in close proximity and orient them
in the same manner to ensure equal Seebeck voltages, thus
cancelling thermal errors. Additionally, use leads that are of equal
length to keep thermal conduction in equilibrium. Keep heat
sources on the PCB as far away from amplifier input circuitry as is
practical.
ISY+
A1
10kΩ
ADA4522-2
1/2
10kΩ
VOUT
ISY–
13168-082
A2
–VSY
Figure 83. Comparator Configuration A
+VSY
It is highly recommended to use a ground plane. A ground
plane helps distribute heat throughout the board, maintain a
constant temperature across the board, and reduce EMI noise
pick up.
A1
ADA4522-2
10kΩ
COMPARATOR OPERATION
ISY+
1/2
A2
ISY–
–VSY
Figure 84. Comparator Configuration B
2.2
2.0
ISY PER DUAL AMPLIFIER (mA)
ISY–
1.8
1.6
ISY+
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30
VSY (V)
13168-084
Figure 83 and Figure 84 show the ADA4522-2 configured as a
comparator, with 10 kΩ resistors in series with the input pins. Any
unused channels are configured as buffers with the input voltage
kept at the midpoint of the power supplies. The ADA4522-2 has
input devices that are protected from large differential input
voltages by Diode D5 and D6, as shown in Figure 70. These
diodes consist of substrate PNP bipolar transistors, and conduct
whenever the differential input voltage exceeds approximately
600 mV; however, these diodes also allow a current path from
the input to the lower supply rail, resulting in an increase in the
total supply current of the system. Both comparator configurations
yield the same result. At 30 V of power supply, ISY+ remains at
1.55 mA per dual amplifier, but ISY− increases close to 2 mA in
magnitude per dual amplifier.
10kΩ
VOUT
13168-083
An op amps is designed to operate in a closed-loop configuration
with feedback from its output to its inverting input. In contrast to
op amps, comparators are designed to operate in an open-loop
configuration and to drive logic circuits. Although op amps are
different from comparators, occasionally an unused section of a
dual op amp is used as a comparator to save board space and
cost; however, this is not recommended for the ADA4522-2.
Figure 85. Supply Current (ISY) per Dual Amplifier vs. Supply Voltage (VSY)
(ADA4522-2 as a Comparator)
Note that 10 kΩ resistors are used in series with the input of the
op amp. If smaller resistor values are used, the supply current of the
system increases much more. For more details on op amps as
comparators, see AN-849 Application Note, Using Op Amps as
Comparators.
Rev. 0 | Page 27 of 28
ADA4522-2
Data Sheet
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
3.20
3.00
2.80
5.15
4.90
4.65
5
1
4
PIN 1
IDENTIFIER
0.65 BSC
15° MAX
1.10 MAX
0.15
0.05
COPLANARITY
0.10
0.80
0.55
0.40
0.23
0.09
6°
0°
0.40
0.25
COMPLIANT TO JEDEC STANDARDS MO-187-AA
10-07-2009-B
0.95
0.85
0.75
Figure 86. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
4.00 (0.1574)
3.80 (0.1497)
Figure 87. 8-Lead Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADA4522-2ARMZ
ADA4522-2ARMZ-R7
ADA4522-2ARMZ-RL
ADA4522-2ARZ
ADA4522-2ARZ-R7
ADA4522-2ARZ-RL
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Small Outline Package [SOIC_N]
8-Lead Small Outline Package [SOIC_N]
8-Lead Small Outline Package [SOIC_N]
Z = RoHS Compliant Part.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13168-0-5/15(0)
Rev. 0 | Page 28 of 28
Package Option
RM-8
RM-8
RM-8
R-8
R-8
R-8
Branding
A39
A39
A39