CYStech Electronics Corp. Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 1/10 300mA High PSRR Low Noise LDO LM1101N5 General Description The LM1101N5 performs ultra low drop voltage, high power supply rejection ratio (PSRR), fast response, low noise linear regulator, and designed to continuously deliver up to 300mA output current. The LM1101N5 has wide adjustable output voltage range and high output accuracy to 1.5%. No by-pass capacitor is needed for this device and only 1μF ceramic capacitor is required for stability in any loading conditions. It reduces the amount of board space necessary for power applications. The other features include soft start, current limit protection, Power-On-Reset function, and over temperature protection. The LM1101N5 is available in SOT-23-5 package. Features ●Ultra ●Ultra ●Wide Fast Response in Line/Load Transient VIN Range from 2.5V to 5.5V ●Adjustable Output Voltage from 0.8V to 4.5V ●Ultra Low Dropout Voltage: 200mV @300mA ●High Power Supply Rejection Ratio ■70dB at 1kHz ■60dB at 10kHz ●Low Low Output Noise Voltage 100μV(RMS) Shutdown Current < 1μA ●Only 1μF Ceramic Capacitor required for stability ●Over Temperature Protection ●Current Limit Protection ●RoHS Compliant and 100% Lead (Pb)-Free Applications ●Cellular Handsets ●Battery-Powered Equipment ●Laptop, Palmtops, Notebook Computers ●Hand-Held Instruments ●PCMCIA Cards ●Portable Information Applications Ordering Information Part Number LM1101N5 Package Shipping SOT-23-5L (RoHS compliant package) 3000 pcs / Tape & Reel Pin Configuration LM1101N5 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 2/10 Typical Application Circuit Pin Assignment Pin Name Pin No. EN 1 GND 2 VIN 3 VOUT 4 FB 5 Pin Function Chip Enable Input (Active high). Ground. Input Voltage. This is the source input to the power device that supplies current to the output pin. Output Voltage. VOUT is power output pin. An internal pull low resistance exists when the device is disabled. Minimum 1μF low ESR ceramic capacitor is required at this pin for stabilizing VOUT voltage. Feedback Voltage. FB is the non-inverting input to the error amplifier. A resistor divider from the output to GND is used to set the regulation voltage as VOUT= 0.8 * (1+R1/R2 )(V) . This pin has high impedance and should be kept from non-inverting input to noisy source to guarantee stable operation. Function Block Diagram LM1101N5 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 3/10 Absolute Maximum Ratings (Note 1) ●VIN ---------------------------------------------------------------------------------------------- -0.3V to +6.0V ●Other Pins-------------------------------------------------------------------------------- -0.3V to (VIN+0.3V) ●Power Dissipation, PD @ TA = 25°C, SOT23-5 (Note 2) -------------------------------------------- 0.4W ●Package Thermal Resistance, θJA, SOT23-5 (Note 2)------------------------------------------- 250°C/W ●Package Thermal Resistance, θJC, SOT23-5 (Note 2)--------------------------------------------- 25°C/W ●Junction Temperature-------------------------------------------------------------------------------- 150°C ●Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------ 260°C ●Storage Temperature ----------------------------------------------------------------------- -65°C to 150°C ●ESD susceptibility (Note3) HBM (Human Body Mode)------------------------------------------------------------------------2KV MM (Machine Mode)--------------------------------------------------------------------------------- 200V Recommended Operating Conditions (Note4) Supply Input Voltage, VIN -------------------------------------------------------------------- +2.5V to +5.5V Junction Temperature ----------------------------------------------------------------------−40°C to 125°C Ambient Temperature ------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics Parameter Symbol @VIN=5V, TA=25℃, unless otherwise specified Test Conditions Min Typ Max Units 2.5 - 2.0 0.1 90 0.1 5.5 2.4 130 1 V V V μA μA -1.5 - 1.5 % - - 0.2 %/V - 0.5 100 70 60 40 200 1 300 %/A μV(RMS) 1.4 -1 0 0.4 1 V V μA - 600 - μs Supply Input Section Power Input Voltage POR Threshold POR Hysteresis Quiescent Current Shutdown Current Output Voltage Output Voltage Accuracy VIN VOUT= VREF VPORTH VPORHYS IQ VIN=VEN=5V, IOUT=0A ISD VIN=5V,VEN=0V VOUT Line Regulation VOUT(LINE) Load Regulation Output Voltage Noise VOUT(LOAD) Power Supply Rejection Ratio PSRR Dropout Voltage Enable Enable High Level Disable Low Level Enable Input Current Output Voltage Ramp Up Time VDROP LM1101N5 VEN VSD IEN VIN=VEN=5V, IOUT=1mA 2.5V<VIN<5.0V, IOUT=1mA, VOUT=VREF 1mA<IOUT<300mA,VIN=VOUT+0.5V 10Hz to 100kHz, COUT=1μF IOUT=10mA,1kHz IOUT=10mA,10kHz IOUT=10mA,100kHz IOUT=300mA, 2.5V < VOUT < 3.3V VEN=5V or 0V dB mV CYStek Product Specification Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 4/10 CYStech Electronics Corp. Parameter Over Current Protection OCP Threshold Level Thermal Protection Thermal Shutdown Temperature Thermal Shutdown Hysteresis Symbol Test Conditions Min Typ Max Units IOCP VIN=VEN=5V, VOUT=VREF 360 600 - mA TSD VIN=VEN=5V, IOUT=0A, VOUT=VREF - 160 - °C TSDHYS VIN=VEN=5V, IOUT=0A, VOUT=VREF - 30 - °C Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA=25°C on a low effective thermal conductivity test board (single layout, 1S) of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. LM1101N5 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 5/10 Typical Operating Characteristics Power On from VIN Power Off from VIN VIN VOUT VIN IOUT VOUT IOUT VOUT=3.3V，CIN=COUT=1μF，ROUT=15Ω VOUT=3.3V，CIN=COUT=1μF，ROUT=15Ω Turn On from EN Turn Off from EN VIN VOUT VIN IOUT VOUT IOUT VOUT=3.3V，CIN=COUT=1μF，ROUT=15Ω VOUT=3.3V，CIN=COUT=1μF，ROUT=15Ω Load Transient Response Line Transient Response VOUT=3.3V，CIN=COUT=1μF VOUT=2.5V，CIN=COUT=1μF，VIN=3.5V to 4.5V LM1101N5 CYStek Product Specification CYStech Electronics Corp. LM1101N5 Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 6/10 CYStek Product Specification CYStech Electronics Corp. LM1101N5 Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 7/10 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 8/10 Functional Description Enable Function LM1101 is enabled if the voltage of the EN pin is greater than 1.4V. If the voltage of the EN pin is less than 0.4V, the IC will be disabled. POR – Power ON Reset To let LM1101 start to operation, input voltage must be higher than its POR voltage even when EN voltage is pulled higher than enable high voltage. Typical POR voltage is 2.0V. VOUT Voltage Adjustment The VOUT voltage of LM1101 can be adjusted by external voltage divider. Refer to typical application circuit, VOUT voltage is calculated by the following equation: Over Current Limit Function LM1101 features over current limiting function which can limit its output current to 600mA. Input and Output Capacitor Selection For VIN pin, 1μF or larger ceramic capacitor is required to provide bypass path in transient current demand. VOUT pin is also recommended to have 1μF or larger ceramic capacitor to be stable and reduce the VOUT voltage dip when fast loading transient is happened. Power Dissipation The max power depends on some conditions, including of thermal impedance, PCB layout, airflow, and so on. The max power dissipation can be calculated by the formula as below: PD(max)=(TJ(max)-TA) / θJA TJ(max) is the max junction temperature; θJA is the thermal impedance from junction to ambient. The thermal impedance θJA of SOT23-5 is package design and PCB design dependent. For recommended specification of LM1101, the max junction temperature is 125 degree C. The θJA of SOT23-5 is 250°C/W on the standard JEDEC 51-3 thermal test board. The max power dissipation (at 25°C ambient) can be calculated as below: PD (max at 25°C)=(125°C – 25°C) / (250°C/W) = 0.4W LM1101N5 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 9/10 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. LM1101N5 CYStek Product Specification Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 10/10 CYStech Electronics Corp. SOT-25 Dimension Marking: Device Code Date Code Style: Pin 1: Enable Pin 2: Ground Pin 3: VIN Pin 4: VOUT Pin 5: Feedback 5-Lead SOT-23-5L Plastic Surface Mounted Package CYStek Package Code:N5 *:Typical Millimeters Min. Max. 0.90 1.30 0.00 0.15 2.80* 1.60* 0.30 0.50 DIM A A1 B B1 b Inches Min. Max. 0.0354 0.0512 0.0000 0.0059 0.1102* 0.0630* 0.0118 0.0199 DIM c D E F G Millimeters Min. Max. 0.08 0.22 2.90* 0.95* 1.45 0.30 0.60 Inches Min. Max. 0.0031 0.0087 0.1142* 0.0374* 0.0571 0.0118 0.0236 Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material : • Lead :Pure tin plated. • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. LM1101N5 CYStek Product Specification