MTE2D4N06E3

Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 1/8
CYStech Electronics Corp.
N-Channel Enhancement Mode Power MOSFET
MTE2D4N06E3
BVDSS
ID @VGS=10V, TC=25°C
60V
RDSON(TYP) @ VGS=10V, ID=20A
120A
2.6mΩ
RDSON(TYP) @ VGS=7V, ID=20A
2.8mΩ
Features
• Simple Drive Requirement
• Fast Switching Characteristic
• RoHS compliant package
Symbol
Outline
MTE2D4N06E3
TO-220
G：Gate
D：Drain
S：Source
GDS
Ordering Information
Device
Package
TO-220
MTE2D4N06E3-0-UB-S
(Pb-free lead plating package)
Shipping
50 pcs/tube, 20 tubes/box, 4 boxes / carton
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and
green compound products
Packing spec, UB : 50 pcs / tube, 20 tubes/box
Product rank, zero for no rank products
Product name
MTE2D4N06E3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 2/8
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Symbol
Limits
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TC=25°C(silicon limit)
Continuous Drain Current @ TC=100°C(silicon limit)
Continuous Drain Current @ TC=25°C(package limit) (Note 1)
Pulsed Drain Current
(Note 3)
Continuous Drain Current @ TA=25°C
(Note 2)
Continuous Drain Current @ TA=70°C
(Note 2)
Avalanche Current
(Note 3)
Avalanche Energy @ L=100μH, ID=30A, RG=25Ω (Note 2)
TC=25°C
(Note 1)
Power Dissipation
TC=100°C
(Note 1)
TA=25°C
(Note 2)
Power Dissipation
TA=70°C
(Note 2)
Operating Junction and Storage Temperature
VDS
VGS
60
±30
200
141
120
480
16.5
13.2
30
45
330
165
2
1.3
-55~+175
ID
IDM
IDSM
IAS
EAS
PD
PDSM
Tj, Tstg
Unit
V
A
mJ
W
°C
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max,
(Note 2)
Symbol
Rth,j-c
Rth,j-a
Value
0.45
62.5
Unit
°C/W
Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful
in setting the upper dissipation limit for cases where additional heatsinking is used.
2.The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment
with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction
temperature of 150°C. The value in any given application depends on the user’s specific board design, and the
maximum temperature of 175°C may be used if the PCB allows it.
3. Pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles
to keep initial TJ=25°C.
4. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum.
5. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient.
MTE2D4N06E3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 3/8
Characteristics (TC=25°C, unless otherwise specified)
Symbol
Static
BVDSS
VGS(th)
GFS
IGSS
IDSS
*RDS(ON)
Min.
Typ.
Max.
60
2.0
-
2.7
56
2.6
2.8
4.0
±100
1
25
3.5
4.0
148
34.3
58.5
32
55
147
143
6674
1241
1137
1.9
-
0.65
70
150
120
480
0.9
-
Dynamic
*Qg
*Qgs
*Qgd
*td(ON)
*tr
*td(OFF)
*tf
Ciss
Coss
Crss
Rg
Source-Drain Diode
*IS
*ISM
*VSD
*trr
*Qrr
-
Unit
V
S
nA
μA
mΩ
Test Conditions
VGS=0V, ID=250μA
VDS = VGS, ID=250μA
VDS =5V, ID=15A
VGS=±30V
VDS =48V, VGS =0V
VDS =48V, VGS =0V, Tj=125°C
VGS =10V, ID=20A
VGS =7V, ID=20A
nC
ID=120A, VDS=30V, VGS=10V
ns
VDS=30V, ID=60A, VGS=10V, RG=4.7Ω
pF
VGS=0V, VDS=25V, f=1MHz
Ω
f=1MHz
A
V
ns
nC
IS=1A, VGS=0V
IF=120A, VGS=0V, dIF/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
MTE2D4N06E3
CYStek Product Specification
Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 4/8
CYStech Electronics Corp.
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
400
10V, 9V, 8V, 7V
6V
300
ID, Drain Current(A)
BVDSS, Normalized Drain-Source
Breakdown Voltage
350
250
VGS=5.5V
200
150
VGS=5V
100
50
1.2
1
0.8
0.6
ID=250μA,
VGS=0V
VGS=4.5V
0.4
0
0
1
2
3
4
VDS , Drain-Source Voltage(V)
-75 -50 -25
5
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1.2
100
VSD, Source-Drain Voltage(V)
R DS(ON) , Static Drain-Source On-State
Resistance(mΩ)
1000
VGS=6V
7V
10V
10
1
1
Tj=25°C
0.8
0.6
Tj=150°C
0.4
0.2
0.01
0.1
1
10
ID, Drain Current(A)
100
0
4
8
12
16
IDR , Reverse Drain Current(A)
20
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
2.8
100
R DS(ON) , Normalized Static DrainSource On-State Resistance
90
R DS(ON), Static Drain-Source OnState Resistance(mΩ)
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
ID=20A
80
70
60
50
40
30
20
10
2.4
VGS=10V, ID=20A
2
1.6
1.2
0.8
0.4
RDS(ON) @Tj=25°C :2.6mΩ typ
0
0
0
MTE2D4N06E3
2
4
6
8
VGS, Gate-Source Voltage(V)
10
-75 -50 -25
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
CYStek Product Specification
Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 5/8
CYStech Electronics Corp.
Typical Characteristics(Cont.)
NormalizedThreshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
VGS(th), Normalized Threshold Voltage
Capacitance---(pF)
100000
Ciss
10000
C oss
1000
Crss
1.4
1.2
ID=1mA
1
0.8
0.6
ID=250μA
0.4
0.2
100
0.1
1
10
VDS, Drain-Source Voltage(V)
-75 -50 -25
100
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
Forward Transfer Admittance vs Drain Current
Gate Charge Characteristics
10
VGS, Gate-Source Voltage(V)
GFS, Forward Transfer Admittance(S)
100
10
1
VDS=5V
Pulsed
Ta=25°C
0.1
0.01
0.001
VDS=30V
ID=120A
8
6
4
2
0
0.01
0.1
1
ID, Drain Current(A)
10
0
100
40
60
80 100 120
Total Gate Charge---Qg(nC)
140
160
Maximum Drain Current vs Case Temperature
Maximum Safe Operating Area
250
1000
ID, Maximum Drain Current(A)
1μs
RDS(ON)
Limit
ID, Drain Current(A)
20
100μs
100
1ms
10ms
10
100ms
DC
1
TC=25°C, Tj=175°, VGS=10V
RθJC=0.45°C/W, Single Pulse
200
silicon limit
150
100
package limit
50
VGS=10V, RθJC=0.45°C/W
0
0.1
0.1
MTE2D4N06E3
1
10
100
VDS, Drain-Source Voltage(V)
1000
25
50
75
100 125 150
TC , Case Temperature(°C)
175
200
CYStek Product Specification
Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 6/8
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Typical Transfer Characteristics
Single Pulse Maximum Power Dissipation
5000
400
4500
VDS=5V
TJ(MAX) =175°C
TC=25°C
RθJC=0.45°C/W
4000
300
3500
250
Power (W)
ID, Drain Current (A)
350
200
150
3000
2500
2000
1500
100
1000
50
500
0
0
2
4
6
8
VGS , Gate-Source Voltage(V)
10
0
0.0001
0.001
0.01
0.1
Pulse Width(s)
1
10
Transient Thermal Response Curves
1
r(t), Normalized Effective Transient
Thermal Resistance
D=0.5
0.1
0.2
1.RθJC(t)=r(t)*RθJC
2.Duty Factor, D=t1/t2
3.TJM-TC=PDM*RθJC(t)
4.RθJC=0.45 ° C/W
0.1
0.05
0.02
0.01
0.01
Single Pulse
0.001
1.E-05
MTE2D4N06E3
1.E-04
1.E-03
1.E-02
1.E-01
t1, Square Wave Pulse Duration(s)
1.E+00
1.E+01
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 7/8
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
Pb-free devices
260 +0/-5 °C
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTE2D4N06E3
CYStek Product Specification
Spec. No. : C933E3
Issued Date : 2013.03.20
Revised Date : 2015.07.02
Page No. : 8/8
CYStech Electronics Corp.
TO-220 Dimension
Marking:
4
Device Name
Date Code
E2D4
N06
□□□□
1
3-Lead TO-220 Plastic Package
CYStek Package Code: E3
2
3
Style: Pin 1.Gate 2.Drain 3.Source
4.Drain
*: Typical
Millimeters
Min.
Max.
4.400
4.600
2.250
2.550
0.710
0.910
1.170
1.370
0.330
0.650
1.200
1.400
10.250
9.910
9.750
8.950
12.650 12.950
DIM
A
A1
b
b1
c
c1
D
E
E1
Inches
Min.
Max.
0.173
0.181
0.089
0.100
0.028
0.036
0.046
0.054
0.013
0.026
0.047
0.055
0.404
0.390
0.384
0.352
0.510
0.498
DIM
e
e1
F
H
h
L
L1
V
Φ
Millimeters
Min.
Max.
2.540*
4.980
5.180
2.650
2.950
8.100
7.900
0.000
0.300
12.900 13.400
2.850
3.250
7/500 REF
3.400
3.800
Inches
Min.
Max.
0.100*
0.196
0.204
0.104
0.116
0.319
0.311
0.000
0.012
0.508
0.528
0.112
0.128
0.295 REF
0.134
0.150
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTE2D4N06E3
CYStek Product Specification