MTE010N10E3

Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 1/8
CYStech Electronics Corp.
N-Channel Enhancement Mode Power MOSFET
MTE010N10E3
BVDSS
100V
ID
RDSON(TYP) @ VGS=10V, ID=50A
70A
9.6mΩ
RDSON(TYP) @ VGS=7V, ID=20A
10.1mΩ
Features
• Low Gate Charge
• Simple Drive Requirement
• Repetitive Avalanche Rated
• Fast Switching Characteristic
• RoHS compliant package
Symbol
Outline
TO-220
MTE010N10E3
G：Gate
D：Drain
S：Source
GDS
Ordering Information
Device
MTE010N10E3-0-UB-S
Package
TO-220
(Pb-free lead plating package)
Shipping
50 pcs/tube, 20 tubes/box, 4 boxes / carton
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and
green compound products
Packing spec, UB : 50 pcs / tube, 20 tubes/box
Product rank, zero for no rank products
Product name
MTE010N10E3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 2/8
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Symbol
Limits
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TC=25°C(silicon limit)
Continuous Drain Current @ TC=100°C(silicon limit)
Continuous Drain Current @ TC=25°C(package limit) (Note 1)
Pulsed Drain Current
(Note 3)
Continuous Drain Current @ TA=25°C
(Note 2)
Continuous Drain Current @ TA=70°C
(Note 2)
Avalanche Current
(Note 3)
Avalanche Energy @ L=100μH, ID=80A, RG=25Ω (Note 2)
Repetitive Avalanche Energy@ L=0.1mH
(Note 3)
TC=25°C
(Note 1)
Power Dissipation
TC=100°C
(Note 1)
TA=25°C
(Note 2)
Power Dissipation
TA=70°C
(Note 2)
Operating Junction and Storage Temperature
VDS
VGS
100
±20
70
50
60
300
8
6.5
80
320
15
150
75
2
1.3
-55~+175
ID
IDM
IDSM
IAS
EAS
EAR
PD
PDSM
Tj, Tstg
Unit
V
A
mJ
W
W
°C
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max, t≤10s
Thermal Resistance, Junction-to-ambient, max
Symbol
Rth,j-c
(Note 1)
(Note 1)
Rth,j-a
Value
1
15
62.5
Unit
°C/W
°C/W
°C/W
Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful
in setting the upper dissipation limit for cases where additional heatsinking is used.
2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air
environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction
temperature of 150°C. The value in any given application depends on the user’s specific board design, and the
maximum temperature of 175°C may be used if the PCB allows it.
3. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency
and low duty cycles to keep initial TJ=25°C.
4. The maximum current limited by package is 60A.
5. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum.
6. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient.
MTE010N10E3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 3/8
Characteristics (TC=25°C, unless otherwise specified)
Symbol
Static
BVDSS
VGS(th)
GFS
IGSS
IDSS
*RDS(ON)
Min.
Typ.
Max.
100
2.0
-
2.9
41
9.6
10.1
4.0
±100
1
25
13.5
15.8
48
20
10
19
12
35
11
3753
250
65
-
0.89
90
135
70
1.2
-
Dynamic
*Qg
*Qgs
*Qgd
*td(ON)
*tr
*td(OFF)
*tf
Ciss
Coss
Crss
Source-Drain Diode
*IS
*VSD
*trr
*Qrr
-
Unit
V
S
nA
μA
mΩ
Test Conditions
VGS=0V, ID=250μA
VDS = VGS, ID=250μA
VDS =5V, ID=20A
VGS=±20V
VDS =80V, VGS =0V
VDS =80V, VGS =0V, Tj=55°C
VGS =10V, ID=50A
VGS =7V, ID=20A
nC
ID=20A, VDS=50V, VGS=10V
ns
VDS=50V, ID=20A, VGS=10V, RG=3Ω
pF
VGS=0V, VDS=30V, f=1MHz
A
V
ns
nC
IS=50A, VGS=0V
IF=20A, VGS=0, dI/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
MTE010N10E3
CYStek Product Specification
Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 4/8
CYStech Electronics Corp.
Typical Characteristics
Brekdown Voltage vs Junction Temperature
Typical Output Characteristics
1.4
BVDSS, Normalized Drain-Source
Breakdown Voltage
300
10V,9V,8V,7V
ID, Drain Current(A)
250
VGS=6V
200
150
100
VGS=5V
1.2
1
0.8
ID=250μA,
VGS=0V
0.6
50
VGS=4V
0.4
0
0
2
4
6
8
VDS , Drain-Source Voltage(V)
-75 -50 -25
10
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1.2
VGS=4.5V
VSD, Source-Drain Voltage(V)
R DS(ON), Static Drain-Source On-State
Resistance(mΩ)
100
VGS=6V
VGS=7V
VGS=10V
10
1
Tj=25°C
0.8
0.6
0.4
Tj=150°C
0.2
1
0.1
1
10
ID, Drain Current(A)
100
0
4
8
12
16
IDR , Reverse Drain Current(A)
20
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
2.4
R DS(ON), Normalized Static DrainSource On-State Resistance
100
R DS(ON), Static Drain-Source OnState Resistance(mΩ)
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
90
ID=20A
80
70
60
50
40
30
20
10
2
VGS=10V, ID=20A
1.6
1.2
0.8
0.4
RDS(ON) @Tj=25°C : 9.6mΩ
0
0
0
MTE010N10E3
2
4
6
8
VGS, Gate-Source Voltage(V)
10
-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
CYStek Product Specification
Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 5/8
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
VGS(th), Normalized Threshold Voltage
10000
Capacitance---(pF)
Ciss
1000
C oss
Crss
1.4
1.2
1
ID=1mA
0.8
ID=250μA
0.6
0.4
100
0.1
1
10
VDS, Drain-Source Voltage(V)
-75 -50 -25
100
50
75 100 125 150 175
Gate Charge Characteristics
10
100
VDS=80V
VGS, Gate-Source Voltage(V)
GFS, Forward Transfer Admittance(S)
25
Tj, Junction Temperature(°C)
Forward Transfer Admittance vs Drain Current
10
1
VDS=5V
Pulsed
Ta=25°C
0.1
0.01
0.001
8
VDS=50V
VDS=20V
6
4
2
ID=20A
0
0.01
0.1
1
ID, Drain Current(A)
10
0
100
10
20
30
40
Total Gate Charge---Qg(nC)
50
60
Maximum Drain Current vs Case Temperature
Maximum Safe Operating Area
80
RDS(ON)
Limit
ID, Maximum Drain Current(A)
1000
ID, Drain Current(A)
0
10μs
100
100μs
1ms
10
10ms
TC=25°C, Tj=175°C,
VGS=10V,RθJC=1°C/W
single pulse
1
100ms
DC
Silicon limit
70
60
50
40
Package limit
30
20
VGS=10V, RθJC=1°C/W
10
0
0.1
0.1
MTE010N10E3
1
10
100
VDS, Drain-Source Voltage(V)
1000
0
25
50
75 100 125 150
TC, Case Temperature(°C)
175
200
CYStek Product Specification
Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 6/8
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Single Pulse Maximum Power Dissipation
Typical Transfer Characteristics
5000
300
4500
VDS=10V
Peak Transient Power (W)
ID, Drain Current (A)
250
200
150
100
50
TJ(MAX) =175°C
TC=25°C
θJA=1°C/W
4000
3500
3000
2500
2000
1500
1000
500
0
0
2
4
6
VGS, Gate-Source Voltage(V)
8
10
0
0.0001
0.001
0.01
0.1
Pulse Width(s)
1
10
Transient Thermal Response Curves
r(t), Normalized Effective Transient Thermal
Resistance
1
D=0.5
1.RθJC(t)=r(t)*RθJC
2.Duty Factor, D=t1/t2
3.TJM-TC=PDM*RθJC(t)
4.RθJC=1 °C/W
0.2
0.1
0.1
0.05
0.02
0.01
Single Pulse
0.01
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
1.E+01
t1, Square Wave Pulse Duration(s)
MTE010N10E3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 7/8
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
Pb-free devices
260 +0/-5 °C
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Sn-Pb eutectic Assembly
Average ramp-up rate
3°C/second max.
(Tsmax to Tp)
Preheat
100°C
−Temperature Min(TS min)
−Temperature Max(TS max)
150°C
−Time(ts min to ts max)
60-120 seconds
Time maintained above:
−Temperature (TL)
183°C
− Time (tL)
60-150 seconds
Peak Temperature(TP)
240 +0/-5 °C
Time within 5°C of actual peak
10-30 seconds
temperature(tp)
Ramp down rate
6°C/second max.
6 minutes max.
Time 25 °C to peak temperature
Pb-free Assembly
3°C/second max.
150°C
200°C
60-180 seconds
217°C
60-150 seconds
260 +0/-5 °C
20-40 seconds
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTE010N10E3
CYStek Product Specification
Spec. No. : C944E3
Issued Date : 2013.11.12
Revised Date : 2015.03.10
Page No. : 8/8
CYStech Electronics Corp.
TO-220 Dimension
Marking:
4
Device Name
Date Code
E010
N10
□□□□
1
3-Lead TO-220 Plastic Package
CYStek Package Code: E3
Millimeters
Min.
Max.
4.400
4.600
2.250
2.550
0.710
0.910
1.170
1.370
0.330
0.650
1.200
1.400
10.250
9.910
9.750
8.950
12.650 12.950
DIM
A
A1
b
b1
c
c1
D
E
E1
Inches
Min.
Max.
0.173
0.181
0.089
0.100
0.028
0.036
0.046
0.054
0.013
0.026
0.047
0.055
0.404
0.390
0.384
0.352
0.510
0.498
2
3
Style: Pin 1.Gate 2.Drain 3.Source
4.Drain
*: Typical
DIM
e
e1
F
H
h
L
L1
V
Φ
Millimeters
Min.
Max.
2.540*
4.980
5.180
2.650
2.950
8.100
7.900
0.000
0.300
12.900 13.400
2.850
3.250
7/500 REF
3.400
3.800
Inches
Min.
Max.
0.100*
0.196
0.204
0.104
0.116
0.319
0.311
0.000
0.012
0.508
0.528
0.112
0.128
0.295 REF
0.134
0.150
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTE010N10E3
CYStek Product Specification